1 /* Modified for usage in Mednafen's SMS emulation(YMF281B tone data removed, code simplified, and more!).
2
3 License:
4
5 Copyright (C) Mitsutaka Okazaki 2004
6
7 This software is provided 'as-is', without any express or implied warranty.
8 In no event will the authors be held liable for any damages arising from
9 the use of this software.
10
11 Permission is granted to anyone to use this software for any purpose,
12 including commercial applications, and to alter it and redistribute it
13 freely, subject to the following restrictions:
14
15 1. The origin of this software must not be misrepresented; you must not
16 claim that you wrote the original software. If you use this software
17 in a product, an acknowledgment in the product documentation would be
18 appreciated but is not required.
19 2. Altered source versions must be plainly marked as such, and must not
20 be misrepresented as being the original software.
21 3. This notice may not be removed or altered from any source distribution.
22
23 */
24
25 /***********************************************************************************
26
27 emu2413.c -- YM2413 emulator written by Mitsutaka Okazaki 2001
28
29 2001 01-08 : Version 0.10 -- 1st version.
30 2001 01-15 : Version 0.20 -- semi-public version.
31 2001 01-16 : Version 0.30 -- 1st public version.
32 2001 01-17 : Version 0.31 -- Fixed bassdrum problem.
33 : Version 0.32 -- LPF implemented.
34 2001 01-18 : Version 0.33 -- Fixed the drum problem, refine the mix-down method.
35 -- Fixed the LFO bug.
36 2001 01-24 : Version 0.35 -- Fixed the drum problem,
37 support undocumented EG behavior.
38 2001 02-02 : Version 0.38 -- Improved the performance.
39 Fixed the hi-hat and cymbal model.
40 Fixed the default percussive datas.
41 Noise reduction.
42 Fixed the feedback problem.
43 2001 03-03 : Version 0.39 -- Fixed some drum bugs.
44 Improved the performance.
45 2001 03-04 : Version 0.40 -- Improved the feedback.
46 Change the default table size.
47 Clock and Rate can be changed during play.
48 2001 06-24 : Version 0.50 -- Improved the hi-hat and the cymbal tone.
49 Added VRC7 patch (EMU2413_reset_patch is changed).
50 Fixed EMU2413_reset() bug.
51 Added EMU2413_setMask, EMU2413_getMask and EMU2413_toggleMask.
52 Added EMU2413_writeIO.
53 2001 09-28 : Version 0.51 -- Removed the noise table.
54 2002 01-28 : Version 0.52 -- Added Stereo mode.
55 2002 02-07 : Version 0.53 -- Fixed some drum bugs.
56 2002 02-20 : Version 0.54 -- Added the best quality mode.
57 2002 03-02 : Version 0.55 -- Removed EMU2413_init & EMU2413_close.
58 2002 05-30 : Version 0.60 -- Fixed HH&CYM generator and all voice datas.
59 2004 04-10 : Version 0.61 -- Added YMF281B tone (defined by Chabin).
60
61 References:
62 fmopl.c -- 1999,2000 written by Tatsuyuki Satoh (MAME development).
63 fmopl.c(fixed) -- (C) 2002 Jarek Burczynski.
64 s_opl.c -- 2001 written by Mamiya (NEZplug development).
65 fmgen.cpp -- 1999,2000 written by cisc.
66 fmpac.ill -- 2000 created by NARUTO.
67 MSX-Datapack
68 YMU757 data sheet
69 YM2143 data sheet
70
71 **************************************************************************************/
72
73 #include <mednafen/mednafen.h>
74 #include <string.h>
75 #include <math.h>
76
77 #include "emu2413.h"
78
79 #define EMU2413_TONE_NUM 1
80 static unsigned char default_inst[EMU2413_TONE_NUM][(16 + 3) * 16] = {
81 {
82 #include "2413tone.h"
83 }
84 };
85
86 /* Size of Sintable ( 8 -- 18 can be used. 9 recommended.) */
87 #define PG_BITS 9
88 #define PG_WIDTH (1<<PG_BITS)
89
90 /* Phase increment counter */
91 #define DP_BITS 18
92 #define DP_WIDTH (1<<DP_BITS)
93 #define DP_BASE_BITS (DP_BITS - PG_BITS)
94
95 /* Dynamic range (Accuracy of sin table) */
96 #define DB_BITS 8
97 #define DB_STEP (48.0/(1<<DB_BITS))
98 #define DB_MUTE (1<<DB_BITS)
99
100 /* Dynamic range of envelope */
101 #define EG_STEP 0.375
102 #define EG_BITS 7
103 #define EG_MUTE (1<<EG_BITS)
104
105 /* Dynamic range of total level */
106 #define TL_STEP 0.75
107 #define TL_BITS 6
108 #define TL_MUTE (1<<TL_BITS)
109
110 /* Dynamic range of sustine level */
111 #define SL_STEP 3.0
112 #define SL_BITS 4
113 #define SL_MUTE (1<<SL_BITS)
114
115 #define EG2DB(d) ((d)*(int32)(EG_STEP/DB_STEP))
116 #define TL2EG(d) ((d)*(int32)(TL_STEP/EG_STEP))
117 #define SL2EG(d) ((d)*(int32)(SL_STEP/EG_STEP))
118
119 #define DB_POS(x) (uint32)((x)/DB_STEP)
120 #define DB_NEG(x) (uint32)(DB_MUTE+DB_MUTE+(x)/DB_STEP)
121
122 /* Bits for liner value */
123 #define DB2LIN_AMP_BITS 10 //8
124 #define SLOT_AMP_BITS (DB2LIN_AMP_BITS)
125
126 /* Bits for envelope phase incremental counter */
127 #define EG_DP_BITS 22
128 #define EG_DP_WIDTH (1<<EG_DP_BITS)
129
130 /* Bits for Pitch and Amp modulator */
131 #define PM_PG_BITS 8
132 #define PM_PG_WIDTH (1<<PM_PG_BITS)
133 #define PM_DP_BITS 16
134 #define PM_DP_WIDTH (1<<PM_DP_BITS)
135 #define AM_PG_BITS 8
136 #define AM_PG_WIDTH (1<<AM_PG_BITS)
137 #define AM_DP_BITS 16
138 #define AM_DP_WIDTH (1<<AM_DP_BITS)
139
140 /* PM table is calcurated by PM_AMP * pow(2,PM_DEPTH*sin(x)/1200) */
141 #define PM_AMP_BITS 8
142 #define PM_AMP (1<<PM_AMP_BITS)
143
144 /* PM speed(Hz) and depth(cent) */
145 #define PM_SPEED 6.4
146 #define PM_DEPTH 13.75
147
148 /* AM speed(Hz) and depth(dB) */
149 #define AM_SPEED 3.6413
150 #define AM_DEPTH 4.875
151
152 /* Cut the lower b bit(s) off. */
153 #define HIGHBITS(c,b) ((c)>>(b))
154
155 /* Leave the lower b bit(s). */
156 #define LOWBITS(c,b) ((c)&((1<<(b))-1))
157
158 /* Expand x which is s bits to d bits. */
159 #define EXPAND_BITS(x,s,d) ((x)<<((d)-(s)))
160
161 /* Expand x which is s bits to d bits and fill expanded bits '1' */
162 #define EXPAND_BITS_X(x,s,d) (((x)<<((d)-(s)))|((1<<((d)-(s)))-1))
163
164 #define MOD(o,x) (&(o)->slot[(x)<<1])
165 #define CAR(o,x) (&(o)->slot[((x)<<1)|1])
166
167 #define BIT(s,b) (((s)>>(b))&1)
168
169 /* Input clock */
170 static uint32 clk = 844451141;
171
172 /* WaveTable for each envelope amp */
173 static uint32 fullsintable[PG_WIDTH];
174 static uint32 halfsintable[PG_WIDTH];
175
176 static uint32 *waveform[2] = { fullsintable, halfsintable };
177
178 /* LFO Table */
179 static int32 pmtable[PM_PG_WIDTH];
180 static int32 amtable[AM_PG_WIDTH];
181
182 /* Phase delta for LFO */
183 static uint32 pm_dphase;
184 static uint32 am_dphase;
185
186 /* dB to Liner table */
187 static int32 DB2LIN_TABLE[(DB_MUTE + DB_MUTE) * 2];
188
189 /* Liner to Log curve conversion table (for Attack rate). */
190 static uint32 AR_ADJUST_TABLE[1 << EG_BITS];
191
192 /* Empty voice data */
193 static EMU2413_PATCH null_patch = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
194
195 /* Basic voice Data */
196 static EMU2413_PATCH default_patch[EMU2413_TONE_NUM][(16 + 3) * 2];
197
198 /* Definition of envelope mode */
199 enum EMU2413_EG_STATE
200 { READY, ATTACK, DECAY, SUSHOLD, SUSTINE, RELEASE, SETTLE, FINISH };
201
202 /* Phase incr table for Attack */
203 static uint32 dphaseARTable[16][16];
204 /* Phase incr table for Decay and Release */
205 static uint32 dphaseDRTable[16][16];
206
207 /* KSL + TL Table */
208 static uint32 tllTable[16][8][1 << TL_BITS][4];
209 static int32 rksTable[2][8][2];
210
211 /* Phase incr table for PG */
212 static uint32 dphaseTable[512][8][16];
213
214 /***************************************************
215
216 Create tables
217
218 ****************************************************/
219 INLINE static int32
Min(int32 i,int32 j)220 Min (int32 i, int32 j)
221 {
222 if (i < j)
223 return i;
224 else
225 return j;
226 }
227
228 /* Table for AR to LogCurve. */
229 static void
makeAdjustTable(void)230 makeAdjustTable (void)
231 {
232 int32 i;
233
234 AR_ADJUST_TABLE[0] = (1 << EG_BITS) - 1;
235 for (i = 1; i < (1<<EG_BITS); i++)
236 AR_ADJUST_TABLE[i] = (uint32) ((double) (1<<EG_BITS)-1 - ((1<<EG_BITS)-1)*log(i)/log(127));
237 }
238
239
240 /* Table for dB(0 -- (1<<DB_BITS)-1) to Liner(0 -- DB2LIN_AMP_WIDTH) */
241 static void
makeDB2LinTable(void)242 makeDB2LinTable (void)
243 {
244 int32 i;
245
246 for (i = 0; i < DB_MUTE + DB_MUTE; i++)
247 {
248 DB2LIN_TABLE[i] = (int32) ((double) ((1 << DB2LIN_AMP_BITS) - 1) * pow (10, -(double) i * DB_STEP / 20));
249 if (i >= DB_MUTE) DB2LIN_TABLE[i] = 0;
250 DB2LIN_TABLE[i + DB_MUTE + DB_MUTE] = (int32) (-DB2LIN_TABLE[i]);
251 //printf("%d\n", DB2LIN_TABLE[i]);
252 }
253 }
254
255 /* Liner(+0.0 - +1.0) to dB((1<<DB_BITS) - 1 -- 0) */
lin2db(double d)256 static int32 lin2db (double d)
257 {
258 if (d == 0)
259 return (DB_MUTE - 1);
260 else
261 return Min (-(int32) (20.0 * log10 (d) / DB_STEP), DB_MUTE-1); /* 0 -- 127 */
262 }
263
264
265 /* Sin Table */
makeSinTable(void)266 static void makeSinTable (void)
267 {
268 int32 i;
269
270 for (i = 0; i < PG_WIDTH / 4; i++)
271 {
272 fullsintable[i] = (uint32) lin2db (sin (2.0 * PI * i / PG_WIDTH) );
273 }
274
275 for (i = 0; i < PG_WIDTH / 4; i++)
276 {
277 fullsintable[PG_WIDTH / 2 - 1 - i] = fullsintable[i];
278 }
279
280 for (i = 0; i < PG_WIDTH / 2; i++)
281 {
282 fullsintable[PG_WIDTH / 2 + i] = (uint32) (DB_MUTE + DB_MUTE + fullsintable[i]);
283 }
284
285 for (i = 0; i < PG_WIDTH / 2; i++)
286 halfsintable[i] = fullsintable[i];
287 for (i = PG_WIDTH / 2; i < PG_WIDTH; i++)
288 halfsintable[i] = fullsintable[0];
289 }
290
saw(double phase)291 static double saw(double phase)
292 {
293 if(phase <= PI/2)
294 return phase * 2 / PI ;
295 else if(phase <= PI*3/2)
296 return 2.0 - ( phase * 2 / PI );
297 else
298 return -4.0 + phase * 2 / PI;
299 }
300
301 /* Table for Pitch Modulator */
302 static void
makePmTable(void)303 makePmTable (void)
304 {
305 int32 i;
306
307 for (i = 0; i < PM_PG_WIDTH; i++)
308 /* pmtable[i] = (int32) ((double) PM_AMP * pow (2, (double) PM_DEPTH * sin (2.0 * PI * i / PM_PG_WIDTH) / 1200)); */
309 pmtable[i] = (int32) ((double) PM_AMP * pow (2, (double) PM_DEPTH * saw (2.0 * PI * i / PM_PG_WIDTH) / 1200));
310 }
311
312 /* Table for Amp Modulator */
313 static void
makeAmTable(void)314 makeAmTable (void)
315 {
316 int32 i;
317
318 for (i = 0; i < AM_PG_WIDTH; i++)
319 /* amtable[i] = (int32) ((double) AM_DEPTH / 2 / DB_STEP * (1.0 + sin (2.0 * PI * i / PM_PG_WIDTH))); */
320 amtable[i] = (int32) ((double) AM_DEPTH / 2 / DB_STEP * (1.0 + saw (2.0 * PI * i / PM_PG_WIDTH)));
321 }
322
323 /* Phase increment counter table */
324 static void
makeDphaseTable(void)325 makeDphaseTable (void)
326 {
327 uint32 fnum, block, ML;
328 uint32 mltable[16] =
329 { 1, 1 * 2, 2 * 2, 3 * 2, 4 * 2, 5 * 2, 6 * 2, 7 * 2, 8 * 2, 9 * 2, 10 * 2, 10 * 2, 12 * 2, 12 * 2, 15 * 2, 15 * 2 };
330
331 for (fnum = 0; fnum < 512; fnum++)
332 for (block = 0; block < 8; block++)
333 for (ML = 0; ML < 16; ML++)
334 dphaseTable[fnum][block][ML] = (((fnum * mltable[ML]) << block) >> (20 - DP_BITS));
335 }
336
337 static void
makeTllTable(void)338 makeTllTable (void)
339 {
340 #define dB2(x) ((x)*2)
341
342 static double kltable[16] = {
343 dB2 (0.000), dB2 (9.000), dB2 (12.000), dB2 (13.875), dB2 (15.000), dB2 (16.125), dB2 (16.875), dB2 (17.625),
344 dB2 (18.000), dB2 (18.750), dB2 (19.125), dB2 (19.500), dB2 (19.875), dB2 (20.250), dB2 (20.625), dB2 (21.000)
345 };
346
347 int32 tmp;
348 int32 fnum, block, TL, KL;
349
350 for (fnum = 0; fnum < 16; fnum++)
351 for (block = 0; block < 8; block++)
352 for (TL = 0; TL < 64; TL++)
353 for (KL = 0; KL < 4; KL++)
354 {
355 if (KL == 0)
356 {
357 tllTable[fnum][block][TL][KL] = TL2EG (TL);
358 }
359 else
360 {
361 tmp = (int32) (kltable[fnum] - dB2 (3.000) * (7 - block));
362 if (tmp <= 0)
363 tllTable[fnum][block][TL][KL] = TL2EG (TL);
364 else
365 tllTable[fnum][block][TL][KL] = (uint32) ((tmp >> (3 - KL)) / EG_STEP) + TL2EG (TL);
366 }
367 }
368 }
369
370 #ifdef USE_SPEC_ENV_SPEED
371 static double attacktime[16][4] = {
372 {0, 0, 0, 0},
373 {1730.15, 1400.60, 1153.43, 988.66},
374 {865.08, 700.30, 576.72, 494.33},
375 {432.54, 350.15, 288.36, 247.16},
376 {216.27, 175.07, 144.18, 123.58},
377 {108.13, 87.54, 72.09, 61.79},
378 {54.07, 43.77, 36.04, 30.90},
379 {27.03, 21.88, 18.02, 15.45},
380 {13.52, 10.94, 9.01, 7.72},
381 {6.76, 5.47, 4.51, 3.86},
382 {3.38, 2.74, 2.25, 1.93},
383 {1.69, 1.37, 1.13, 0.97},
384 {0.84, 0.70, 0.60, 0.54},
385 {0.50, 0.42, 0.34, 0.30},
386 {0.28, 0.22, 0.18, 0.14},
387 {0.00, 0.00, 0.00, 0.00}
388 };
389
390 static double decaytime[16][4] = {
391 {0, 0, 0, 0},
392 {20926.60, 16807.20, 14006.00, 12028.60},
393 {10463.30, 8403.58, 7002.98, 6014.32},
394 {5231.64, 4201.79, 3501.49, 3007.16},
395 {2615.82, 2100.89, 1750.75, 1503.58},
396 {1307.91, 1050.45, 875.37, 751.79},
397 {653.95, 525.22, 437.69, 375.90},
398 {326.98, 262.61, 218.84, 187.95},
399 {163.49, 131.31, 109.42, 93.97},
400 {81.74, 65.65, 54.71, 46.99},
401 {40.87, 32.83, 27.36, 23.49},
402 {20.44, 16.41, 13.68, 11.75},
403 {10.22, 8.21, 6.84, 5.87},
404 {5.11, 4.10, 3.42, 2.94},
405 {2.55, 2.05, 1.71, 1.47},
406 {1.27, 1.27, 1.27, 1.27}
407 };
408 #endif
409
410 /* Rate Table for Attack */
411 static void
makeDphaseARTable(void)412 makeDphaseARTable (void)
413 {
414 int32 AR, Rks, RM, RL;
415
416 #ifdef USE_SPEC_ENV_SPEED
417 uint32 attacktable[16][4];
418
419 for (RM = 0; RM < 16; RM++)
420 for (RL = 0; RL < 4; RL++)
421 {
422 if (RM == 0)
423 attacktable[RM][RL] = 0;
424 else if (RM == 15)
425 attacktable[RM][RL] = EG_DP_WIDTH;
426 else
427 attacktable[RM][RL] = (uint32) ((double) (1 << EG_DP_BITS) / (attacktime[RM][RL] * 3579545 / 72000));
428
429 }
430 #endif
431
432 for (AR = 0; AR < 16; AR++)
433 for (Rks = 0; Rks < 16; Rks++)
434 {
435 RM = AR + (Rks >> 2);
436 RL = Rks & 3;
437 if (RM > 15)
438 RM = 15;
439 switch (AR)
440 {
441 case 0:
442 dphaseARTable[AR][Rks] = 0;
443 break;
444 case 15:
445 dphaseARTable[AR][Rks] = 0;/*EG_DP_WIDTH;*/
446 break;
447 default:
448 #ifdef USE_SPEC_ENV_SPEED
449 dphaseARTable[AR][Rks] = (attacktable[RM][RL]);
450 #else
451 dphaseARTable[AR][Rks] = ((3 * (RL + 4) << (RM + 1)));
452 #endif
453 break;
454 }
455 }
456 }
457
458 /* Rate Table for Decay and Release */
459 static void
makeDphaseDRTable(void)460 makeDphaseDRTable (void)
461 {
462 int32 DR, Rks, RM, RL;
463
464 #ifdef USE_SPEC_ENV_SPEED
465 uint32 decaytable[16][4];
466
467 for (RM = 0; RM < 16; RM++)
468 for (RL = 0; RL < 4; RL++)
469 if (RM == 0)
470 decaytable[RM][RL] = 0;
471 else
472 decaytable[RM][RL] = (uint32) ((double) (1 << EG_DP_BITS) / (decaytime[RM][RL] * 3579545 / 72000));
473 #endif
474
475 for (DR = 0; DR < 16; DR++)
476 for (Rks = 0; Rks < 16; Rks++)
477 {
478 RM = DR + (Rks >> 2);
479 RL = Rks & 3;
480 if (RM > 15)
481 RM = 15;
482 switch (DR)
483 {
484 case 0:
485 dphaseDRTable[DR][Rks] = 0;
486 break;
487 default:
488 #ifdef USE_SPEC_ENV_SPEED
489 dphaseDRTable[DR][Rks] = (decaytable[RM][RL]);
490 #else
491 dphaseDRTable[DR][Rks] = ((RL + 4) << (RM - 1));
492 #endif
493 break;
494 }
495 }
496 }
497
498 static void
makeRksTable(void)499 makeRksTable (void)
500 {
501
502 int32 fnum8, block, KR;
503
504 for (fnum8 = 0; fnum8 < 2; fnum8++)
505 for (block = 0; block < 8; block++)
506 for (KR = 0; KR < 2; KR++)
507 {
508 if (KR != 0)
509 rksTable[fnum8][block][KR] = (block << 1) + fnum8;
510 else
511 rksTable[fnum8][block][KR] = block >> 1;
512 }
513 }
514
515 void
EMU2413_dump2patch(const uint8 * dump,EMU2413_PATCH * patch)516 EMU2413_dump2patch (const uint8 * dump, EMU2413_PATCH * patch)
517 {
518 patch[0].AM = (dump[0] >> 7) & 1;
519 patch[1].AM = (dump[1] >> 7) & 1;
520 patch[0].PM = (dump[0] >> 6) & 1;
521 patch[1].PM = (dump[1] >> 6) & 1;
522 patch[0].EG = (dump[0] >> 5) & 1;
523 patch[1].EG = (dump[1] >> 5) & 1;
524 patch[0].KR = (dump[0] >> 4) & 1;
525 patch[1].KR = (dump[1] >> 4) & 1;
526 patch[0].ML = (dump[0]) & 15;
527 patch[1].ML = (dump[1]) & 15;
528 patch[0].KL = (dump[2] >> 6) & 3;
529 patch[1].KL = (dump[3] >> 6) & 3;
530 patch[0].TL = (dump[2]) & 63;
531 patch[0].FB = (dump[3]) & 7;
532 patch[0].WF = (dump[3] >> 3) & 1;
533 patch[1].WF = (dump[3] >> 4) & 1;
534 patch[0].AR = (dump[4] >> 4) & 15;
535 patch[1].AR = (dump[5] >> 4) & 15;
536 patch[0].DR = (dump[4]) & 15;
537 patch[1].DR = (dump[5]) & 15;
538 patch[0].SL = (dump[6] >> 4) & 15;
539 patch[1].SL = (dump[7] >> 4) & 15;
540 patch[0].RR = (dump[6]) & 15;
541 patch[1].RR = (dump[7]) & 15;
542 }
543
544 void
EMU2413_getDefaultPatch(int32 type,int32 num,EMU2413_PATCH * patch)545 EMU2413_getDefaultPatch (int32 type, int32 num, EMU2413_PATCH * patch)
546 {
547 EMU2413_dump2patch (default_inst[type] + num * 16, patch);
548 }
549
550 static void
makeDefaultPatch()551 makeDefaultPatch ()
552 {
553 int32 i, j;
554
555 for (i = 0; i < EMU2413_TONE_NUM; i++)
556 for (j = 0; j < 19; j++)
557 EMU2413_getDefaultPatch (i, j, &default_patch[i][j * 2]);
558
559 }
560
561 void
EMU2413_setPatch(EMU2413 * opll,const uint8 * dump)562 EMU2413_setPatch (EMU2413 * opll, const uint8 * dump)
563 {
564 EMU2413_PATCH patch[2];
565 int i;
566
567 for (i = 0; i < 19; i++)
568 {
569 EMU2413_dump2patch (dump + i * 16, patch);
570 memcpy (&opll->patch[i*2+0], &patch[0], sizeof (EMU2413_PATCH));
571 memcpy (&opll->patch[i*2+1], &patch[1], sizeof (EMU2413_PATCH));
572 }
573 }
574
575 void
EMU2413_patch2dump(const EMU2413_PATCH * patch,uint8 * dump)576 EMU2413_patch2dump (const EMU2413_PATCH * patch, uint8 * dump)
577 {
578 dump[0] = (uint8) ((patch[0].AM << 7) + (patch[0].PM << 6) + (patch[0].EG << 5) + (patch[0].KR << 4) + patch[0].ML);
579 dump[1] = (uint8) ((patch[1].AM << 7) + (patch[1].PM << 6) + (patch[1].EG << 5) + (patch[1].KR << 4) + patch[1].ML);
580 dump[2] = (uint8) ((patch[0].KL << 6) + patch[0].TL);
581 dump[3] = (uint8) ((patch[1].KL << 6) + (patch[1].WF << 4) + (patch[0].WF << 3) + patch[0].FB);
582 dump[4] = (uint8) ((patch[0].AR << 4) + patch[0].DR);
583 dump[5] = (uint8) ((patch[1].AR << 4) + patch[1].DR);
584 dump[6] = (uint8) ((patch[0].SL << 4) + patch[0].RR);
585 dump[7] = (uint8) ((patch[1].SL << 4) + patch[1].RR);
586 dump[8] = 0;
587 dump[9] = 0;
588 dump[10] = 0;
589 dump[11] = 0;
590 dump[12] = 0;
591 dump[13] = 0;
592 dump[14] = 0;
593 dump[15] = 0;
594 }
595
596 /************************************************************
597
598 Calc Parameters
599
600 ************************************************************/
601
602 INLINE static uint32
calc_eg_dphase(EMU2413_SLOT * slot)603 calc_eg_dphase (EMU2413_SLOT * slot)
604 {
605
606 switch (slot->eg_mode)
607 {
608 case ATTACK:
609 return dphaseARTable[slot->patch->AR][slot->rks];
610
611 case DECAY:
612 return dphaseDRTable[slot->patch->DR][slot->rks];
613
614 case SUSHOLD:
615 return 0;
616
617 case SUSTINE:
618 return dphaseDRTable[slot->patch->RR][slot->rks];
619
620 case RELEASE:
621 if (slot->sustine)
622 return dphaseDRTable[5][slot->rks];
623 else if (slot->patch->EG)
624 return dphaseDRTable[slot->patch->RR][slot->rks];
625 else
626 return dphaseDRTable[7][slot->rks];
627
628 case SETTLE:
629 return dphaseDRTable[15][0];
630
631 case FINISH:
632 return 0;
633
634 default:
635 return 0;
636 }
637 }
638
639 /*************************************************************
640
641 EMU2413 internal interfaces
642
643 *************************************************************/
644 #define SLOT_BD1 12
645 #define SLOT_BD2 13
646 #define SLOT_HH 14
647 #define SLOT_SD 15
648 #define SLOT_TOM 16
649 #define SLOT_CYM 17
650
651 #define UPDATE_PG(S) (S)->dphase = dphaseTable[(S)->fnum][(S)->block][(S)->patch->ML]
652 #define UPDATE_TLL(S)\
653 (((S)->type==0)?\
654 ((S)->tll = tllTable[((S)->fnum)>>5][(S)->block][(S)->patch->TL][(S)->patch->KL]):\
655 ((S)->tll = tllTable[((S)->fnum)>>5][(S)->block][(S)->volume][(S)->patch->KL]))
656 #define UPDATE_RKS(S) (S)->rks = rksTable[((S)->fnum)>>8][(S)->block][(S)->patch->KR]
657 #define UPDATE_WF(S) (S)->sintbl = waveform[(S)->patch->WF]
658 #define UPDATE_EG(S) (S)->eg_dphase = calc_eg_dphase(S)
659 #define UPDATE_ALL(S)\
660 UPDATE_PG(S);\
661 UPDATE_TLL(S);\
662 UPDATE_RKS(S);\
663 UPDATE_WF(S); \
664 UPDATE_EG(S) /* EG should be updated last. */
665
666
667 /* Slot key on */
668 INLINE static void
slotOn(EMU2413_SLOT * slot)669 slotOn (EMU2413_SLOT * slot)
670 {
671 slot->eg_mode = ATTACK;
672 slot->eg_phase = 0;
673 slot->phase = 0;
674 UPDATE_EG(slot);
675 }
676
677 /* Slot key on without reseting the phase */
678 INLINE static void
slotOn2(EMU2413_SLOT * slot)679 slotOn2 (EMU2413_SLOT * slot)
680 {
681 slot->eg_mode = ATTACK;
682 slot->eg_phase = 0;
683 UPDATE_EG(slot);
684 }
685
686 /* Slot key off */
687 INLINE static void
slotOff(EMU2413_SLOT * slot)688 slotOff (EMU2413_SLOT * slot)
689 {
690 if (slot->eg_mode == ATTACK)
691 slot->eg_phase = EXPAND_BITS (AR_ADJUST_TABLE[HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS)], EG_BITS, EG_DP_BITS);
692 slot->eg_mode = RELEASE;
693 UPDATE_EG(slot);
694 }
695
696 /* Channel key on */
697 INLINE static void
keyOn(EMU2413 * opll,int32 i)698 keyOn (EMU2413 * opll, int32 i)
699 {
700 if (!opll->slot_on_flag[i * 2])
701 slotOn (MOD(opll,i));
702 if (!opll->slot_on_flag[i * 2 + 1])
703 slotOn (CAR(opll,i));
704 opll->key_status[i] = 1;
705 }
706
707 /* Channel key off */
708 INLINE static void
keyOff(EMU2413 * opll,int32 i)709 keyOff (EMU2413 * opll, int32 i)
710 {
711 if (opll->slot_on_flag[i * 2 + 1])
712 slotOff (CAR(opll,i));
713 opll->key_status[i] = 0;
714 }
715
716 INLINE static void
keyOn_BD(EMU2413 * opll)717 keyOn_BD (EMU2413 * opll)
718 {
719 keyOn (opll, 6);
720 }
721 INLINE static void
keyOn_SD(EMU2413 * opll)722 keyOn_SD (EMU2413 * opll)
723 {
724 if (!opll->slot_on_flag[SLOT_SD])
725 slotOn (CAR(opll,7));
726 }
727 INLINE static void
keyOn_TOM(EMU2413 * opll)728 keyOn_TOM (EMU2413 * opll)
729 {
730 if (!opll->slot_on_flag[SLOT_TOM])
731 slotOn (MOD(opll,8));
732 }
733 INLINE static void
keyOn_HH(EMU2413 * opll)734 keyOn_HH (EMU2413 * opll)
735 {
736 if (!opll->slot_on_flag[SLOT_HH])
737 slotOn2 (MOD(opll,7));
738 }
739 INLINE static void
keyOn_CYM(EMU2413 * opll)740 keyOn_CYM (EMU2413 * opll)
741 {
742 if (!opll->slot_on_flag[SLOT_CYM]) {
743 slotOn2 (CAR(opll,8));
744 }
745 }
746
747 /* Drum key off */
748 INLINE static void
keyOff_BD(EMU2413 * opll)749 keyOff_BD (EMU2413 * opll)
750 {
751 keyOff (opll, 6);
752 }
753 INLINE static void
keyOff_SD(EMU2413 * opll)754 keyOff_SD (EMU2413 * opll)
755 {
756 if (opll->slot_on_flag[SLOT_SD])
757 slotOff (CAR(opll,7));
758 }
759 INLINE static void
keyOff_TOM(EMU2413 * opll)760 keyOff_TOM (EMU2413 * opll)
761 {
762 if (opll->slot_on_flag[SLOT_TOM])
763 slotOff (MOD(opll,8));
764 }
765 INLINE static void
keyOff_HH(EMU2413 * opll)766 keyOff_HH (EMU2413 * opll)
767 {
768 if (opll->slot_on_flag[SLOT_HH])
769 slotOff (MOD(opll,7));
770 }
771 INLINE static void
keyOff_CYM(EMU2413 * opll)772 keyOff_CYM (EMU2413 * opll)
773 {
774 if (opll->slot_on_flag[SLOT_CYM]) {
775 CAR(opll,8)->sustine = 1;
776 slotOff (CAR(opll,8));
777 }
778 }
779
780 /* Change a voice */
781 INLINE static void
setPatch(EMU2413 * opll,int32 i,int32 num)782 setPatch (EMU2413 * opll, int32 i, int32 num)
783 {
784 opll->patch_number[i] = num;
785 MOD(opll,i)->patch = &opll->patch[num * 2 + 0];
786 CAR(opll,i)->patch = &opll->patch[num * 2 + 1];
787 }
788
789 /* Change a rhythm voice */
790 INLINE static void
setSlotPatch(EMU2413_SLOT * slot,EMU2413_PATCH * patch)791 setSlotPatch (EMU2413_SLOT * slot, EMU2413_PATCH * patch)
792 {
793 slot->patch = patch;
794 }
795
796 /* Set sustine parameter */
797 INLINE static void
setSustine(EMU2413 * opll,int32 c,int32 sustine)798 setSustine (EMU2413 * opll, int32 c, int32 sustine)
799 {
800 CAR(opll,c)->sustine = sustine;
801 if (MOD(opll,c)->type)
802 MOD(opll,c)->sustine = sustine;
803 }
804
805 /* Volume : 6bit ( Volume register << 2 ) */
806 INLINE static void
setVolume(EMU2413 * opll,int32 c,int32 volume)807 setVolume (EMU2413 * opll, int32 c, int32 volume)
808 {
809 CAR(opll,c)->volume = volume;
810 }
811
812 INLINE static void
setSlotVolume(EMU2413_SLOT * slot,int32 volume)813 setSlotVolume (EMU2413_SLOT * slot, int32 volume)
814 {
815 slot->volume = volume;
816 }
817
818 /* Set F-Number ( fnum : 9bit ) */
819 INLINE static void
setFnumber(EMU2413 * opll,int32 c,int32 fnum)820 setFnumber (EMU2413 * opll, int32 c, int32 fnum)
821 {
822 CAR(opll,c)->fnum = fnum;
823 MOD(opll,c)->fnum = fnum;
824 }
825
826 /* Set Block data (block : 3bit ) */
827 INLINE static void
setBlock(EMU2413 * opll,int32 c,int32 block)828 setBlock (EMU2413 * opll, int32 c, int32 block)
829 {
830 CAR(opll,c)->block = block;
831 MOD(opll,c)->block = block;
832 }
833
834 /* Change Rhythm Mode */
835 INLINE static void
update_rhythm_mode(EMU2413 * opll)836 update_rhythm_mode (EMU2413 * opll)
837 {
838 if (opll->patch_number[6] & 0x10)
839 {
840 if (!(opll->slot_on_flag[SLOT_BD2] | (opll->reg[0x0e] & 32)))
841 {
842 opll->slot[SLOT_BD1].eg_mode = FINISH;
843 opll->slot[SLOT_BD2].eg_mode = FINISH;
844 setPatch (opll, 6, opll->reg[0x36] >> 4);
845 }
846 }
847 else if (opll->reg[0x0e] & 32)
848 {
849 opll->patch_number[6] = 16;
850 opll->slot[SLOT_BD1].eg_mode = FINISH;
851 opll->slot[SLOT_BD2].eg_mode = FINISH;
852 setSlotPatch (&opll->slot[SLOT_BD1], &opll->patch[16 * 2 + 0]);
853 setSlotPatch (&opll->slot[SLOT_BD2], &opll->patch[16 * 2 + 1]);
854 }
855
856 if (opll->patch_number[7] & 0x10)
857 {
858 if (!((opll->slot_on_flag[SLOT_HH] && opll->slot_on_flag[SLOT_SD]) | (opll->reg[0x0e] & 32)))
859 {
860 opll->slot[SLOT_HH].type = 0;
861 opll->slot[SLOT_HH].eg_mode = FINISH;
862 opll->slot[SLOT_SD].eg_mode = FINISH;
863 setPatch (opll, 7, opll->reg[0x37] >> 4);
864 }
865 }
866 else if (opll->reg[0x0e] & 32)
867 {
868 opll->patch_number[7] = 17;
869 opll->slot[SLOT_HH].type = 1;
870 opll->slot[SLOT_HH].eg_mode = FINISH;
871 opll->slot[SLOT_SD].eg_mode = FINISH;
872 setSlotPatch (&opll->slot[SLOT_HH], &opll->patch[17 * 2 + 0]);
873 setSlotPatch (&opll->slot[SLOT_SD], &opll->patch[17 * 2 + 1]);
874 }
875
876 if (opll->patch_number[8] & 0x10)
877 {
878 if (!((opll->slot_on_flag[SLOT_CYM] && opll->slot_on_flag[SLOT_TOM]) | (opll->reg[0x0e] & 32)))
879 {
880 opll->slot[SLOT_TOM].type = 0;
881 opll->slot[SLOT_TOM].eg_mode = FINISH;
882 opll->slot[SLOT_CYM].eg_mode = FINISH;
883 setPatch (opll, 8, opll->reg[0x38] >> 4);
884 }
885 }
886 else if (opll->reg[0x0e] & 32)
887 {
888 opll->patch_number[8] = 18;
889 opll->slot[SLOT_TOM].type = 1;
890 opll->slot[SLOT_TOM].eg_mode = FINISH;
891 opll->slot[SLOT_CYM].eg_mode = FINISH;
892 setSlotPatch (&opll->slot[SLOT_TOM], &opll->patch[18 * 2 + 0]);
893 setSlotPatch (&opll->slot[SLOT_CYM], &opll->patch[18 * 2 + 1]);
894 }
895 }
896
897 INLINE static void
update_key_status(EMU2413 * opll)898 update_key_status (EMU2413 * opll)
899 {
900 int ch;
901
902 for (ch = 0; ch < 9; ch++)
903 opll->slot_on_flag[ch * 2] = opll->slot_on_flag[ch * 2 + 1] = (opll->reg[0x20 + ch]) & 0x10;
904
905 if (opll->reg[0x0e] & 32)
906 {
907 opll->slot_on_flag[SLOT_BD1] |= (opll->reg[0x0e] & 0x10);
908 opll->slot_on_flag[SLOT_BD2] |= (opll->reg[0x0e] & 0x10);
909 opll->slot_on_flag[SLOT_SD] |= (opll->reg[0x0e] & 0x08);
910 opll->slot_on_flag[SLOT_HH] |= (opll->reg[0x0e] & 0x01);
911 opll->slot_on_flag[SLOT_TOM] |= (opll->reg[0x0e] & 0x04);
912 opll->slot_on_flag[SLOT_CYM] |= (opll->reg[0x0e] & 0x02);
913 }
914 }
915
916 void
EMU2413_copyPatch(EMU2413 * opll,int32 num,EMU2413_PATCH * patch)917 EMU2413_copyPatch (EMU2413 * opll, int32 num, EMU2413_PATCH * patch)
918 {
919 memcpy (&opll->patch[num], patch, sizeof (EMU2413_PATCH));
920 }
921
922 /***********************************************************
923
924 Initializing
925
926 ***********************************************************/
927
928 static void
EMU2413_SLOT_reset(EMU2413_SLOT * slot,int type)929 EMU2413_SLOT_reset (EMU2413_SLOT * slot, int type)
930 {
931 slot->type = type;
932 slot->sintbl = waveform[0];
933 slot->phase = 0;
934 slot->dphase = 0;
935 slot->output[0] = 0;
936 slot->output[1] = 0;
937 slot->feedback = 0;
938 slot->eg_mode = FINISH;
939 slot->eg_phase = EG_DP_WIDTH;
940 slot->eg_dphase = 0;
941 slot->rks = 0;
942 slot->tll = 0;
943 slot->sustine = 0;
944 slot->fnum = 0;
945 slot->block = 0;
946 slot->volume = 0;
947 slot->pgout = 0;
948 slot->egout = 0;
949 slot->patch = &null_patch;
950 }
951
952 static void
internal_refresh(void)953 internal_refresh (void)
954 {
955 makeDphaseTable ();
956 makeDphaseARTable ();
957 makeDphaseDRTable ();
958 pm_dphase = (uint32) (PM_SPEED * PM_DP_WIDTH / (clk / 72));
959 am_dphase = (uint32) (AM_SPEED * AM_DP_WIDTH / (clk / 72));
960 }
961
maketables(uint32 c)962 static void maketables (uint32 c)
963 {
964 if (c != clk)
965 {
966 clk = c;
967 makePmTable ();
968 makeAmTable ();
969 makeDB2LinTable ();
970 makeAdjustTable ();
971 makeTllTable ();
972 makeRksTable ();
973 makeSinTable ();
974 makeDefaultPatch ();
975 }
976 internal_refresh ();
977 }
978
EMU2413_new(uint32 new_clk)979 EMU2413 *EMU2413_new (uint32 new_clk)
980 {
981 EMU2413 *opll;
982 int32 i;
983
984 maketables (new_clk);
985
986 opll = (EMU2413 *) calloc (sizeof (EMU2413), 1);
987 if (opll == NULL)
988 return NULL;
989
990 for (i = 0; i < 19 * 2; i++)
991 memcpy(&opll->patch[i],&null_patch,sizeof(EMU2413_PATCH));
992
993 opll->mask = 0;
994
995 EMU2413_reset (opll);
996 EMU2413_reset_patch (opll, 0);
997
998 return opll;
999 }
1000
1001
1002 void
EMU2413_delete(EMU2413 * opll)1003 EMU2413_delete (EMU2413 * opll)
1004 {
1005 free (opll);
1006 }
1007
1008
1009 /* Reset patch datas by system default. */
1010 void
EMU2413_reset_patch(EMU2413 * opll,int32 type)1011 EMU2413_reset_patch (EMU2413 * opll, int32 type)
1012 {
1013 int32 i;
1014
1015 for (i = 0; i < 19 * 2; i++)
1016 EMU2413_copyPatch (opll, i, &default_patch[type % EMU2413_TONE_NUM][i]);
1017 }
1018
1019 /* Reset whole of EMU2413 except patch datas. */
1020 void
EMU2413_reset(EMU2413 * opll)1021 EMU2413_reset (EMU2413 * opll)
1022 {
1023 int32 i;
1024
1025 if (!opll)
1026 return;
1027
1028 opll->adr = 0;
1029 opll->out = 0;
1030
1031 opll->pm_phase = 0;
1032 opll->am_phase = 0;
1033
1034 opll->noise_seed = 0xffff;
1035 opll->mask = 0;
1036
1037 for (i = 0; i <18; i++)
1038 EMU2413_SLOT_reset(&opll->slot[i], i%2);
1039
1040 for (i = 0; i < 9; i++)
1041 {
1042 opll->key_status[i] = 0;
1043 setPatch (opll, i, 0);
1044 }
1045
1046 for (i = 0; i < 0x40; i++)
1047 EMU2413_writeReg (opll, i, 0);
1048 }
1049
1050 /* Force Refresh (When external program changes some parameters). */
EMU2413_forceRefresh(EMU2413 * opll)1051 void EMU2413_forceRefresh (EMU2413 * opll)
1052 {
1053 int32 i;
1054
1055 if (opll == NULL)
1056 return;
1057
1058 for (i = 0; i < 9; i++)
1059 setPatch(opll,i,opll->patch_number[i]);
1060
1061 for (i = 0; i < 18; i++)
1062 {
1063 UPDATE_PG (&opll->slot[i]);
1064 UPDATE_RKS (&opll->slot[i]);
1065 UPDATE_TLL (&opll->slot[i]);
1066 UPDATE_WF (&opll->slot[i]);
1067 UPDATE_EG (&opll->slot[i]);
1068 }
1069 }
1070
1071 /*********************************************************
1072
1073 Generate wave data
1074
1075 *********************************************************/
1076 /* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 2PI). */
1077 #if ( SLOT_AMP_BITS - PG_BITS ) > 0
1078 #define wave2_2pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS ))
1079 #else
1080 #define wave2_2pi(e) ( (e) << ( PG_BITS - SLOT_AMP_BITS ))
1081 #endif
1082
1083 /* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 4PI). */
1084 #if ( SLOT_AMP_BITS - PG_BITS - 1 ) == 0
1085 #define wave2_4pi(e) (e)
1086 #elif ( SLOT_AMP_BITS - PG_BITS - 1 ) > 0
1087 #define wave2_4pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS - 1 ))
1088 #else
1089 #define wave2_4pi(e) ( (e) << ( 1 + PG_BITS - SLOT_AMP_BITS ))
1090 #endif
1091
1092 /* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 8PI). */
1093 #if ( SLOT_AMP_BITS - PG_BITS - 2 ) == 0
1094 #define wave2_8pi(e) (e)
1095 #elif ( SLOT_AMP_BITS - PG_BITS - 2 ) > 0
1096 #define wave2_8pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS - 2 ))
1097 #else
1098 #define wave2_8pi(e) ( (e) << ( 2 + PG_BITS - SLOT_AMP_BITS ))
1099 #endif
1100
1101 /* Update AM, PM unit */
1102 static void
update_ampm(EMU2413 * opll)1103 update_ampm (EMU2413 * opll)
1104 {
1105 opll->pm_phase = (opll->pm_phase + pm_dphase) & (PM_DP_WIDTH - 1);
1106 opll->am_phase = (opll->am_phase + am_dphase) & (AM_DP_WIDTH - 1);
1107 opll->lfo_am = amtable[HIGHBITS (opll->am_phase, AM_DP_BITS - AM_PG_BITS)];
1108 opll->lfo_pm = pmtable[HIGHBITS (opll->pm_phase, PM_DP_BITS - PM_PG_BITS)];
1109 }
1110
1111 /* PG */
calc_phase(EMU2413_SLOT * slot,int32 lfo)1112 INLINE static void calc_phase (EMU2413_SLOT * slot, int32 lfo)
1113 {
1114 if (slot->patch->PM)
1115 slot->phase += (slot->dphase * lfo) >> PM_AMP_BITS;
1116 else
1117 slot->phase += slot->dphase;
1118
1119 slot->phase &= (DP_WIDTH - 1);
1120
1121 slot->pgout = HIGHBITS (slot->phase, DP_BASE_BITS);
1122 }
1123
1124 /* Update Noise unit */
1125 static void
update_noise(EMU2413 * opll)1126 update_noise (EMU2413 * opll)
1127 {
1128 if(opll->noise_seed&1) opll->noise_seed ^= 0x8003020;
1129 opll->noise_seed >>= 1;
1130 }
1131
1132 /* EG */
1133 static void
calc_envelope(EMU2413_SLOT * slot,int32 lfo)1134 calc_envelope (EMU2413_SLOT * slot, int32 lfo)
1135 {
1136 #define S2E(x) (SL2EG((int32)(x/SL_STEP))<<(EG_DP_BITS-EG_BITS))
1137
1138 static uint32 SL[16] = {
1139 S2E (0.0), S2E (3.0), S2E (6.0), S2E (9.0), S2E (12.0), S2E (15.0), S2E (18.0), S2E (21.0),
1140 S2E (24.0), S2E (27.0), S2E (30.0), S2E (33.0), S2E (36.0), S2E (39.0), S2E (42.0), S2E (48.0)
1141 };
1142
1143 uint32 egout;
1144
1145 switch (slot->eg_mode)
1146 {
1147 case ATTACK:
1148 egout = AR_ADJUST_TABLE[HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS)];
1149 slot->eg_phase += slot->eg_dphase;
1150 if((EG_DP_WIDTH & slot->eg_phase)||(slot->patch->AR==15))
1151 {
1152 egout = 0;
1153 slot->eg_phase = 0;
1154 slot->eg_mode = DECAY;
1155 UPDATE_EG (slot);
1156 }
1157 break;
1158
1159 case DECAY:
1160 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
1161 slot->eg_phase += slot->eg_dphase;
1162 if (slot->eg_phase >= SL[slot->patch->SL])
1163 {
1164 if (slot->patch->EG)
1165 {
1166 slot->eg_phase = SL[slot->patch->SL];
1167 slot->eg_mode = SUSHOLD;
1168 UPDATE_EG (slot);
1169 }
1170 else
1171 {
1172 slot->eg_phase = SL[slot->patch->SL];
1173 slot->eg_mode = SUSTINE;
1174 UPDATE_EG (slot);
1175 }
1176 }
1177 break;
1178
1179 case SUSHOLD:
1180 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
1181 if (slot->patch->EG == 0)
1182 {
1183 slot->eg_mode = SUSTINE;
1184 UPDATE_EG (slot);
1185 }
1186 break;
1187
1188 case SUSTINE:
1189 case RELEASE:
1190 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
1191 slot->eg_phase += slot->eg_dphase;
1192 if (egout >= (1 << EG_BITS))
1193 {
1194 slot->eg_mode = FINISH;
1195 egout = (1 << EG_BITS) - 1;
1196 }
1197 break;
1198
1199 case SETTLE:
1200 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
1201 slot->eg_phase += slot->eg_dphase;
1202 if (egout >= (1 << EG_BITS))
1203 {
1204 slot->eg_mode = ATTACK;
1205 egout = (1 << EG_BITS) - 1;
1206 UPDATE_EG(slot);
1207 }
1208 break;
1209
1210 case FINISH:
1211 egout = (1 << EG_BITS) - 1;
1212 break;
1213
1214 default:
1215 egout = (1 << EG_BITS) - 1;
1216 break;
1217 }
1218
1219 if (slot->patch->AM)
1220 egout = EG2DB (egout + slot->tll) + lfo;
1221 else
1222 egout = EG2DB (egout + slot->tll);
1223
1224 if (egout >= DB_MUTE)
1225 egout = DB_MUTE - 1;
1226
1227 slot->egout = egout | 3;
1228 }
1229
1230 /* CARRIOR */
calc_slot_car(EMU2413_SLOT * slot,int32 fm)1231 INLINE static int32 calc_slot_car (EMU2413_SLOT * slot, int32 fm)
1232 {
1233 if (slot->egout >= (DB_MUTE - 1))
1234 {
1235 slot->output[0] = 0;
1236 }
1237 else
1238 {
1239 slot->output[0] = DB2LIN_TABLE[slot->sintbl[(slot->pgout+wave2_8pi(fm))&(PG_WIDTH-1)] + slot->egout];
1240 }
1241
1242 slot->output[1] = (slot->output[1] + slot->output[0]) >> 1;
1243 return slot->output[1];
1244 }
1245
1246 /* MODULATOR */
calc_slot_mod(EMU2413_SLOT * slot)1247 INLINE static int32 calc_slot_mod (EMU2413_SLOT * slot)
1248 {
1249 int32 fm;
1250
1251 slot->output[1] = slot->output[0];
1252
1253 if (slot->egout >= (DB_MUTE - 1))
1254 {
1255 slot->output[0] = 0;
1256 }
1257 else if (slot->patch->FB != 0)
1258 {
1259 fm = wave2_4pi (slot->feedback) >> (7 - slot->patch->FB);
1260 slot->output[0] = DB2LIN_TABLE[slot->sintbl[(slot->pgout+fm)&(PG_WIDTH-1)] + slot->egout];
1261 }
1262 else
1263 {
1264 slot->output[0] = DB2LIN_TABLE[slot->sintbl[slot->pgout] + slot->egout];
1265 }
1266
1267 slot->feedback = (slot->output[1] + slot->output[0]) >> 1;
1268
1269 return slot->feedback;
1270
1271 }
1272
1273 /* TOM */
calc_slot_tom(EMU2413_SLOT * slot)1274 INLINE static int32 calc_slot_tom (EMU2413_SLOT * slot)
1275 {
1276 if (slot->egout >= (DB_MUTE - 1))
1277 return 0;
1278
1279 return DB2LIN_TABLE[slot->sintbl[slot->pgout] + slot->egout];
1280
1281 }
1282
1283 /* SNARE */
calc_slot_snare(EMU2413_SLOT * slot,uint32 noise)1284 INLINE static int32 calc_slot_snare (EMU2413_SLOT * slot, uint32 noise)
1285 {
1286 if(slot->egout>=(DB_MUTE-1))
1287 return 0;
1288
1289 if(BIT(slot->pgout,7))
1290 return DB2LIN_TABLE[(noise?DB_POS(0.0):DB_POS(15.0))+slot->egout];
1291 else
1292 return DB2LIN_TABLE[(noise?DB_NEG(0.0):DB_NEG(15.0))+slot->egout];
1293 }
1294
1295 /*
1296 TOP-CYM
1297 */
calc_slot_cym(EMU2413_SLOT * slot,uint32 pgout_hh)1298 INLINE static int32 calc_slot_cym (EMU2413_SLOT * slot, uint32 pgout_hh)
1299 {
1300 uint32 dbout;
1301
1302 if (slot->egout >= (DB_MUTE - 1))
1303 return 0;
1304 else if(
1305 /* the same as fmopl.c */
1306 ((BIT(pgout_hh,PG_BITS-8)^BIT(pgout_hh,PG_BITS-1))|BIT(pgout_hh,PG_BITS-7)) ^
1307 /* different from fmopl.c */
1308 (BIT(slot->pgout,PG_BITS-7)&!BIT(slot->pgout,PG_BITS-5))
1309 )
1310 dbout = DB_NEG(3.0);
1311 else
1312 dbout = DB_POS(3.0);
1313
1314 return DB2LIN_TABLE[dbout + slot->egout];
1315 }
1316
1317 /*
1318 HI-HAT
1319 */
calc_slot_hat(EMU2413_SLOT * slot,int32 pgout_cym,uint32 noise)1320 INLINE static int32 calc_slot_hat (EMU2413_SLOT *slot, int32 pgout_cym, uint32 noise)
1321 {
1322 uint32 dbout;
1323
1324 if (slot->egout >= (DB_MUTE - 1))
1325 return 0;
1326 else if(
1327 /* the same as fmopl.c */
1328 ((BIT(slot->pgout,PG_BITS-8)^BIT(slot->pgout,PG_BITS-1))|BIT(slot->pgout,PG_BITS-7)) ^
1329 /* different from fmopl.c */
1330 (BIT(pgout_cym,PG_BITS-7)&!BIT(pgout_cym,PG_BITS-5))
1331 )
1332 {
1333 if(noise)
1334 dbout = DB_NEG(12.0);
1335 else
1336 dbout = DB_NEG(24.0);
1337 }
1338 else
1339 {
1340 if(noise)
1341 dbout = DB_POS(12.0);
1342 else
1343 dbout = DB_POS(24.0);
1344 }
1345
1346 return DB2LIN_TABLE[dbout + slot->egout];
1347 }
1348
calc(EMU2413 * opll)1349 static int32 calc (EMU2413 * opll)
1350 {
1351 int32 inst = 0, perc = 0, out = 0;
1352 int32 i;
1353
1354 update_ampm (opll);
1355 update_noise (opll);
1356
1357 for (i = 0; i < 18; i++)
1358 {
1359 calc_phase(&opll->slot[i],opll->lfo_pm);
1360 calc_envelope(&opll->slot[i],opll->lfo_am);
1361 }
1362
1363 for (i = 0; i < 6; i++)
1364 if (!(opll->mask & EMU2413_MASK_CH (i)) && (CAR(opll,i)->eg_mode != FINISH))
1365 inst += calc_slot_car (CAR(opll,i), calc_slot_mod(MOD(opll,i)));
1366
1367 /* CH6 */
1368 if (opll->patch_number[6] <= 15)
1369 {
1370 if (!(opll->mask & EMU2413_MASK_CH (6)) && (CAR(opll,6)->eg_mode != FINISH))
1371 inst += calc_slot_car (CAR(opll,6), calc_slot_mod(MOD(opll,6)));
1372 }
1373 else
1374 {
1375 if (!(opll->mask & EMU2413_MASK_BD) && (CAR(opll,6)->eg_mode != FINISH))
1376 perc += calc_slot_car (CAR(opll,6), calc_slot_mod(MOD(opll,6)));
1377 }
1378
1379 /* CH7 */
1380 if (opll->patch_number[7] <= 15)
1381 {
1382 if (!(opll->mask & EMU2413_MASK_CH (7)) && (CAR(opll,7)->eg_mode != FINISH))
1383 inst += calc_slot_car (CAR(opll,7), calc_slot_mod(MOD(opll,7)));
1384 }
1385 else
1386 {
1387 if (!(opll->mask & EMU2413_MASK_HH) && (MOD(opll,7)->eg_mode != FINISH))
1388 perc += calc_slot_hat (MOD(opll,7), CAR(opll,8)->pgout, opll->noise_seed&1);
1389 if (!(opll->mask & EMU2413_MASK_SD) && (CAR(opll,7)->eg_mode != FINISH))
1390 perc -= calc_slot_snare (CAR(opll,7), opll->noise_seed&1);
1391 }
1392
1393 /* CH8 */
1394 if (opll->patch_number[8] <= 15)
1395 {
1396 if (!(opll->mask & EMU2413_MASK_CH(8)) && (CAR(opll,8)->eg_mode != FINISH))
1397 inst += calc_slot_car (CAR(opll,8), calc_slot_mod (MOD(opll,8)));
1398 }
1399 else
1400 {
1401 if (!(opll->mask & EMU2413_MASK_TOM) && (MOD(opll,8)->eg_mode != FINISH))
1402 perc += calc_slot_tom (MOD(opll,8));
1403 if (!(opll->mask & EMU2413_MASK_CYM) && (CAR(opll,8)->eg_mode != FINISH))
1404 perc -= calc_slot_cym (CAR(opll,8), MOD(opll,7)->pgout);
1405 }
1406
1407 out = inst + (perc << 1);
1408 return (int32) out;
1409 }
1410
EMU2413_calc(EMU2413 * opll)1411 int32 EMU2413_calc (EMU2413 * opll)
1412 {
1413 return calc (opll);
1414 }
1415
EMU2413_setMask(EMU2413 * opll,uint32 mask)1416 uint32 EMU2413_setMask (EMU2413 * opll, uint32 mask)
1417 {
1418 uint32 ret;
1419
1420 if (opll)
1421 {
1422 ret = opll->mask;
1423 opll->mask = mask;
1424 return ret;
1425 }
1426 else
1427 return 0;
1428 }
1429
EMU2413_toggleMask(EMU2413 * opll,uint32 mask)1430 uint32 EMU2413_toggleMask (EMU2413 * opll, uint32 mask)
1431 {
1432 uint32 ret;
1433
1434 if (opll)
1435 {
1436 ret = opll->mask;
1437 opll->mask ^= mask;
1438 return ret;
1439 }
1440 else
1441 return 0;
1442 }
1443
1444 /****************************************************
1445
1446 I/O Ctrl
1447
1448 *****************************************************/
1449
EMU2413_writeReg(EMU2413 * opll,uint32 reg,uint32 data)1450 void EMU2413_writeReg (EMU2413 * opll, uint32 reg, uint32 data)
1451 {
1452
1453 int32 i, v, ch;
1454
1455 data = data & 0xff;
1456 reg = reg & 0x3f;
1457 opll->reg[reg] = (uint8) data;
1458
1459 switch (reg)
1460 {
1461 case 0x00:
1462 opll->patch[0].AM = (data >> 7) & 1;
1463 opll->patch[0].PM = (data >> 6) & 1;
1464 opll->patch[0].EG = (data >> 5) & 1;
1465 opll->patch[0].KR = (data >> 4) & 1;
1466 opll->patch[0].ML = (data) & 15;
1467 for (i = 0; i < 9; i++)
1468 {
1469 if (opll->patch_number[i] == 0)
1470 {
1471 UPDATE_PG (MOD(opll,i));
1472 UPDATE_RKS (MOD(opll,i));
1473 UPDATE_EG (MOD(opll,i));
1474 }
1475 }
1476 break;
1477
1478 case 0x01:
1479 opll->patch[1].AM = (data >> 7) & 1;
1480 opll->patch[1].PM = (data >> 6) & 1;
1481 opll->patch[1].EG = (data >> 5) & 1;
1482 opll->patch[1].KR = (data >> 4) & 1;
1483 opll->patch[1].ML = (data) & 15;
1484 for (i = 0; i < 9; i++)
1485 {
1486 if (opll->patch_number[i] == 0)
1487 {
1488 UPDATE_PG (CAR(opll,i));
1489 UPDATE_RKS (CAR(opll,i));
1490 UPDATE_EG (CAR(opll,i));
1491 }
1492 }
1493 break;
1494
1495 case 0x02:
1496 opll->patch[0].KL = (data >> 6) & 3;
1497 opll->patch[0].TL = (data) & 63;
1498 for (i = 0; i < 9; i++)
1499 {
1500 if (opll->patch_number[i] == 0)
1501 {
1502 UPDATE_TLL(MOD(opll,i));
1503 }
1504 }
1505 break;
1506
1507 case 0x03:
1508 opll->patch[1].KL = (data >> 6) & 3;
1509 opll->patch[1].WF = (data >> 4) & 1;
1510 opll->patch[0].WF = (data >> 3) & 1;
1511 opll->patch[0].FB = (data) & 7;
1512 for (i = 0; i < 9; i++)
1513 {
1514 if (opll->patch_number[i] == 0)
1515 {
1516 UPDATE_WF(MOD(opll,i));
1517 UPDATE_WF(CAR(opll,i));
1518 }
1519 }
1520 break;
1521
1522 case 0x04:
1523 opll->patch[0].AR = (data >> 4) & 15;
1524 opll->patch[0].DR = (data) & 15;
1525 for (i = 0; i < 9; i++)
1526 {
1527 if (opll->patch_number[i] == 0)
1528 {
1529 UPDATE_EG (MOD(opll,i));
1530 }
1531 }
1532 break;
1533
1534 case 0x05:
1535 opll->patch[1].AR = (data >> 4) & 15;
1536 opll->patch[1].DR = (data) & 15;
1537 for (i = 0; i < 9; i++)
1538 {
1539 if (opll->patch_number[i] == 0)
1540 {
1541 UPDATE_EG(CAR(opll,i));
1542 }
1543 }
1544 break;
1545
1546 case 0x06:
1547 opll->patch[0].SL = (data >> 4) & 15;
1548 opll->patch[0].RR = (data) & 15;
1549 for (i = 0; i < 9; i++)
1550 {
1551 if (opll->patch_number[i] == 0)
1552 {
1553 UPDATE_EG (MOD(opll,i));
1554 }
1555 }
1556 break;
1557
1558 case 0x07:
1559 opll->patch[1].SL = (data >> 4) & 15;
1560 opll->patch[1].RR = (data) & 15;
1561 for (i = 0; i < 9; i++)
1562 {
1563 if (opll->patch_number[i] == 0)
1564 {
1565 UPDATE_EG (CAR(opll,i));
1566 }
1567 }
1568 break;
1569
1570 case 0x0e:
1571 update_rhythm_mode (opll);
1572 if (data & 32)
1573 {
1574 if (data & 0x10)
1575 keyOn_BD (opll);
1576 else
1577 keyOff_BD (opll);
1578 if (data & 0x8)
1579 keyOn_SD (opll);
1580 else
1581 keyOff_SD (opll);
1582 if (data & 0x4)
1583 keyOn_TOM (opll);
1584 else
1585 keyOff_TOM (opll);
1586 if (data & 0x2)
1587 keyOn_CYM (opll);
1588 else
1589 keyOff_CYM (opll);
1590 if (data & 0x1)
1591 keyOn_HH (opll);
1592 else
1593 keyOff_HH (opll);
1594 }
1595 update_key_status (opll);
1596
1597 UPDATE_ALL (MOD(opll,6));
1598 UPDATE_ALL (CAR(opll,6));
1599 UPDATE_ALL (MOD(opll,7));
1600 UPDATE_ALL (CAR(opll,7));
1601 UPDATE_ALL (MOD(opll,8));
1602 UPDATE_ALL (CAR(opll,8));
1603
1604 break;
1605
1606 case 0x0f:
1607 break;
1608
1609 case 0x10:
1610 case 0x11:
1611 case 0x12:
1612 case 0x13:
1613 case 0x14:
1614 case 0x15:
1615 case 0x16:
1616 case 0x17:
1617 case 0x18:
1618 ch = reg - 0x10;
1619 setFnumber (opll, ch, data + ((opll->reg[0x20 + ch] & 1) << 8));
1620 UPDATE_ALL (MOD(opll,ch));
1621 UPDATE_ALL (CAR(opll,ch));
1622 break;
1623
1624 case 0x20:
1625 case 0x21:
1626 case 0x22:
1627 case 0x23:
1628 case 0x24:
1629 case 0x25:
1630 case 0x26:
1631 case 0x27:
1632 case 0x28:
1633 ch = reg - 0x20;
1634 setFnumber (opll, ch, ((data & 1) << 8) + opll->reg[0x10 + ch]);
1635 setBlock (opll, ch, (data >> 1) & 7);
1636 setSustine (opll, ch, (data >> 5) & 1);
1637 if (data & 0x10)
1638 keyOn (opll, ch);
1639 else
1640 keyOff (opll, ch);
1641 UPDATE_ALL (MOD(opll,ch));
1642 UPDATE_ALL (CAR(opll,ch));
1643 update_key_status (opll);
1644 update_rhythm_mode (opll);
1645 break;
1646
1647 case 0x30:
1648 case 0x31:
1649 case 0x32:
1650 case 0x33:
1651 case 0x34:
1652 case 0x35:
1653 case 0x36:
1654 case 0x37:
1655 case 0x38:
1656 i = (data >> 4) & 15;
1657 v = data & 15;
1658 if ((opll->reg[0x0e] & 32) && (reg >= 0x36))
1659 {
1660 switch (reg)
1661 {
1662 case 0x37:
1663 setSlotVolume (MOD(opll,7), i << 2);
1664 break;
1665 case 0x38:
1666 setSlotVolume (MOD(opll,8), i << 2);
1667 break;
1668 default:
1669 break;
1670 }
1671 }
1672 else
1673 {
1674 setPatch (opll, reg - 0x30, i);
1675 }
1676 setVolume (opll, reg - 0x30, v << 2);
1677 UPDATE_ALL (MOD(opll,reg - 0x30));
1678 UPDATE_ALL (CAR(opll,reg - 0x30));
1679 break;
1680
1681 default:
1682 break;
1683
1684 }
1685 }
1686
EMU2413_writeIO(EMU2413 * opll,uint32 adr,uint32 val)1687 void EMU2413_writeIO (EMU2413 * opll, uint32 adr, uint32 val)
1688 {
1689 if (adr & 1)
1690 EMU2413_writeReg (opll, opll->adr, val);
1691 else
1692 opll->adr = val;
1693 }
1694
1695 #ifndef EMU2413_COMPACTION
1696 /* STEREO MODE (OPT) */
EMU2413_set_pan(EMU2413 * opll,uint32 ch,uint32 pan)1697 void EMU2413_set_pan (EMU2413 * opll, uint32 ch, uint32 pan)
1698 {
1699 opll->pan[ch & 15] = pan & 3;
1700 }
1701
calc_stereo(EMU2413 * opll,int32 out[2])1702 static void calc_stereo (EMU2413 * opll, int32 out[2])
1703 {
1704 int32 b[4] = { 0, 0, 0, 0 }; /* Ignore, Right, Left, Center */
1705 int32 r[4] = { 0, 0, 0, 0 }; /* Ignore, Right, Left, Center */
1706 int32 i;
1707
1708 update_ampm (opll);
1709 update_noise (opll);
1710
1711 for(i=0;i<18;i++)
1712 {
1713 calc_phase(&opll->slot[i],opll->lfo_pm);
1714 calc_envelope(&opll->slot[i],opll->lfo_am);
1715 }
1716
1717 for (i = 0; i < 6; i++)
1718 if (!(opll->mask & EMU2413_MASK_CH (i)) && (CAR(opll,i)->eg_mode != FINISH))
1719 b[opll->pan[i]] += calc_slot_car (CAR(opll,i), calc_slot_mod (MOD(opll,i)));
1720
1721
1722 if (opll->patch_number[6] <= 15)
1723 {
1724 if (!(opll->mask & EMU2413_MASK_CH (6)) && (CAR(opll,6)->eg_mode != FINISH))
1725 b[opll->pan[6]] += calc_slot_car (CAR(opll,6), calc_slot_mod (MOD(opll,6)));
1726 }
1727 else
1728 {
1729 if (!(opll->mask & EMU2413_MASK_BD) && (CAR(opll,6)->eg_mode != FINISH))
1730 r[opll->pan[9]] += calc_slot_car (CAR(opll,6), calc_slot_mod (MOD(opll,6)));
1731 }
1732
1733 if (opll->patch_number[7] <= 15)
1734 {
1735 if (!(opll->mask & EMU2413_MASK_CH (7)) && (CAR (opll,7)->eg_mode != FINISH))
1736 b[opll->pan[7]] += calc_slot_car (CAR (opll,7), calc_slot_mod (MOD (opll,7)));
1737 }
1738 else
1739 {
1740 if (!(opll->mask & EMU2413_MASK_HH) && (MOD (opll,7)->eg_mode != FINISH))
1741 r[opll->pan[10]] += calc_slot_hat (MOD (opll,7), CAR(opll,8)->pgout, opll->noise_seed&1);
1742 if (!(opll->mask & EMU2413_MASK_SD) && (CAR (opll,7)->eg_mode != FINISH))
1743 r[opll->pan[11]] -= calc_slot_snare (CAR (opll,7), opll->noise_seed&1);
1744 }
1745
1746 if (opll->patch_number[8] <= 15)
1747 {
1748 if (!(opll->mask & EMU2413_MASK_CH (8)) && (CAR (opll,8)->eg_mode != FINISH))
1749 b[opll->pan[8]] += calc_slot_car (CAR (opll,8), calc_slot_mod (MOD (opll,8)));
1750 }
1751 else
1752 {
1753 if (!(opll->mask & EMU2413_MASK_TOM) && (MOD (opll,8)->eg_mode != FINISH))
1754 r[opll->pan[12]] += calc_slot_tom (MOD (opll,8));
1755 if (!(opll->mask & EMU2413_MASK_CYM) && (CAR (opll,8)->eg_mode != FINISH))
1756 r[opll->pan[13]] -= calc_slot_cym (CAR (opll,8), MOD(opll,7)->pgout);
1757 }
1758
1759 out[1] = (b[1] + b[3] + ((r[1] + r[3]) << 1));
1760 out[0] = (b[2] + b[3] + ((r[2] + r[3]) << 1));
1761 }
1762
EMU2413_calc_stereo(EMU2413 * opll,int32 out[2])1763 void EMU2413_calc_stereo (EMU2413 * opll, int32 out[2])
1764 {
1765 calc_stereo (opll, out);
1766 }
1767 #endif /* EMU2413_COMPACTION */
1768