1 /* $OpenBSD: fdreg.h,v 1.1 2005/03/09 18:41:49 miod Exp $ */ 2 /* $NetBSD: fdreg.h,v 1.9 2003/08/07 16:29:35 agc Exp $ */ 3 4 /*- 5 * Copyright (c) 1991 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of the University nor the names of its contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 * 32 * @(#)fdreg.h 7.1 (Berkeley) 5/9/91 33 */ 34 35 /* 36 * AT floppy controller registers and bitfields 37 */ 38 39 /* uses NEC765 controller */ 40 #include <dev/ic/nec765reg.h> 41 42 /* 43 * Register offsets for the 82077 controller. 44 */ 45 #define FDREG77_STATUSA 0 46 #define FDREG77_STATUSB 1 47 #define FDREG77_DOR 2 /* Digital Output Register (R/W) */ 48 #define FDREG77_TDR 3 /* Tape Control Register (R/W) */ 49 #define FDREG77_MSR 4 /* Main Status Register (R) */ 50 #define FDREG77_DRS 4 /* Data Rate Select Register (W) */ 51 #define FDREG77_FIFO 5 /* Data (FIFO) register (R/W) */ 52 #define FDREG77_DIR 7 /* Digital Input Register (R) */ 53 #define FDREG77_CCR 7 /* Configuration Control (W) */ 54 55 /* Data Select Register bits */ 56 #define DRS_RESET 0x80 57 #define DRS_POWER 0x40 58 #define DRS_PLL 0x20 59 #define FDC_500KBPS 0x00 /* 500KBPS MFM drive transfer rate */ 60 #define FDC_300KBPS 0x01 /* 300KBPS MFM drive transfer rate */ 61 #define FDC_250KBPS 0x02 /* 250KBPS MFM drive transfer rate */ 62 #define FDC_125KBPS 0x03 /* 125KBPS FM drive transfer rate */ 63 64 /* Digital Output Register bits (modified on suns) */ 65 #define FDO_DS 0x01 /* floppy device select (neg) */ 66 #define FDO_FRST 0x04 /* floppy controller reset (neg) */ 67 #define FDO_FDMAEN 0x08 /* enable floppy DMA and Interrupt */ 68 #define FDO_MOEN(n) ((1 << n) << 4) /* motor enable */ 69 #define FDO_DEN 0x40 /* Density select */ 70 #define FDO_EJ 0x80 /* Eject disk */ 71 72 /* Digital Input Register bits */ 73 #define FDI_DCHG 0x80 /* diskette has been changed */ 74 75 /* XXX - find a place for these... */ 76 #define NE7CMD_CFG 0x13 77 #define CFG_EIS 0x40 78 #define CFG_EFIFO 0x20 79 #define CFG_POLL 0x10 80 #define CFG_THRHLD_MASK 0x0f 81 82 #define NE7CMD_LOCK 0x14 83 #define CFG_LOCK 0x80 84 85 #define NE7CMD_MOTOR 0x0b 86 #define MOTOR_ON 0x80 87 88 #define NE7CMD_DUMPREG 0x0e 89 #define NE7CMD_VERSION 0x10 90 91 #define ST1_OVERRUN 0x10 92 93 #define NE7_SPECIFY_NODMA 0x01 94