1 /* gameplaySP
2  *
3  * Copyright (C) 2006 Exophase <exophase@gmail.com>
4  *
5  * This program is free software; you can redistribute it and/or
6  * modify it under the terms of the GNU General Public License as
7  * published by the Free Software Foundation; either version 2 of
8  * the License, or (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13  * General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
18  */
19 
20 #ifndef MEMORY_H
21 #define MEMORY_H
22 
23 #include "libretro.h"
24 extern int use_libretro_save_method;
25 
26 typedef enum
27 {
28   DMA_START_IMMEDIATELY,
29   DMA_START_VBLANK,
30   DMA_START_HBLANK,
31   DMA_START_SPECIAL,
32   DMA_INACTIVE
33 } dma_start_type;
34 
35 typedef enum
36 {
37   DMA_16BIT,
38   DMA_32BIT
39 } dma_length_type;
40 
41 typedef enum
42 {
43   DMA_NO_REPEAT,
44   DMA_REPEAT
45 } dma_repeat_type;
46 
47 typedef enum
48 {
49   DMA_INCREMENT,
50   DMA_DECREMENT,
51   DMA_FIXED,
52   DMA_RELOAD
53 } dma_increment_type;
54 
55 typedef enum
56 {
57   DMA_NO_IRQ,
58   DMA_TRIGGER_IRQ
59 } dma_irq_type;
60 
61 typedef enum
62 {
63   DMA_DIRECT_SOUND_A,
64   DMA_DIRECT_SOUND_B,
65   DMA_NO_DIRECT_SOUND
66 } dma_ds_type;
67 
68 typedef struct
69 {
70   u32 dma_channel;
71   u32 source_address;
72   u32 dest_address;
73   u32 length;
74   dma_repeat_type repeat_type;
75   dma_ds_type direct_sound_channel;
76   dma_increment_type source_direction;
77   dma_increment_type dest_direction;
78   dma_length_type length_type;
79   dma_start_type start_type;
80   dma_irq_type irq;
81 } dma_transfer_type;
82 
83 typedef enum
84 {
85   REG_DISPCNT = 0x000,
86   REG_DISPSTAT = 0x002,
87   REG_VCOUNT = 0x003,
88   REG_BG0CNT = 0x004,
89   REG_BG1CNT = 0x005,
90   REG_BG2CNT = 0x006,
91   REG_BG3CNT = 0x007,
92   REG_BG0HOFS = 0x08,
93   REG_BG0VOFS = 0x09,
94   REG_BG1HOFS = 0x0A,
95   REG_BG1VOFS = 0x0B,
96   REG_BG2HOFS = 0x0C,
97   REG_BG2VOFS = 0x0D,
98   REG_BG3HOFS = 0x0E,
99   REG_BG3VOFS = 0x0F,
100   REG_BG2PA = 0x10,
101   REG_BG2PB = 0x11,
102   REG_BG2PC = 0x12,
103   REG_BG2PD = 0x13,
104   REG_BG2X_L = 0x14,
105   REG_BG2X_H = 0x15,
106   REG_BG2Y_L = 0x16,
107   REG_BG2Y_H = 0x17,
108   REG_BG3PA = 0x18,
109   REG_BG3PB = 0x19,
110   REG_BG3PC = 0x1A,
111   REG_BG3PD = 0x1B,
112   REG_BG3X_L = 0x1C,
113   REG_BG3X_H = 0x1D,
114   REG_BG3Y_L = 0x1E,
115   REG_BG3Y_H = 0x1F,
116   REG_WIN0H = 0x20,
117   REG_WIN1H = 0x21,
118   REG_WIN0V = 0x22,
119   REG_WIN1V = 0x23,
120   REG_WININ = 0x24,
121   REG_WINOUT = 0x25,
122   REG_BLDCNT = 0x28,
123   REG_BLDALPHA = 0x29,
124   REG_BLDY = 0x2A,
125   REG_TM0D = 0x80,
126   REG_TM0CNT = 0x81,
127   REG_TM1D = 0x82,
128   REG_TM1CNT = 0x83,
129   REG_TM2D = 0x84,
130   REG_TM2CNT = 0x85,
131   REG_TM3D = 0x86,
132   REG_TM3CNT = 0x87,
133   REG_P1 = 0x098,
134   REG_P1CNT = 0x099,
135   REG_RCNT = 0x9A,
136   REG_IE = 0x100,
137   REG_IF = 0x101,
138   REG_IME = 0x104,
139   REG_HALTCNT = 0x180
140 } hardware_register;
141 
142 typedef enum
143 {
144   FLASH_DEVICE_MACRONIX_64KB   = 0x1C,
145   FLASH_DEVICE_AMTEL_64KB      = 0x3D,
146   FLASH_DEVICE_SST_64K         = 0xD4,
147   FLASH_DEVICE_PANASONIC_64KB  = 0x1B,
148   FLASH_DEVICE_MACRONIX_128KB  = 0x09
149 } flash_device_id_type;
150 
151 typedef enum
152 {
153   FLASH_MANUFACTURER_MACRONIX  = 0xC2,
154   FLASH_MANUFACTURER_AMTEL     = 0x1F,
155   FLASH_MANUFACTURER_PANASONIC = 0x32,
156   FLASH_MANUFACTURER_SST       = 0xBF
157 } flash_manufacturer_id_type;
158 
159 u8 read_memory8(u32 address);
160 u32 read_memory16(u32 address);
161 u16 read_memory16_signed(u32 address);
162 u32 read_memory32(u32 address);
163 cpu_alert_type write_memory8(u32 address, u8 value);
164 cpu_alert_type write_memory16(u32 address, u16 value);
165 cpu_alert_type write_memory32(u32 address, u32 value);
166 
167 extern u8 *memory_regions[16];
168 extern u32 memory_limits[16];
169 
170 /* EDIT: Shouldn't this be extern ?! */
171 extern u32 waitstate_cycles_sequential[16][3];
172 
173 extern u32 gamepak_size;
174 extern char gamepak_title[13];
175 extern char gamepak_code[5];
176 extern char gamepak_maker[3];
177 extern char gamepak_filename[512];
178 
179 cpu_alert_type dma_transfer(dma_transfer_type *dma);
180 u8 *memory_region(u32 address, u32 *memory_limit);
181 u32 load_gamepak(const struct retro_game_info* info, const char *name);
182 u32 load_backup(char *name);
183 s32 load_bios(char *name);
184 void update_backup(void);
185 void init_memory(void);
186 void init_gamepak_buffer(void);
187 void memory_term(void);
188 void bios_region_read_allow(void);
189 void bios_region_read_protect(void);
190 u8 *load_gamepak_page(u32 physical_index);
191 
192 extern u8 *gamepak_rom;
193 extern u32 gamepak_ram_buffer_size;
194 extern u32 oam_update;
195 extern u32 gbc_sound_update;
196 extern u32 gbc_sound_wave_update;
197 extern dma_transfer_type dma[4];
198 
199 extern u32 bios_read_protect;
200 extern u16 palette_ram[512];
201 extern u16 oam_ram[512];
202 extern u16 palette_ram_converted[512];
203 extern u16 io_registers[1024 * 16];
204 extern u8 vram[1024 * 96];
205 // Double buffer used for SMC detection
206 extern u8 bios_rom[1024 * 16 * 2];
207 extern u8 ewram[1024 * 256 * 2];
208 extern u8 iwram[1024 * 32 * 2];
209 
210 extern u8 *memory_map_read[8 * 1024];
211 extern u32 *reg;
212 extern u8 *memory_map_write[8 * 1024];
213 
214 extern flash_device_id_type flash_device_id;
215 
216 extern const u8 *state_mem_read_ptr;
217 extern u8 *state_mem_write_ptr;
218 
219 typedef enum
220 {
221   BACKUP_SRAM,
222   BACKUP_FLASH,
223   BACKUP_EEPROM,
224   BACKUP_NONE
225 } backup_type_type;
226 
227 typedef enum
228 {
229   SRAM_SIZE_32KB,
230   SRAM_SIZE_64KB
231 } sram_size_type;
232 
233 typedef enum
234 {
235   FLASH_BASE_MODE,
236   FLASH_ERASE_MODE,
237   FLASH_ID_MODE,
238   FLASH_WRITE_MODE,
239   FLASH_BANKSWITCH_MODE
240 } flash_mode_type;
241 
242 typedef enum
243 {
244   FLASH_SIZE_64KB,
245   FLASH_SIZE_128KB
246 } flash_size_type;
247 
248 
249 extern backup_type_type backup_type;
250 extern sram_size_type sram_size;
251 extern flash_size_type flash_size;
252 
253 typedef enum
254 {
255   EEPROM_512_BYTE,
256   EEPROM_8_KBYTE
257 } eeprom_size_type;
258 
259 typedef enum
260 {
261   EEPROM_BASE_MODE,
262   EEPROM_READ_MODE,
263   EEPROM_READ_HEADER_MODE,
264   EEPROM_ADDRESS_MODE,
265   EEPROM_WRITE_MODE,
266   EEPROM_WRITE_ADDRESS_MODE,
267   EEPROM_ADDRESS_FOOTER_MODE,
268   EEPROM_WRITE_FOOTER_MODE
269 } eeprom_mode_type;
270 
271 extern eeprom_size_type eeprom_size;
272 
273 extern u8 gamepak_backup[1024 * 128];
274 
state_mem_write(const void * src,size_t size)275 static inline void state_mem_write(const void* src, size_t size)
276 {
277   memcpy(state_mem_write_ptr, src, size);
278   state_mem_write_ptr += size;
279 }
280 
281 /* this is an upper limit, ToDo : calculate the exact state size */
282 #define GBA_STATE_MEM_SIZE                    (512*1024)
283 
284 #define state_mem_write_array(array)          state_mem_write(array,     sizeof(array))
285 #define state_mem_write_variable(variable)    state_mem_write(&variable, sizeof(variable))
286 
state_mem_read(void * dst,size_t size)287 static inline void state_mem_read(void* dst, size_t size)
288 {
289   memcpy(dst, state_mem_read_ptr, size);
290   state_mem_read_ptr += size;
291 }
292 
293 #define state_mem_read_array(array)           state_mem_read(array,     sizeof(array))
294 #define state_mem_read_variable(variable)     state_mem_read(&variable, sizeof(variable))
295 
296 void memory_write_savestate(void);
297 void memory_read_savestate(void);
298 void gba_load_state(const void *src);
299 void gba_save_state(void *dst);
300 
301 #endif
302