xref: /netbsd/sys/arch/mips/cavium/dev/octeon_fpareg.h (revision ad312671)
1 /*	$NetBSD: octeon_fpareg.h,v 1.5 2020/06/23 05:14:18 simonb Exp $	*/
2 
3 /*
4  * Copyright (c) 2007 Internet Initiative Japan, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 /*
30  * FPA Registers
31  */
32 
33 #ifndef _OCTEON_FPAREG_H_
34 #define _OCTEON_FPAREG_H_
35 
36 /* ---- register offsets */
37 
38 #define	FPA_INT_SUM				0x0001180028000040ULL
39 #define	FPA_INT_ENB				0x0001180028000048ULL
40 #define	FPA_CTL_STATUS				0x0001180028000050ULL
41 #define	FPA_QUE0_AVAILABLE			0x0001180028000098ULL
42 #define	FPA_QUE1_AVAILABLE			0x00011800280000a0ULL
43 #define	FPA_QUE2_AVAILABLE			0x00011800280000a8ULL
44 #define	FPA_QUE3_AVAILABLE			0x00011800280000b0ULL
45 #define	FPA_QUE4_AVAILABLE			0x00011800280000b8ULL
46 #define	FPA_QUE5_AVAILABLE			0x00011800280000c0ULL
47 #define	FPA_QUE6_AVAILABLE			0x00011800280000c8ULL
48 #define	FPA_QUE7_AVAILABLE			0x00011800280000d0ULL
49 #define	FPA_WART_CTL				0x00011800280000d8ULL
50 #define	FPA_WART_STATUS				0x00011800280000e0ULL
51 #define	FPA_BIST_STATUS				0x00011800280000e8ULL
52 #define	FPA_QUE0_PAGE_INDEX			0x00011800280000f0ULL
53 #define	FPA_QUE1_PAGE_INDEX			0x00011800280000f8ULL
54 #define	FPA_QUE2_PAGE_INDEX			0x0001180028000100ULL
55 #define	FPA_QUE3_PAGE_INDEX			0x0001180028000108ULL
56 #define	FPA_QUE4_PAGE_INDEX			0x0001180028000110ULL
57 #define	FPA_QUE5_PAGE_INDEX			0x0001180028000118ULL
58 #define	FPA_QUE6_PAGE_INDEX			0x0001180028000120ULL
59 #define	FPA_QUE7_PAGE_INDEX			0x0001180028000128ULL
60 #define	FPA_QUE_EXP				0x0001180028000130ULL
61 #define	FPA_QUE_ACT				0x0001180028000138ULL
62 
63 /* ---- register bit definitions */
64 
65 #define	FPA_INT_SUM_XXX_63_28			UINT64_C(0xfffffffff0000000)
66 #define	FPA_INT_SUM_Q7_PERR			UINT64_C(0x0000000008000000)
67 #define	FPA_INT_SUM_Q7_COFF			UINT64_C(0x0000000004000000)
68 #define	FPA_INT_SUM_Q7_UND			UINT64_C(0x0000000002000000)
69 #define	FPA_INT_SUM_Q6_PERR			UINT64_C(0x0000000001000000)
70 #define	FPA_INT_SUM_Q6_COFF			UINT64_C(0x0000000000800000)
71 #define	FPA_INT_SUM_Q6_UND			UINT64_C(0x0000000000400000)
72 #define	FPA_INT_SUM_Q5_PERR			UINT64_C(0x0000000000200000)
73 #define	FPA_INT_SUM_Q5_COFF			UINT64_C(0x0000000000100000)
74 #define	FPA_INT_SUM_Q5_UND			UINT64_C(0x0000000000080000)
75 #define	FPA_INT_SUM_Q4_PERR			UINT64_C(0x0000000000040000)
76 #define	FPA_INT_SUM_Q4_COFF			UINT64_C(0x0000000000020000)
77 #define	FPA_INT_SUM_Q4_UND			UINT64_C(0x0000000000010000)
78 #define	FPA_INT_SUM_Q3_PERR			UINT64_C(0x0000000000008000)
79 #define	FPA_INT_SUM_Q3_COFF			UINT64_C(0x0000000000004000)
80 #define	FPA_INT_SUM_Q3_UND			UINT64_C(0x0000000000002000)
81 #define	FPA_INT_SUM_Q2_PERR			UINT64_C(0x0000000000001000)
82 #define	FPA_INT_SUM_Q2_COFF			UINT64_C(0x0000000000000800)
83 #define	FPA_INT_SUM_Q2_UND			UINT64_C(0x0000000000000400)
84 #define	FPA_INT_SUM_Q1_PERR			UINT64_C(0x0000000000000200)
85 #define	FPA_INT_SUM_Q1_COFF			UINT64_C(0x0000000000000100)
86 #define	FPA_INT_SUM_Q1_UND			UINT64_C(0x0000000000000080)
87 #define	FPA_INT_SUM_Q0_PERR			UINT64_C(0x0000000000000040)
88 #define	FPA_INT_SUM_Q0_COFF			UINT64_C(0x0000000000000020)
89 #define	FPA_INT_SUM_Q0_UND			UINT64_C(0x0000000000000010)
90 #define	FPA_INT_SUM_FED1_DBE			UINT64_C(0x0000000000000008)
91 #define	FPA_INT_SUM_FED1_SBE			UINT64_C(0x0000000000000004)
92 #define	FPA_INT_SUM_FED0_DBE			UINT64_C(0x0000000000000002)
93 #define	FPA_INT_SUM_FED0_SBE			UINT64_C(0x0000000000000001)
94 
95 #define	FPA_INT_ENB_XXX_63_28			UINT64_C(0xfffffffff0000000)
96 #define	FPA_INT_ENB_Q7_PERR			UINT64_C(0x0000000008000000)
97 #define	FPA_INT_ENB_Q7_COFF			UINT64_C(0x0000000004000000)
98 #define	FPA_INT_ENB_Q7_UND			UINT64_C(0x0000000002000000)
99 #define	FPA_INT_ENB_Q6_PERR			UINT64_C(0x0000000001000000)
100 #define	FPA_INT_ENB_Q6_COFF			UINT64_C(0x0000000000800000)
101 #define	FPA_INT_ENB_Q6_UND			UINT64_C(0x0000000000400000)
102 #define	FPA_INT_ENB_Q5_PERR			UINT64_C(0x0000000000200000)
103 #define	FPA_INT_ENB_Q5_COFF			UINT64_C(0x0000000000100000)
104 #define	FPA_INT_ENB_Q5_UND			UINT64_C(0x0000000000080000)
105 #define	FPA_INT_ENB_Q4_PERR			UINT64_C(0x0000000000040000)
106 #define	FPA_INT_ENB_Q4_COFF			UINT64_C(0x0000000000020000)
107 #define	FPA_INT_ENB_Q4_UND			UINT64_C(0x0000000000010000)
108 #define	FPA_INT_ENB_Q3_PERR			UINT64_C(0x0000000000008000)
109 #define	FPA_INT_ENB_Q3_COFF			UINT64_C(0x0000000000004000)
110 #define	FPA_INT_ENB_Q3_UND			UINT64_C(0x0000000000002000)
111 #define	FPA_INT_ENB_Q2_PERR			UINT64_C(0x0000000000001000)
112 #define	FPA_INT_ENB_Q2_COFF			UINT64_C(0x0000000000000800)
113 #define	FPA_INT_ENB_Q2_UND			UINT64_C(0x0000000000000400)
114 #define	FPA_INT_ENB_Q1_PERR			UINT64_C(0x0000000000000200)
115 #define	FPA_INT_ENB_Q1_COFF			UINT64_C(0x0000000000000100)
116 #define	FPA_INT_ENB_Q1_UND			UINT64_C(0x0000000000000080)
117 #define	FPA_INT_ENB_Q0_PERR			UINT64_C(0x0000000000000040)
118 #define	FPA_INT_ENB_Q0_COFF			UINT64_C(0x0000000000000020)
119 #define	FPA_INT_ENB_Q0_UND			UINT64_C(0x0000000000000010)
120 #define	FPA_INT_ENB_FED1_DBE			UINT64_C(0x0000000000000008)
121 #define	FPA_INT_ENB_FED1_SBE			UINT64_C(0x0000000000000004)
122 #define	FPA_INT_ENB_FED0_DBE			UINT64_C(0x0000000000000002)
123 #define	FPA_INT_ENB_FED0_SBE			UINT64_C(0x0000000000000001)
124 
125 #define	FPA_CTL_STATUS_XXX_63_18		UINT64_C(0xfffffffffffc0000)
126 #define	FPA_CTL_STATUS_RESET			UINT64_C(0x0000000000020000)
127 #define	FPA_CTL_STATUS_USE_LDT			UINT64_C(0x0000000000010000)
128 #define	FPA_CTL_STATUS_USE_STT			UINT64_C(0x0000000000008000)
129 #define	FPA_CTL_STATUS_ENB			UINT64_C(0x0000000000004000)
130 #define	FPA_CTL_STATUS_MEM1_ERR			UINT64_C(0x0000000000003f80)
131 #define	FPA_CTL_STATUS_MEM0_ERR			UINT64_C(0x000000000000007f)
132 
133 #define	FPA_QUEX_AVAILABLE_XXX_63_29		UINT64_C(0xffffffffe0000000)
134 #define	FPA_QUEX_AVAILABLE_QUE_SIZ		UINT64_C(0x000000001fffffff)
135 
136 #define	FPA_WART_CTL_XXX_63_16			UINT64_C(0xffffffffffff0000)
137 #define	FPA_WART_CTL_CTL			UINT64_C(0x000000000000ffff)
138 
139 #define	FPA_WART_STATUS_XXX_63_32		UINT64_C(0xffffffff00000000)
140 #define	FPA_WART_STATUS_STATUS			UINT64_C(0x00000000ffffffff)
141 
142 #define	FPA_BIST_STATUS_XXX_63_5		UINT64_C(0xffffffffffffffe0)
143 #define	FPA_BIST_STATUS_FRD			UINT64_C(0x0000000000000010)
144 #define	FPA_BIST_STATUS_FPF0			UINT64_C(0x0000000000000008)
145 #define	FPA_BIST_STATUS_FPF1			UINT64_C(0x0000000000000004)
146 #define	FPA_BIST_STATUS_FFR			UINT64_C(0x0000000000000002)
147 #define	FPA_BIST_STATUS_FDR			UINT64_C(0x0000000000000001)
148 
149 #define	FPA_QUEX_PAGE_INDEX_XXX_63_25		UINT64_C(0xfffffffffe000000)
150 #define	FPA_QUEX_PAGE_INDEX_PG_NUM		UINT64_C(0x0000000001ffffff)
151 
152 #define	FPA_QUE_EXP_XXX_63_32			UINT64_C(0xffffffff00000000)
153 #define	FPA_QUE_EXP_XXX_31_29			UINT64_C(0x00000000e0000000)
154 #define	FPA_QUE_EXP_EXP_QUE			UINT64_C(0x000000001c000000)
155 #define	FPA_QUE_EXP_EXP_INDX			UINT64_C(0x0000000003ffffff)
156 
157 #define	FPA_QUE_ACT_XXX_63_32			UINT64_C(0xffffffff00000000)
158 #define	FPA_QUE_ACT_XXX_31_29			UINT64_C(0x00000000e0000000)
159 #define	FPA_QUE_ACT_ACT_QUE			UINT64_C(0x000000001c000000)
160 #define	FPA_QUE_ACT_ACT_INDX			UINT64_C(0x0000000003ffffff)
161 
162 /* ---- operations */
163 
164 /*
165  * Free Pool Unit Operations
166  */
167 
168 #define	FPA_MAJOR_DID				0x5
169 
170 /* Store Operations */
171 #define	FPA_OPS_STORE_ADDR			UINT64_C(0x000000ffffffffff)
172 
173 #define	FPA_OPS_STORE_DATA_DWBCOUNT		UINT64_C(0x00000000000001ff)
174 
175 /* ---- bus_space(9) */
176 
177 #define	FPA_BASE				0x0001180028000000ULL
178 #define	FPA_SIZE				0x0200
179 
180 #define	FPA_NPOOLS				8
181 
182 #define	FPA_INT_SUM_OFFSET			0x0040
183 #define	FPA_INT_ENB_OFFSET			0x0048
184 #define	FPA_CTL_STATUS_OFFSET			0x0050
185 #define	FPA_QUE0_AVAILABLE_OFFSET		0x0098
186 #define	FPA_QUE1_AVAILABLE_OFFSET		0x00a0
187 #define	FPA_QUE2_AVAILABLE_OFFSET		0x00a8
188 #define	FPA_QUE3_AVAILABLE_OFFSET		0x00b0
189 #define	FPA_QUE4_AVAILABLE_OFFSET		0x00b8
190 #define	FPA_QUE5_AVAILABLE_OFFSET		0x00c0
191 #define	FPA_QUE6_AVAILABLE_OFFSET		0x00c8
192 #define	FPA_QUE7_AVAILABLE_OFFSET		0x00d0
193 #define	FPA_WART_CTL_OFFSET			0x00d8
194 #define	FPA_WART_STATUS_OFFSET			0x00e0
195 #define	FPA_BIST_STATUS_OFFSET			0x00e8
196 #define	FPA_QUE0_PAGE_INDEX_OFFSET		0x00f0
197 #define	FPA_QUE1_PAGE_INDEX_OFFSET		0x00f8
198 #define	FPA_QUE2_PAGE_INDEX_OFFSET		0x0100
199 #define	FPA_QUE3_PAGE_INDEX_OFFSET		0x0108
200 #define	FPA_QUE4_PAGE_INDEX_OFFSET		0x0110
201 #define	FPA_QUE5_PAGE_INDEX_OFFSET		0x0118
202 #define	FPA_QUE6_PAGE_INDEX_OFFSET		0x0120
203 #define	FPA_QUE7_PAGE_INDEX_OFFSET		0x0128
204 #define	FPA_QUE_EXP_OFFSET			0x0130
205 #define	FPA_QUE_ACT_OFFSET			0x0138
206 
207 #endif /* _OCTEON_FPAREG_H_ */
208