| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-pcduino3/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-pine64/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-pinebook/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-orangepi-pc2/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-orangepi-plus-2e/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-orangepi-pc/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-orangepi-one/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-orangepi-pc-plus/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1626 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1716 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-tools/u-boot-2020.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1627 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1717 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-bananapim2/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-rock64/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-rockpro64/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|
| /dports/sysutils/u-boot-sifive-fu540/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1628 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x08000000 macro
1718 #define FSL_CORENET_DEVDISR2_DTSEC1_5 0x00080000 macro
|