1 //===---- MipsABIInfo.cpp - Information about MIPS ABI's ------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8
9 #include "MipsABIInfo.h"
10 #include "MipsRegisterInfo.h"
11 #include "llvm/ADT/StringRef.h"
12 #include "llvm/CodeGen/MachineMemOperand.h"
13 #include "llvm/MC/MCTargetOptions.h"
14 #include "llvm/Support/CommandLine.h"
15 #include "llvm/Support/LowLevelTypeImpl.h"
16
17 using namespace llvm;
18
19 // Note: this option is defined here to be visible from libLLVMMipsAsmParser
20 // and libLLVMMipsCodeGen
21 cl::opt<bool>
22 EmitJalrReloc("mips-jalr-reloc", cl::Hidden,
23 cl::desc("MIPS: Emit R_{MICRO}MIPS_JALR relocation with jalr"),
24 cl::init(true));
25
26 cl::opt<bool>
27 FixLoongson2FBTB("fix-loongson2f-btb", cl::Hidden,
28 cl::desc("MIPS: Enable Loongson 2F BTB workaround"),
29 cl::init(false));
30
31 namespace {
32 static const MCPhysReg O32IntRegs[4] = {Mips::A0, Mips::A1, Mips::A2, Mips::A3};
33
34 static const MCPhysReg Mips64IntRegs[8] = {
35 Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64,
36 Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64};
37 }
38
GetByValArgRegs() const39 ArrayRef<MCPhysReg> MipsABIInfo::GetByValArgRegs() const {
40 if (IsO32())
41 return ArrayRef(O32IntRegs);
42 if (IsN32() || IsN64())
43 return ArrayRef(Mips64IntRegs);
44 llvm_unreachable("Unhandled ABI");
45 }
46
GetVarArgRegs() const47 ArrayRef<MCPhysReg> MipsABIInfo::GetVarArgRegs() const {
48 if (IsO32())
49 return ArrayRef(O32IntRegs);
50 if (IsN32() || IsN64())
51 return ArrayRef(Mips64IntRegs);
52 llvm_unreachable("Unhandled ABI");
53 }
54
GetCalleeAllocdArgSizeInBytes(CallingConv::ID CC) const55 unsigned MipsABIInfo::GetCalleeAllocdArgSizeInBytes(CallingConv::ID CC) const {
56 if (IsO32())
57 return CC != CallingConv::Fast ? 16 : 0;
58 if (IsN32() || IsN64())
59 return 0;
60 llvm_unreachable("Unhandled ABI");
61 }
62
computeTargetABI(const Triple & TT,StringRef CPU,const MCTargetOptions & Options)63 MipsABIInfo MipsABIInfo::computeTargetABI(const Triple &TT, StringRef CPU,
64 const MCTargetOptions &Options) {
65 if (Options.getABIName().startswith("o32"))
66 return MipsABIInfo::O32();
67 if (Options.getABIName().startswith("n32"))
68 return MipsABIInfo::N32();
69 if (Options.getABIName().startswith("n64"))
70 return MipsABIInfo::N64();
71 if (TT.getEnvironment() == llvm::Triple::GNUABIN32)
72 return MipsABIInfo::N32();
73 assert(Options.getABIName().empty() && "Unknown ABI option for MIPS");
74
75 if (TT.isMIPS64())
76 return MipsABIInfo::N64();
77 return MipsABIInfo::O32();
78 }
79
GetStackPtr() const80 unsigned MipsABIInfo::GetStackPtr() const {
81 return ArePtrs64bit() ? Mips::SP_64 : Mips::SP;
82 }
83
GetFramePtr() const84 unsigned MipsABIInfo::GetFramePtr() const {
85 return ArePtrs64bit() ? Mips::FP_64 : Mips::FP;
86 }
87
GetBasePtr() const88 unsigned MipsABIInfo::GetBasePtr() const {
89 return ArePtrs64bit() ? Mips::S7_64 : Mips::S7;
90 }
91
GetGlobalPtr() const92 unsigned MipsABIInfo::GetGlobalPtr() const {
93 return ArePtrs64bit() ? Mips::GP_64 : Mips::GP;
94 }
95
GetNullPtr() const96 unsigned MipsABIInfo::GetNullPtr() const {
97 return ArePtrs64bit() ? Mips::ZERO_64 : Mips::ZERO;
98 }
99
GetZeroReg() const100 unsigned MipsABIInfo::GetZeroReg() const {
101 return AreGprs64bit() ? Mips::ZERO_64 : Mips::ZERO;
102 }
103
GetPtrAdduOp() const104 unsigned MipsABIInfo::GetPtrAdduOp() const {
105 return ArePtrs64bit() ? Mips::DADDu : Mips::ADDu;
106 }
107
GetPtrAddiuOp() const108 unsigned MipsABIInfo::GetPtrAddiuOp() const {
109 return ArePtrs64bit() ? Mips::DADDiu : Mips::ADDiu;
110 }
111
GetPtrSubuOp() const112 unsigned MipsABIInfo::GetPtrSubuOp() const {
113 return ArePtrs64bit() ? Mips::DSUBu : Mips::SUBu;
114 }
115
GetPtrAndOp() const116 unsigned MipsABIInfo::GetPtrAndOp() const {
117 return ArePtrs64bit() ? Mips::AND64 : Mips::AND;
118 }
119
GetGPRMoveOp() const120 unsigned MipsABIInfo::GetGPRMoveOp() const {
121 return ArePtrs64bit() ? Mips::OR64 : Mips::OR;
122 }
123
GetEhDataReg(unsigned I) const124 unsigned MipsABIInfo::GetEhDataReg(unsigned I) const {
125 static const unsigned EhDataReg[] = {
126 Mips::A0, Mips::A1, Mips::A2, Mips::A3
127 };
128 static const unsigned EhDataReg64[] = {
129 Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64
130 };
131
132 return IsN64() ? EhDataReg64[I] : EhDataReg[I];
133 }
134
135