1 /** 2 * Author......: See docs/credits.txt 3 * License.....: MIT 4 */ 5 6 #ifndef _NVML_H 7 #define _NVML_H 8 9 /** 10 * Declarations from nvml.h 11 */ 12 13 typedef struct nvmlDevice_st* nvmlDevice_t; 14 15 typedef struct nvmlPciInfo_st 16 { 17 char busId[16]; //!< The tuple domain:bus:device.function PCI identifier (& NULL terminator) 18 unsigned int domain; //!< The PCI domain on which the device's bus resides, 0 to 0xffff 19 unsigned int bus; //!< The bus on which the device resides, 0 to 0xff 20 unsigned int device; //!< The device's id on the bus, 0 to 31 21 unsigned int pciDeviceId; //!< The combined 16-bit device id and 16-bit vendor id 22 23 // Added in NVML 2.285 API 24 unsigned int pciSubSystemId; //!< The 32-bit Sub System Device ID 25 26 // NVIDIA reserved for internal use only 27 unsigned int reserved0; 28 unsigned int reserved1; 29 unsigned int reserved2; 30 unsigned int reserved3; 31 } nvmlPciInfo_t; 32 33 typedef struct nvmlUtilization_st { 34 unsigned int gpu; // GPU kernel execution last second, percent 35 unsigned int memory; // GPU memory read/write last second, percent 36 } nvmlUtilization_t; 37 38 typedef enum nvmlTemperatureSensors_enum { 39 NVML_TEMPERATURE_GPU = 0 // Temperature sensor for the GPU die 40 } nvmlTemperatureSensors_t; 41 42 typedef enum nvmlReturn_enum { 43 NVML_SUCCESS = 0, // The operation was successful 44 NVML_ERROR_UNINITIALIZED = 1, // NVML was not first initialized with nvmlInit() 45 NVML_ERROR_INVALID_ARGUMENT = 2, // A supplied argument is invalid 46 NVML_ERROR_NOT_SUPPORTED = 3, // The requested operation is not available on target device 47 NVML_ERROR_NO_PERMISSION = 4, // The current user does not have permission for operation 48 NVML_ERROR_ALREADY_INITIALIZED = 5, // Deprecated: Multiple initializations are now allowed through ref counting 49 NVML_ERROR_NOT_FOUND = 6, // A query to find an object was unsuccessful 50 NVML_ERROR_INSUFFICIENT_SIZE = 7, // An input argument is not large enough 51 NVML_ERROR_INSUFFICIENT_POWER = 8, // A device's external power cables are not properly attached 52 NVML_ERROR_DRIVER_NOT_LOADED = 9, // NVIDIA driver is not loaded 53 NVML_ERROR_TIMEOUT = 10, // User provided timeout passed 54 NVML_ERROR_UNKNOWN = 999 // An internal driver error occurred 55 } nvmlReturn_t; 56 57 typedef enum nvmlClockType_enum { 58 NVML_CLOCK_GRAPHICS = 0, 59 NVML_CLOCK_SM = 1, 60 NVML_CLOCK_MEM = 2 61 } nvmlClockType_t; 62 63 typedef enum nvmlTemperatureThresholds_enum 64 { 65 NVML_TEMPERATURE_THRESHOLD_SHUTDOWN = 0, // Temperature at which the GPU will shut down 66 // for HW protection 67 NVML_TEMPERATURE_THRESHOLD_SLOWDOWN = 1, // Temperature at which the GPU will begin slowdown 68 // Keep this last 69 NVML_TEMPERATURE_THRESHOLD_COUNT 70 } nvmlTemperatureThresholds_t; 71 72 /** 73 * Compute mode. 74 * 75 * NVML_COMPUTEMODE_EXCLUSIVE_PROCESS was added in CUDA 4.0. 76 * Earlier CUDA versions supported a single exclusive mode, 77 * which is equivalent to NVML_COMPUTEMODE_EXCLUSIVE_THREAD in CUDA 4.0 and beyond. 78 */ 79 typedef enum nvmlComputeMode_enum 80 { 81 NVML_COMPUTEMODE_DEFAULT = 0, //!< Default compute mode -- multiple contexts per device 82 NVML_COMPUTEMODE_EXCLUSIVE_THREAD = 1, //!< Compute-exclusive-thread mode -- only one context per device, usable from one thread at a time 83 NVML_COMPUTEMODE_PROHIBITED = 2, //!< Compute-prohibited mode -- no contexts per device 84 NVML_COMPUTEMODE_EXCLUSIVE_PROCESS = 3, //!< Compute-exclusive-process mode -- only one context per device, usable from multiple threads at a time 85 86 // Keep this last 87 NVML_COMPUTEMODE_COUNT 88 } nvmlComputeMode_t; 89 90 /** 91 * GPU Operation Mode 92 * 93 * GOM allows to reduce power usage and optimize GPU throughput by disabling GPU features. 94 * 95 * Each GOM is designed to meet specific user needs. 96 */ 97 typedef enum nvmlGom_enum 98 { 99 NVML_GOM_ALL_ON = 0, //!< Everything is enabled and running at full speed 100 101 NVML_GOM_COMPUTE = 1, //!< Designed for running only compute tasks. Graphics operations 102 //!< are not allowed 103 104 NVML_GOM_LOW_DP = 2 //!< Designed for running graphics applications that don't require 105 //!< high bandwidth double precision 106 } nvmlGpuOperationMode_t; 107 108 /***************************************************************************************************/ 109 /** @addtogroup nvmlClocksThrottleReasons 110 * @{ 111 */ 112 /***************************************************************************************************/ 113 114 /** Nothing is running on the GPU and the clocks are dropping to Idle state 115 * \note This limiter may be removed in a later release 116 */ 117 #define nvmlClocksThrottleReasonGpuIdle 0x0000000000000001LL 118 119 /** GPU clocks are limited by current setting of applications clocks 120 * 121 * @see nvmlDeviceSetApplicationsClocks 122 * @see nvmlDeviceGetApplicationsClock 123 */ 124 #define nvmlClocksThrottleReasonApplicationsClocksSetting 0x0000000000000002LL 125 126 /** 127 * @deprecated Renamed to \ref nvmlClocksThrottleReasonApplicationsClocksSetting 128 * as the name describes the situation more accurately. 129 */ 130 #define nvmlClocksThrottleReasonUserDefinedClocks nvmlClocksThrottleReasonApplicationsClocksSetting 131 132 /** SW Power Scaling algorithm is reducing the clocks below requested clocks 133 * 134 * @see nvmlDeviceGetPowerUsage 135 * @see nvmlDeviceSetPowerManagementLimit 136 * @see nvmlDeviceGetPowerManagementLimit 137 */ 138 #define nvmlClocksThrottleReasonSwPowerCap 0x0000000000000004LL 139 140 /** HW Slowdown (reducing the core clocks by a factor of 2 or more) is engaged 141 * 142 * This is an indicator of: 143 * - temperature being too high 144 * - External Power Brake Assertion is triggered (e.g. by the system power supply) 145 * - Power draw is too high and Fast Trigger protection is reducing the clocks 146 * - May be also reported during PState or clock change 147 * - This behavior may be removed in a later release. 148 * 149 * @see nvmlDeviceGetTemperature 150 * @see nvmlDeviceGetTemperatureThreshold 151 * @see nvmlDeviceGetPowerUsage 152 */ 153 #define nvmlClocksThrottleReasonHwSlowdown 0x0000000000000008LL 154 155 /** Some other unspecified factor is reducing the clocks */ 156 #define nvmlClocksThrottleReasonUnknown 0x8000000000000000LL 157 158 /** Bit mask representing no clocks throttling 159 * 160 * Clocks are as high as possible. 161 * */ 162 #define nvmlClocksThrottleReasonNone 0x0000000000000000LL 163 164 /* 165 * End of declarations from nvml.h 166 **/ 167 168 typedef nvmlDevice_t HM_ADAPTER_NVML; 169 170 #if defined(_WIN32) || defined(__WIN32__) 171 #define NVML_API_CALL __stdcall 172 #else 173 #define NVML_API_CALL 174 #endif 175 176 typedef const char * (*NVML_API_CALL NVML_ERROR_STRING) (nvmlReturn_t); 177 typedef int (*NVML_API_CALL NVML_INIT) (void); 178 typedef int (*NVML_API_CALL NVML_SHUTDOWN) (void); 179 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_COUNT) (unsigned int *); 180 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_NAME) (nvmlDevice_t, char *, unsigned int); 181 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_HANDLE_BY_INDEX) (unsigned int, nvmlDevice_t *); 182 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_TEMPERATURE) (nvmlDevice_t, nvmlTemperatureSensors_t, unsigned int *); 183 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_FAN_SPEED) (nvmlDevice_t, unsigned int *); 184 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_UTILIZATION_RATES) (nvmlDevice_t, nvmlUtilization_t *); 185 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_CLOCKINFO) (nvmlDevice_t, nvmlClockType_t, unsigned int *); 186 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_THRESHOLD) (nvmlDevice_t, nvmlTemperatureThresholds_t, unsigned int *); 187 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_CURRPCIELINKGENERATION) (nvmlDevice_t, unsigned int *); 188 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_CURRPCIELINKWIDTH) (nvmlDevice_t, unsigned int *); 189 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_CURRENTCLOCKSTHROTTLEREASONS) (nvmlDevice_t, unsigned long long *); 190 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_SUPPORTEDCLOCKSTHROTTLEREASONS) (nvmlDevice_t, unsigned long long *); 191 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_SET_COMPUTEMODE) (nvmlDevice_t, nvmlComputeMode_t); 192 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_SET_OPERATIONMODE) (nvmlDevice_t, nvmlGpuOperationMode_t); 193 typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_PCIINFO) (nvmlDevice_t, nvmlPciInfo_t *); 194 195 typedef struct hm_nvml_lib 196 { 197 hc_dynlib_t lib; 198 199 NVML_ERROR_STRING nvmlErrorString; 200 NVML_INIT nvmlInit; 201 NVML_SHUTDOWN nvmlShutdown; 202 NVML_DEVICE_GET_COUNT nvmlDeviceGetCount; 203 NVML_DEVICE_GET_NAME nvmlDeviceGetName; 204 NVML_DEVICE_GET_HANDLE_BY_INDEX nvmlDeviceGetHandleByIndex; 205 NVML_DEVICE_GET_TEMPERATURE nvmlDeviceGetTemperature; 206 NVML_DEVICE_GET_FAN_SPEED nvmlDeviceGetFanSpeed; 207 NVML_DEVICE_GET_UTILIZATION_RATES nvmlDeviceGetUtilizationRates; 208 NVML_DEVICE_GET_CLOCKINFO nvmlDeviceGetClockInfo; 209 NVML_DEVICE_GET_THRESHOLD nvmlDeviceGetTemperatureThreshold; 210 NVML_DEVICE_GET_CURRPCIELINKGENERATION nvmlDeviceGetCurrPcieLinkGeneration; 211 NVML_DEVICE_GET_CURRPCIELINKWIDTH nvmlDeviceGetCurrPcieLinkWidth; 212 NVML_DEVICE_GET_CURRENTCLOCKSTHROTTLEREASONS nvmlDeviceGetCurrentClocksThrottleReasons; 213 NVML_DEVICE_GET_SUPPORTEDCLOCKSTHROTTLEREASONS nvmlDeviceGetSupportedClocksThrottleReasons; 214 NVML_DEVICE_GET_PCIINFO nvmlDeviceGetPciInfo; 215 216 } hm_nvml_lib_t; 217 218 typedef hm_nvml_lib_t NVML_PTR; 219 220 int nvml_init (void *hashcat_ctx); 221 void nvml_close (void *hashcat_ctx); 222 const char *hm_NVML_nvmlErrorString (NVML_PTR *nvml, const nvmlReturn_t nvml_rc); 223 224 int hm_NVML_nvmlInit (void *hashcat_ctx); 225 int hm_NVML_nvmlShutdown (void *hashcat_ctx); 226 int hm_NVML_nvmlDeviceGetCount (void *hashcat_ctx, unsigned int *deviceCount); 227 int hm_NVML_nvmlDeviceGetHandleByIndex (void *hashcat_ctx, unsigned int device_index, nvmlDevice_t *device); 228 int hm_NVML_nvmlDeviceGetTemperature (void *hashcat_ctx, nvmlDevice_t device, nvmlTemperatureSensors_t sensorType, unsigned int *temp); 229 int hm_NVML_nvmlDeviceGetFanSpeed (void *hashcat_ctx, nvmlDevice_t device, unsigned int *speed); 230 int hm_NVML_nvmlDeviceGetUtilizationRates (void *hashcat_ctx, nvmlDevice_t device, nvmlUtilization_t *utilization); 231 int hm_NVML_nvmlDeviceGetClockInfo (void *hashcat_ctx, nvmlDevice_t device, nvmlClockType_t type, unsigned int *clockfreq); 232 int hm_NVML_nvmlDeviceGetTemperatureThreshold (void *hashcat_ctx, nvmlDevice_t device, nvmlTemperatureThresholds_t thresholdType, unsigned int *temp); 233 int hm_NVML_nvmlDeviceGetCurrPcieLinkWidth (void *hashcat_ctx, nvmlDevice_t device, unsigned int *currLinkWidth); 234 int hm_NVML_nvmlDeviceGetPciInfo (void *hashcat_ctx, nvmlDevice_t device, nvmlPciInfo_t *pci); 235 236 #endif // _NVML_H 237