1 //*****************************************************************************
2 //
3 //  i2c.h
4 //
5 //  Prototypes for the I2C Driver.
6 //
7 //  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
8 //
9 //
10 //  Redistribution and use in source and binary forms, with or without
11 //  modification, are permitted provided that the following conditions
12 //  are met:
13 //
14 //    Redistributions of source code must retain the above copyright
15 //    notice, this list of conditions and the following disclaimer.
16 //
17 //    Redistributions in binary form must reproduce the above copyright
18 //    notice, this list of conditions and the following disclaimer in the
19 //    documentation and/or other materials provided with the
20 //    distribution.
21 //
22 //    Neither the name of Texas Instruments Incorporated nor the names of
23 //    its contributors may be used to endorse or promote products derived
24 //    from this software without specific prior written permission.
25 //
26 //  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 //  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 //  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29 //  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30 //  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31 //  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32 //  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33 //  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34 //  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35 //  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36 //  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 //
38 //*****************************************************************************
39 
40 #ifndef __DRIVERLIB_I2C_H__
41 #define __DRIVERLIB_I2C_H__
42 
43 //*****************************************************************************
44 //
45 // If building with a C++ compiler, make all of the definitions in this header
46 // have a C binding.
47 //
48 //*****************************************************************************
49 #ifdef __cplusplus
50 extern "C"
51 {
52 #endif
53 
54 //*****************************************************************************
55 //
56 // Defines for the API.
57 //
58 //*****************************************************************************
59 
60 //*****************************************************************************
61 //
62 // Interrupt defines.
63 //
64 //*****************************************************************************
65 #define I2C_INT_MASTER          0x00000001
66 #define I2C_INT_SLAVE           0x00000002
67 
68 //*****************************************************************************
69 //
70 // I2C Master commands.
71 //
72 //*****************************************************************************
73 #define I2C_MASTER_CMD_SINGLE_SEND                                            \
74                                 0x00000007
75 #define I2C_MASTER_CMD_SINGLE_RECEIVE                                         \
76                                 0x00000007
77 #define I2C_MASTER_CMD_BURST_SEND_START                                       \
78                                 0x00000003
79 #define I2C_MASTER_CMD_BURST_SEND_CONT                                        \
80                                 0x00000001
81 #define I2C_MASTER_CMD_BURST_SEND_FINISH                                      \
82                                 0x00000005
83 #define I2C_MASTER_CMD_BURST_SEND_STOP                                        \
84                                 0x00000004
85 #define I2C_MASTER_CMD_BURST_SEND_ERROR_STOP                                  \
86                                 0x00000004
87 #define I2C_MASTER_CMD_BURST_RECEIVE_START                                    \
88                                 0x0000000b
89 #define I2C_MASTER_CMD_BURST_RECEIVE_CONT                                     \
90                                 0x00000009
91 #define I2C_MASTER_CMD_BURST_RECEIVE_FINISH                                   \
92                                 0x00000005
93 #define I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP                               \
94                                 0x00000004
95 #define I2C_MASTER_CMD_QUICK_COMMAND                                          \
96                                 0x00000027
97 #define I2C_MASTER_CMD_HS_MASTER_CODE_SEND                                    \
98                                 0x00000013
99 #define I2C_MASTER_CMD_FIFO_SINGLE_SEND                                       \
100                                 0x00000046
101 #define I2C_MASTER_CMD_FIFO_SINGLE_RECEIVE                                    \
102                                 0x00000046
103 #define I2C_MASTER_CMD_FIFO_BURST_SEND_START                                  \
104                                 0x00000042
105 #define I2C_MASTER_CMD_FIFO_BURST_SEND_CONT                                   \
106                                 0x00000040
107 #define I2C_MASTER_CMD_FIFO_BURST_SEND_FINISH                                 \
108                                 0x00000044
109 #define I2C_MASTER_CMD_FIFO_BURST_SEND_ERROR_STOP                             \
110                                 0x00000004
111 #define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_START                               \
112                                 0x0000004a
113 #define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_CONT                                \
114                                 0x00000048
115 #define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_FINISH                              \
116                                 0x00000044
117 #define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_ERROR_STOP                          \
118                                 0x00000004
119 
120 //*****************************************************************************
121 //
122 // I2C Master glitch filter configuration.
123 //
124 //*****************************************************************************
125 #define I2C_MASTER_GLITCH_FILTER_DISABLED                                     \
126                                 0
127 #define I2C_MASTER_GLITCH_FILTER_1                                            \
128                                 0x00010000
129 #define I2C_MASTER_GLITCH_FILTER_2                                            \
130                                 0x00020000
131 #define I2C_MASTER_GLITCH_FILTER_3                                            \
132                                 0x00030000
133 #define I2C_MASTER_GLITCH_FILTER_4                                            \
134                                 0x00040000
135 #define I2C_MASTER_GLITCH_FILTER_8                                            \
136                                 0x00050000
137 #define I2C_MASTER_GLITCH_FILTER_16                                           \
138                                 0x00060000
139 #define I2C_MASTER_GLITCH_FILTER_32                                           \
140                                 0x00070000
141 
142 //*****************************************************************************
143 //
144 // I2C Master error status.
145 //
146 //*****************************************************************************
147 #define I2C_MASTER_ERR_NONE     0
148 #define I2C_MASTER_ERR_ADDR_ACK 0x00000004
149 #define I2C_MASTER_ERR_DATA_ACK 0x00000008
150 #define I2C_MASTER_ERR_ARB_LOST 0x00000010
151 #define I2C_MASTER_ERR_CLK_TOUT 0x00000080
152 
153 //*****************************************************************************
154 //
155 // I2C Slave action requests
156 //
157 //*****************************************************************************
158 #define I2C_SLAVE_ACT_NONE      0
159 #define I2C_SLAVE_ACT_RREQ      0x00000001  // Master has sent data
160 #define I2C_SLAVE_ACT_TREQ      0x00000002  // Master has requested data
161 #define I2C_SLAVE_ACT_RREQ_FBR  0x00000005  // Master has sent first byte
162 #define I2C_SLAVE_ACT_OWN2SEL   0x00000008  // Master requested secondary slave
163 #define I2C_SLAVE_ACT_QCMD      0x00000010  // Master has sent a Quick Command
164 #define I2C_SLAVE_ACT_QCMD_DATA 0x00000020  // Master Quick Command value
165 
166 //*****************************************************************************
167 //
168 // Miscellaneous I2C driver definitions.
169 //
170 //*****************************************************************************
171 #define I2C_MASTER_MAX_RETRIES  1000        // Number of retries
172 
173 //*****************************************************************************
174 //
175 // I2C Master interrupts.
176 //
177 //*****************************************************************************
178 #define I2C_MASTER_INT_RX_FIFO_FULL                                           \
179                                 0x00000800  // RX FIFO Full Interrupt
180 #define I2C_MASTER_INT_TX_FIFO_EMPTY                                          \
181                                 0x00000400  // TX FIFO Empty Interrupt
182 #define I2C_MASTER_INT_RX_FIFO_REQ                                            \
183                                 0x00000200  // RX FIFO Request Interrupt
184 #define I2C_MASTER_INT_TX_FIFO_REQ                                            \
185                                 0x00000100  // TX FIFO Request Interrupt
186 #define I2C_MASTER_INT_ARB_LOST                                               \
187                                 0x00000080  // Arb Lost Interrupt
188 #define I2C_MASTER_INT_STOP     0x00000040  // Stop Condition Interrupt
189 #define I2C_MASTER_INT_START    0x00000020  // Start Condition Interrupt
190 #define I2C_MASTER_INT_NACK     0x00000010  // Addr/Data NACK Interrupt
191 #define I2C_MASTER_INT_TX_DMA_DONE                                            \
192                                 0x00000008  // TX DMA Complete Interrupt
193 #define I2C_MASTER_INT_RX_DMA_DONE                                            \
194                                 0x00000004  // RX DMA Complete Interrupt
195 #define I2C_MASTER_INT_TIMEOUT  0x00000002  // Clock Timeout Interrupt
196 #define I2C_MASTER_INT_DATA     0x00000001  // Data Interrupt
197 
198 //*****************************************************************************
199 //
200 // I2C Slave interrupts.
201 //
202 //*****************************************************************************
203 #define I2C_SLAVE_INT_RX_FIFO_FULL                                            \
204                                 0x00000100  // RX FIFO Full Interrupt
205 #define I2C_SLAVE_INT_TX_FIFO_EMPTY                                           \
206                                 0x00000080  // TX FIFO Empty Interrupt
207 #define I2C_SLAVE_INT_RX_FIFO_REQ                                             \
208                                 0x00000040  // RX FIFO Request Interrupt
209 #define I2C_SLAVE_INT_TX_FIFO_REQ                                             \
210                                 0x00000020  // TX FIFO Request Interrupt
211 #define I2C_SLAVE_INT_TX_DMA_DONE                                             \
212                                 0x00000010  // TX DMA Complete Interrupt
213 #define I2C_SLAVE_INT_RX_DMA_DONE                                             \
214                                 0x00000008  // RX DMA Complete Interrupt
215 #define I2C_SLAVE_INT_STOP      0x00000004  // Stop Condition Interrupt
216 #define I2C_SLAVE_INT_START     0x00000002  // Start Condition Interrupt
217 #define I2C_SLAVE_INT_DATA      0x00000001  // Data Interrupt
218 
219 //*****************************************************************************
220 //
221 // I2C Slave FIFO configuration macros.
222 //
223 //*****************************************************************************
224 #define I2C_SLAVE_TX_FIFO_ENABLE                                              \
225                                 0x00000002
226 #define I2C_SLAVE_RX_FIFO_ENABLE                                              \
227                                 0x00000004
228 
229 //*****************************************************************************
230 //
231 // I2C FIFO configuration macros.
232 //
233 //*****************************************************************************
234 #define I2C_FIFO_CFG_TX_MASTER  0x00000000
235 #define I2C_FIFO_CFG_TX_SLAVE   0x00008000
236 #define I2C_FIFO_CFG_RX_MASTER  0x00000000
237 #define I2C_FIFO_CFG_RX_SLAVE   0x80000000
238 #define I2C_FIFO_CFG_TX_MASTER_DMA                                            \
239                                 0x00002000
240 #define I2C_FIFO_CFG_TX_SLAVE_DMA                                             \
241                                 0x0000a000
242 #define I2C_FIFO_CFG_RX_MASTER_DMA                                            \
243                                 0x20000000
244 #define I2C_FIFO_CFG_RX_SLAVE_DMA                                             \
245                                 0xa0000000
246 #define I2C_FIFO_CFG_TX_NO_TRIG 0x00000000
247 #define I2C_FIFO_CFG_TX_TRIG_1  0x00000001
248 #define I2C_FIFO_CFG_TX_TRIG_2  0x00000002
249 #define I2C_FIFO_CFG_TX_TRIG_3  0x00000003
250 #define I2C_FIFO_CFG_TX_TRIG_4  0x00000004
251 #define I2C_FIFO_CFG_TX_TRIG_5  0x00000005
252 #define I2C_FIFO_CFG_TX_TRIG_6  0x00000006
253 #define I2C_FIFO_CFG_TX_TRIG_7  0x00000007
254 #define I2C_FIFO_CFG_TX_TRIG_8  0x00000008
255 #define I2C_FIFO_CFG_RX_NO_TRIG 0x00000000
256 #define I2C_FIFO_CFG_RX_TRIG_1  0x00010000
257 #define I2C_FIFO_CFG_RX_TRIG_2  0x00020000
258 #define I2C_FIFO_CFG_RX_TRIG_3  0x00030000
259 #define I2C_FIFO_CFG_RX_TRIG_4  0x00040000
260 #define I2C_FIFO_CFG_RX_TRIG_5  0x00050000
261 #define I2C_FIFO_CFG_RX_TRIG_6  0x00060000
262 #define I2C_FIFO_CFG_RX_TRIG_7  0x00070000
263 #define I2C_FIFO_CFG_RX_TRIG_8  0x00080000
264 
265 //*****************************************************************************
266 //
267 // I2C FIFO status.
268 //
269 //*****************************************************************************
270 #define I2C_FIFO_RX_BELOW_TRIG_LEVEL                                          \
271                                 0x00040000
272 #define I2C_FIFO_RX_FULL        0x00020000
273 #define I2C_FIFO_RX_EMPTY       0x00010000
274 #define I2C_FIFO_TX_BELOW_TRIG_LEVEL                                          \
275                                 0x00000004
276 #define I2C_FIFO_TX_FULL        0x00000002
277 #define I2C_FIFO_TX_EMPTY       0x00000001
278 
279 //*****************************************************************************
280 //
281 // Prototypes for the APIs.
282 //
283 //*****************************************************************************
284 extern void I2CIntRegister(uint32_t ui32Base, void(pfnHandler)(void));
285 extern void I2CIntUnregister(uint32_t ui32Base);
286 extern void I2CTxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config);
287 extern void I2CTxFIFOFlush(uint32_t ui32Base);
288 extern void I2CRxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config);
289 extern void I2CRxFIFOFlush(uint32_t ui32Base);
290 extern uint32_t I2CFIFOStatus(uint32_t ui32Base);
291 extern void I2CFIFODataPut(uint32_t ui32Base, uint8_t ui8Data);
292 extern uint32_t I2CFIFODataPutNonBlocking(uint32_t ui32Base,
293                                           uint8_t ui8Data);
294 extern uint32_t I2CFIFODataGet(uint32_t ui32Base);
295 extern uint32_t I2CFIFODataGetNonBlocking(uint32_t ui32Base,
296                                           uint8_t *pui8Data);
297 extern void I2CMasterBurstLengthSet(uint32_t ui32Base,
298                                     uint8_t ui8Length);
299 extern uint32_t I2CMasterBurstCountGet(uint32_t ui32Base);
300 extern void I2CMasterGlitchFilterConfigSet(uint32_t ui32Base,
301                                            uint32_t ui32Config);
302 extern void I2CSlaveFIFOEnable(uint32_t ui32Base, uint32_t ui32Config);
303 extern void I2CSlaveFIFODisable(uint32_t ui32Base);
304 extern bool I2CMasterBusBusy(uint32_t ui32Base);
305 extern bool I2CMasterBusy(uint32_t ui32Base);
306 extern void I2CMasterControl(uint32_t ui32Base, uint32_t ui32Cmd);
307 extern uint32_t I2CMasterDataGet(uint32_t ui32Base);
308 extern void I2CMasterDataPut(uint32_t ui32Base, uint8_t ui8Data);
309 extern void I2CMasterDisable(uint32_t ui32Base);
310 extern void I2CMasterEnable(uint32_t ui32Base);
311 extern uint32_t I2CMasterErr(uint32_t ui32Base);
312 extern void I2CMasterInitExpClk(uint32_t ui32Base, uint32_t ui32SCLFreq);
313 extern void I2CMasterIntClear(uint32_t ui32Base);
314 extern void I2CMasterIntDisable(uint32_t ui32Base);
315 extern void I2CMasterIntEnable(uint32_t ui32Base);
316 extern bool I2CMasterIntStatus(uint32_t ui32Base, bool bMasked);
317 extern void I2CMasterIntEnableEx(uint32_t ui32Base,
318                                  uint32_t ui32IntFlags);
319 extern void I2CMasterIntDisableEx(uint32_t ui32Base,
320                                   uint32_t ui32IntFlags);
321 extern uint32_t I2CMasterIntStatusEx(uint32_t ui32Base,
322                                        bool bMasked);
323 extern void I2CMasterIntClearEx(uint32_t ui32Base,
324                                 uint32_t ui32IntFlags);
325 extern void I2CMasterTimeoutSet(uint32_t ui32Base, uint32_t ui32Value);
326 extern void I2CSlaveACKOverride(uint32_t ui32Base, bool bEnable);
327 extern void I2CSlaveACKValueSet(uint32_t ui32Base, bool bACK);
328 extern uint32_t I2CMasterLineStateGet(uint32_t ui32Base);
329 extern void I2CMasterSlaveAddrSet(uint32_t ui32Base,
330                                   uint8_t ui8SlaveAddr,
331                                   bool bReceive);
332 extern uint32_t I2CSlaveDataGet(uint32_t ui32Base);
333 extern void I2CSlaveDataPut(uint32_t ui32Base, uint8_t ui8Data);
334 extern void I2CSlaveDisable(uint32_t ui32Base);
335 extern void I2CSlaveEnable(uint32_t ui32Base);
336 extern void I2CSlaveInit(uint32_t ui32Base, uint8_t ui8SlaveAddr);
337 extern void I2CSlaveAddressSet(uint32_t ui32Base, uint8_t ui8AddrNum,
338                                  uint8_t ui8SlaveAddr);
339 extern void I2CSlaveIntClear(uint32_t ui32Base);
340 extern void I2CSlaveIntDisable(uint32_t ui32Base);
341 extern void I2CSlaveIntEnable(uint32_t ui32Base);
342 extern void I2CSlaveIntClearEx(uint32_t ui32Base, uint32_t ui32IntFlags);
343 extern void I2CSlaveIntDisableEx(uint32_t ui32Base,
344                                  uint32_t ui32IntFlags);
345 extern void I2CSlaveIntEnableEx(uint32_t ui32Base, uint32_t ui32IntFlags);
346 extern bool I2CSlaveIntStatus(uint32_t ui32Base, bool bMasked);
347 extern uint32_t I2CSlaveIntStatusEx(uint32_t ui32Base,
348                                       bool bMasked);
349 extern uint32_t I2CSlaveStatus(uint32_t ui32Base);
350 
351 //*****************************************************************************
352 //
353 // Mark the end of the C bindings section for C++ compilers.
354 //
355 //*****************************************************************************
356 #ifdef __cplusplus
357 }
358 #endif
359 
360 #endif // __DRIVERLIB_I2C_H__
361