1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2015 QLogic Corporation. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 /* 28 * File Name: exioct.h 29 * 30 * San/Device Management Ioctl Header 31 * File is created to adhere to Solaris requirement using 8-space tabs. 32 * 33 * !!!!! PLEASE DO NOT REMOVE THE TABS !!!!! 34 * !!!!! PLEASE NO SINGLE LINE COMMENTS: // !!!!! 35 * !!!!! PLEASE NO MORE THAN 80 CHARS PER LINE !!!!! 36 * 37 * *********************************************************************** 38 * * ** 39 * * NOTICE ** 40 * * COPYRIGHT (C) 2000-2015 QLOGIC CORPORATION ** 41 * * ALL RIGHTS RESERVED ** 42 * * ** 43 * *********************************************************************** 44 */ 45 46 #ifndef _EXIOCT_H 47 #define _EXIOCT_H 48 49 #ifdef __cplusplus 50 extern "C" { 51 #endif 52 53 #include <exioctso.h> 54 55 /* 56 * NOTE: the following version defines must be updated each time the 57 * changes made may affect the backward compatibility of the 58 * input/output relations of the SDM IOCTL functions. 59 */ 60 #define EXT_VERSION 5 61 62 /* 63 * OS independent General definitions 64 */ 65 #define EXT_DEF_SIGNATURE_SIZE 8 66 #define EXT_DEF_WWN_NAME_SIZE 8 67 #define EXT_DEF_WWP_NAME_SIZE 8 68 #define EXT_DEF_SERIAL_NUM_SIZE 4 69 #define EXT_DEF_PORTID_SIZE 4 70 #define EXT_DEF_PORTID_SIZE_ACTUAL 3 71 #define EXT_DEF_MAX_STR_SIZE 128 72 #define EXT_DEF_SCSI_PASSTHRU_CDB_LENGTH 16 73 #define EXT_DEF_MAC_ADDRESS_SIZE 6 74 75 #define EXT_DEF_ADDR_MODE_32 1 76 #define EXT_DEF_ADDR_MODE_64 2 77 78 /* 79 * *********************************************************************** 80 * OS dependent General configuration defines 81 * *********************************************************************** 82 */ 83 #define EXT_DEF_MAX_HBA EXT_DEF_MAX_HBA_OS 84 #define EXT_DEF_MAX_BUS EXT_DEF_MAX_BUS_OS 85 #define EXT_DEF_MAX_TARGET EXT_DEF_MAX_TARGET_OS 86 #define EXT_DEF_MAX_LUN EXT_DEF_MAX_LUN_OS 87 #define EXT_DEF_NON_SCSI3_MAX_LUN EXT_DEF_NON_SCSI3_MAX_LUN_OS 88 89 /* 90 * *********************************************************************** 91 * Common header struct definitions for San/Device Mgmt 92 * *********************************************************************** 93 */ 94 typedef struct { 95 UINT64 Signature; /* 8 chars string */ 96 UINT64 RequestAdr; /* 8 */ 97 UINT64 ResponseAdr; /* 8 */ 98 UINT64 VendorSpecificData; /* 8 chars string */ 99 UINT32 Status; /* 4 */ 100 UINT32 DetailStatus; /* 4 */ 101 UINT32 Reserved1; /* 4 */ 102 UINT32 RequestLen; /* 4 */ 103 UINT32 ResponseLen; /* 4 */ 104 UINT16 AddrMode; /* 2 */ 105 UINT16 Version; /* 2 */ 106 UINT16 SubCode; /* 2 */ 107 UINT16 Instance; /* 2 */ 108 UINT16 HbaSelect; /* 2 */ 109 UINT16 VendorSpecificStatus[11]; /* 22 */ 110 } EXT_IOCTL, *PEXT_IOCTL; /* size = 84 / 0x54 */ 111 112 typedef union _ext_signature { 113 UINT64 Signature; 114 char bytes[EXT_DEF_SIGNATURE_SIZE]; 115 } ext_sig_t; 116 117 /* 118 * Addressing mode used by the user application 119 */ 120 #define EXT_ADDR_MODE EXT_ADDR_MODE_OS 121 122 /* 123 * Status. These macros are being used for setting Status field in 124 * EXT_IOCTL structure. 125 */ 126 #define EXT_STATUS_OK 0 127 #define EXT_STATUS_ERR 1 128 #define EXT_STATUS_BUSY 2 129 #define EXT_STATUS_PENDING 3 130 #define EXT_STATUS_SUSPENDED 4 131 #define EXT_STATUS_RETRY_PENDING 5 132 #define EXT_STATUS_INVALID_PARAM 6 133 #define EXT_STATUS_DATA_OVERRUN 7 134 #define EXT_STATUS_DATA_UNDERRUN 8 135 #define EXT_STATUS_DEV_NOT_FOUND 9 136 #define EXT_STATUS_COPY_ERR 10 137 #define EXT_STATUS_MAILBOX 11 138 #define EXT_STATUS_UNSUPPORTED_SUBCODE 12 139 #define EXT_STATUS_UNSUPPORTED_VERSION 13 140 #define EXT_STATUS_MS_NO_RESPONSE 14 141 #define EXT_STATUS_SCSI_STATUS 15 142 #define EXT_STATUS_BUFFER_TOO_SMALL 16 143 #define EXT_STATUS_NO_MEMORY 17 144 #define EXT_STATUS_UNKNOWN 18 145 #define EXT_STATUS_UNKNOWN_DSTATUS 19 146 #define EXT_STATUS_INVALID_REQUEST 20 147 #define EXT_STATUS_DEVICE_NOT_READY 21 148 #define EXT_STATUS_DEVICE_OFFLINE 22 149 #define EXT_STATUS_HBA_NOT_READY 23 150 #define EXT_STATUS_HBA_QUEUE_FULL 24 151 #define EXT_STATUS_INVALID_VPINDEX 25 152 153 /* 154 * Detail Status contains the SCSI bus status codes. 155 */ 156 157 #define EXT_DSTATUS_GOOD 0x00 158 #define EXT_DSTATUS_CHECK_CONDITION 0x02 159 #define EXT_DSTATUS_CONDITION_MET 0x04 160 #define EXT_DSTATUS_BUSY 0x08 161 #define EXT_DSTATUS_INTERMEDIATE 0x10 162 #define EXT_DSTATUS_INTERMEDIATE_COND_MET 0x14 163 #define EXT_DSTATUS_RESERVATION_CONFLICT 0x18 164 #define EXT_DSTATUS_COMMAND_TERMINATED 0x22 165 #define EXT_DSTATUS_QUEUE_FULL 0x28 166 167 /* 168 * Detail Status contains the needed Response buffer space(bytes) 169 * when Status = EXT_STATUS_BUFFER_TOO_SMALL 170 */ 171 172 173 /* 174 * Detail Status contains one of the following codes 175 * when Status = EXT_STATUS_INVALID_PARAM or 176 * = EXT_STATUS_DEV_NOT_FOUND 177 */ 178 #define EXT_DSTATUS_NOADNL_INFO 0x00 179 #define EXT_DSTATUS_HBA_INST 0x01 180 #define EXT_DSTATUS_TARGET 0x02 181 #define EXT_DSTATUS_LUN 0x03 182 #define EXT_DSTATUS_REQUEST_LEN 0x04 183 #define EXT_DSTATUS_PATH_INDEX 0x05 184 185 /* 186 * Currently supported DeviceControl / ioctl command codes 187 */ 188 #define EXT_CC_QUERY EXT_CC_QUERY_OS 189 #define EXT_CC_SEND_FCCT_PASSTHRU EXT_CC_SEND_FCCT_PASSTHRU_OS 190 #define EXT_CC_REG_AEN EXT_CC_REG_AEN_OS 191 #define EXT_CC_GET_AEN EXT_CC_GET_AEN_OS 192 #define EXT_CC_SEND_ELS_RNID EXT_CC_SEND_ELS_RNID_OS 193 #define EXT_CC_SEND_SCSI_PASSTHRU EXT_CC_SCSI_PASSTHRU_OS 194 #define EXT_CC_READ_HOST_PARAMS EXT_CC_READ_HOST_PARAMS_OS 195 #define EXT_CC_READ_RISC_PARAMS EXT_CC_READ_RISC_PARAMS_OS 196 #define EXT_CC_UPDATE_HOST_PARAMS EXT_CC_UPDATE_HOST_PARAMS_OS 197 #define EXT_CC_UPDATE_RISC_PARAMS EXT_CC_UPDATE_RISC_PARAMS_OS 198 #define EXT_CC_READ_NVRAM EXT_CC_READ_NVRAM_OS 199 #define EXT_CC_UPDATE_NVRAM EXT_CC_UPDATE_NVRAM_OS 200 #define EXT_CC_HOST_IDX EXT_CC_HOST_IDX_OS 201 #define EXT_CC_LOOPBACK EXT_CC_LOOPBACK_OS 202 #define EXT_CC_READ_OPTION_ROM EXT_CC_READ_OPTION_ROM_OS 203 #define EXT_CC_READ_OPTION_ROM_EX EXT_CC_READ_OPTION_ROM_EX_OS 204 #define EXT_CC_UPDATE_OPTION_ROM EXT_CC_UPDATE_OPTION_ROM_OS 205 #define EXT_CC_UPDATE_OPTION_ROM_EX EXT_CC_UPDATE_OPTION_ROM_EX_OS 206 #define EXT_CC_GET_VPD EXT_CC_GET_VPD_OS 207 #define EXT_CC_SET_VPD EXT_CC_SET_VPD_OS 208 #define EXT_CC_GET_FCACHE EXT_CC_GET_FCACHE_OS 209 #define EXT_CC_GET_FCACHE_EX EXT_CC_GET_FCACHE_EX_OS 210 #define EXT_CC_HOST_DRVNAME EXT_CC_HOST_DRVNAME_OS 211 #define EXT_CC_GET_SFP_DATA EXT_CC_GET_SFP_DATA_OS 212 #define EXT_CC_WWPN_TO_SCSIADDR EXT_CC_WWPN_TO_SCSIADDR_OS 213 #define EXT_CC_PORT_PARAM EXT_CC_PORT_PARAM_OS 214 #define EXT_CC_GET_PCI_DATA EXT_CC_GET_PCI_DATA_OS 215 #define EXT_CC_GET_FWEXTTRACE EXT_CC_GET_FWEXTTRACE_OS 216 #define EXT_CC_GET_FWFCETRACE EXT_CC_GET_FWFCETRACE_OS 217 #define EXT_CC_GET_VP_CNT_ID EXT_CC_GET_VP_CNT_ID_OS 218 #define EXT_CC_VPORT_CMD EXT_CC_VPORT_CMD_OS 219 #define EXT_CC_ACCESS_FLASH EXT_CC_ACCESS_FLASH_OS 220 #define EXT_CC_RESET_FW EXT_CC_RESET_FW_OS 221 #define EXT_CC_I2C_DATA EXT_CC_I2C_DATA_OS 222 #define EXT_CC_DUMP EXT_CC_DUMP_OS 223 #define EXT_CC_SERDES_REG_OP EXT_CC_SERDES_REG_OP_OS 224 #define EXT_CC_VF_STATE EXT_CC_VF_STATE_OS 225 #define EXT_CC_SERDES_REG_OP_EX EXT_CC_SERDES_REG_OP_EX_OS 226 #define EXT_CC_SEND_ELS_PASSTHRU EXT_CC_ELS_PASSTHRU_OS 227 #define EXT_CC_FLASH_UPDATE_CAPS EXT_CC_FLASH_UPDATE_CAPS_OS 228 #define EXT_CC_GET_BBCR_DATA EXT_CC_GET_BBCR_DATA_OS 229 /* 230 * HBA port operations 231 */ 232 #define EXT_CC_GET_DATA EXT_CC_GET_DATA_OS 233 #define EXT_CC_SET_DATA EXT_CC_SET_DATA_OS 234 235 /* 236 * The following DeviceControl / ioctl command codes currently are not 237 * supported. 238 */ 239 #define EXT_CC_SEND_ELS_RTIN EXT_CC_SEND_ELS_RTIN_OS 240 241 242 /* 243 * *********************************************************************** 244 * EXT_IOCTL SubCode definition. 245 * These macros are being used for setting SubCode field in EXT_IOCTL 246 * structure. 247 * *********************************************************************** 248 */ 249 250 /* 251 * Query. 252 * Uses with EXT_QUERY as the ioctl code. 253 */ 254 #define EXT_SC_QUERY_HBA_NODE 1 255 #define EXT_SC_QUERY_HBA_PORT 2 256 #define EXT_SC_QUERY_DISC_PORT 3 257 #define EXT_SC_QUERY_DISC_TGT 4 258 #define EXT_SC_QUERY_DISC_LUN 5 /* Currently Not Supported */ 259 #define EXT_SC_QUERY_DRIVER 6 260 #define EXT_SC_QUERY_FW 7 261 #define EXT_SC_QUERY_CHIP 8 262 #define EXT_SC_QUERY_CNA_PORT 9 263 #define EXT_SC_QUERY_ADAPTER_VERSIONS 10 264 265 /* 266 * Get. 267 * Uses with EXT_GET_DATA as the ioctl code 268 */ 269 /* 1 - 99 Common */ 270 #define EXT_SC_GET_SCSI_ADDR 1 /* Currently Not Supported */ 271 #define EXT_SC_GET_ERR_DETECTIONS 2 /* Currently Not Supported */ 272 #define EXT_SC_GET_STATISTICS 3 273 #define EXT_SC_GET_BUS_MODE 4 /* Currently Not Supported */ 274 #define EXT_SC_GET_DR_DUMP_BUF 5 /* Currently Not Supported */ 275 #define EXT_SC_GET_RISC_CODE 6 276 #define EXT_SC_GET_FLASH_RAM 7 277 #define EXT_SC_GET_BEACON_STATE 8 278 #define EXT_SC_GET_DCBX_PARAM 9 279 #define EXT_SC_GET_FCF_LIST 10 280 #define EXT_SC_GET_RESOURCE_CNTS 11 281 #define EXT_SC_GET_PRIV_STATS 12 282 283 /* 100 - 199 FC_INTF_TYPE */ 284 #define EXT_SC_GET_LINK_STATUS 101 /* Currently Not Supported */ 285 #define EXT_SC_GET_LOOP_ID 102 /* Currently Not Supported */ 286 #define EXT_SC_GET_LUN_BITMASK 103 287 #define EXT_SC_GET_PORT_DATABASE 104 /* Currently Not Supported */ 288 #define EXT_SC_GET_PORT_DATABASE_MEM 105 /* Currently Not Supported */ 289 #define EXT_SC_GET_PORT_SUMMARY 106 290 #define EXT_SC_GET_POSITION_MAP 107 291 #define EXT_SC_GET_RETRY_CNT 108 /* Currently Not Supported */ 292 #define EXT_SC_GET_RNID 109 293 #define EXT_SC_GET_RTIN 110 /* Currently Not Supported */ 294 #define EXT_SC_GET_FC_LUN_BITMASK 111 295 #define EXT_SC_GET_FC_STATISTICS 112 296 #define EXT_SC_GET_FC4_STATISTICS 113 297 #define EXT_SC_GET_TARGET_ID 114 298 299 300 /* 200 - 299 SCSI_INTF_TYPE */ 301 #define EXT_SC_GET_SEL_TIMEOUT 201 /* Currently Not Supported */ 302 303 #define EXT_DEF_DCBX_PARAM_BUF_SIZE 4096 /* Bytes */ 304 305 /* 306 * Set. 307 * Uses with EXT_SET_DATA as the ioctl code 308 */ 309 /* 1 - 99 Common */ 310 #define EXT_SC_RST_STATISTICS 3 311 #define EXT_SC_SET_BUS_MODE 4 /* Currently Not Supported */ 312 #define EXT_SC_SET_DR_DUMP_BUF 5 /* Currently Not Supported */ 313 #define EXT_SC_SET_RISC_CODE 6 314 #define EXT_SC_SET_FLASH_RAM 7 315 #define EXT_SC_SET_BEACON_STATE 8 316 317 /* special types (non snia) */ 318 #define EXT_SC_SET_PARMS 99 /* dpb */ 319 320 /* 100 - 199 FC_INTF_TYPE */ 321 #define EXT_SC_SET_LUN_BITMASK 103 322 #define EXT_SC_SET_RETRY_CNT 108 /* Currently Not Supported */ 323 #define EXT_SC_SET_RNID 109 324 #define EXT_SC_SET_RTIN 110 /* Currently Not Supported */ 325 #define EXT_SC_SET_FC_LUN_BITMASK 111 326 #define EXT_SC_ADD_TARGET_DEVICE 112 327 #define EXT_SC_SWAP_TARGET_DEVICE 113 328 329 /* 200 - 299 SCSI_INTF_TYPE */ 330 #define EXT_SC_SET_SEL_TIMEOUT 201 /* Currently Not Supported */ 331 332 /* SCSI passthrough */ 333 #define EXT_SC_SEND_SCSI_PASSTHRU 0 334 #define EXT_SC_SEND_FC_SCSI_PASSTHRU 1 335 336 /* NVRAM */ 337 #define EXT_SC_NVRAM_HARDWARE 0 /* Save */ 338 #define EXT_SC_NVRAM_DRIVER 1 /* Driver (Apply) */ 339 #define EXT_SC_NVRAM_ALL 2 /* NVRAM/Driver (Save+Apply) */ 340 341 /* 342 * Vport functions 343 * Used with EXT_CC_VPORT_CMD as the ioctl code. 344 */ 345 #define EXT_VF_SC_VPORT_GETINFO 1 346 #define EXT_VF_SC_VPORT_DELETE 2 347 #define EXT_VF_SC_VPORT_MODIFY 3 348 #define EXT_VF_SC_VPORT_CREATE 4 349 350 /* 351 * Flash access sub codes 352 * Used with EXT_CC_ACCESS_FLASH as the ioctl code. 353 */ 354 #define EXT_SC_FLASH_READ 0 355 #define EXT_SC_FLASH_WRITE 1 356 357 /* 358 * Reset FW subcodes for Schultz 359 * Used with EXT_CC_RESET_FW as the ioctl code. 360 */ 361 #define EXT_SC_RESET_FC_FW 1 362 #define EXT_SC_RESET_MPI_FW 2 363 364 /* 365 * Thermal temp adapter subcodes 366 * Used with EXT_CC_I2C_DATA as the ioctl code. 367 */ 368 #define EXT_SC_GET_BOARD_TEMP 1 369 370 /* 371 * Dump sub codes 372 * Used with EXT_CC_DUMP_OP as the ioctl code. 373 */ 374 #define EXT_SC_DUMP_SIZE 1 375 #define EXT_SC_DUMP_READ 2 376 #define EXT_SC_DUMP_TRIGGER 3 377 378 /* 379 * SerDes Register subcodes 380 * Used with EXT_CC_SERDES_REG_OP and EXT_CC_SERDES_REG_OP_EX 381 * as the ioctl code. 382 */ 383 #define EXT_SC_READ_SERDES_REG 1 384 #define EXT_SC_WRITE_SERDES_REG 2 385 386 /* Flash update capabilities subcommands */ 387 #define EXT_SC_GET_FLASH_UPDATE_CAPS 1 388 #define EXT_SC_SET_FLASH_UPDATE_CAPS 2 389 390 /* Read */ 391 392 /* Write */ 393 394 /* Reset */ 395 396 /* Request struct */ 397 398 399 /* 400 * Response struct 401 */ 402 typedef struct _EXT_HBA_NODE { 403 UINT32 DriverAttr; /* 4 */ 404 UINT32 FWAttr; /* 4 */ 405 UINT16 PortCount; /* 2; 1 */ 406 UINT16 InterfaceType; /* 2; FC/SCSI */ 407 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 408 UINT8 Manufacturer[EXT_DEF_MAX_STR_SIZE]; /* 128; "QLOGIC" */ 409 UINT8 Model[EXT_DEF_MAX_STR_SIZE]; /* 128; "QLA2200" */ 410 UINT8 SerialNum[EXT_DEF_SERIAL_NUM_SIZE]; /* 4; 123 */ 411 UINT8 DriverVersion[EXT_DEF_MAX_STR_SIZE]; /* 128; "7.4.3" */ 412 UINT8 FWVersion[EXT_DEF_MAX_STR_SIZE]; /* 128; "2.1.6" */ 413 UINT8 OptRomVersion[EXT_DEF_MAX_STR_SIZE]; /* 128; "1.44" */ 414 UINT8 MpiVersion[4]; /* 4 */ 415 UINT8 PepFwVersion[4]; /* 4 */ 416 UINT8 Reserved[24]; /* 24 */ 417 } EXT_HBA_NODE, *PEXT_HBA_NODE; /* 696 */ 418 419 /* HBA node query interface type */ 420 #define EXT_DEF_FC_INTF_TYPE 1 421 #define EXT_DEF_SCSI_INTF_TYPE 2 422 #define EXT_DEF_VIRTUAL_FC_INTF_TYPE 3 423 424 typedef struct _EXT_HBA_PORT { 425 UINT64 Target; /* 8 */ 426 UINT32 PortSupportedSpeed; /* 4 */ 427 UINT32 PortSpeed; /* 4 */ 428 UINT16 Type; /* 2; Port Type */ 429 UINT16 State; /* 2; Port State */ 430 UINT16 Mode; /* 2 */ 431 UINT16 DiscPortCount; /* 2 */ 432 UINT16 DiscPortNameType; /* 2; USE_NODE_NAME or */ 433 /* USE_PORT_NAME */ 434 UINT16 DiscTargetCount; /* 2 */ 435 UINT16 Bus; /* 2 */ 436 UINT16 Lun; /* 2 */ 437 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 438 UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4; 3 bytes valid Port Id. */ 439 UINT8 PortSupportedFC4Types; /* 1 */ 440 UINT8 PortActiveFC4Types; /* 1 */ 441 UINT8 FabricName[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 442 UINT16 LinkState2; /* 2; sfp status */ 443 UINT16 LinkState3; /* 2; reserved field */ 444 UINT16 LinkState1; /* 2; sfp status */ 445 UINT16 LinkState6; /* 2; sfp status */ 446 UINT8 Reserved[2]; /* 2 */ 447 } EXT_HBA_PORT, *PEXT_HBA_PORT; /* 64 */ 448 449 /* FC-4 Instrumentation */ 450 typedef struct _EXT_HBA_FC4Statistics { 451 INT64 InputRequests; /* 8 */ 452 INT64 OutputRequests; /* 8 */ 453 INT64 ControlRequests; /* 8 */ 454 INT64 InputMegabytes; /* 8 */ 455 INT64 OutputMegabytes; /* 8 */ 456 UINT64 Reserved[6]; /* 48 */ 457 } EXT_HBA_FC4STATISTICS, *PEXT_HBA_FC4STATISTICS; /* 88 */ 458 459 typedef struct _EXT_LOOPBACK_REQ { 460 UINT32 TransferCount; 461 UINT32 IterationCount; 462 UINT32 BufferAddress; 463 UINT32 BufferLength; 464 UINT16 Options; 465 UINT8 Reserved[18]; 466 } EXT_LOOPBACK_REQ, *PEXT_LOOPBACK_REQ; 467 468 typedef struct _EXT_LOOPBACK_RSP { 469 UINT64 BufferAddress; 470 UINT32 BufferLength; 471 UINT32 IterationCountLastError; 472 UINT16 CompletionStatus; 473 UINT16 CrcErrorCount; 474 UINT16 DisparityErrorCount; 475 UINT16 FrameLengthErrorCount; 476 UINT8 CommandSent; 477 UINT8 Reserved[15]; 478 } EXT_LOOPBACK_RSP, *PEXT_LOOPBACK_RSP; 479 480 /* used with loopback response CommandSent */ 481 #define INT_DEF_LB_LOOPBACK_CMD 0 482 #define INT_DEF_LB_ECHO_CMD 1 483 484 /* definition for interpreting CompletionStatus values */ 485 #define EXT_DEF_LB_COMPLETE 0x4000 486 #define EXT_DEF_LB_PARAM_ERR 0x4006 487 #define EXT_DEF_LB_LOOP_DOWN 0x400b 488 #define EXT_DEF_LB_CMD_ERROR 0x400c 489 490 /* port type */ 491 #define EXT_DEF_INITIATOR_DEV 0x1 492 #define EXT_DEF_TARGET_DEV 0x2 493 #define EXT_DEF_TAPE_DEV 0x4 494 #define EXT_DEF_FABRIC_DEV 0x8 495 496 497 /* HBA port state */ 498 #define EXT_DEF_HBA_OK 0 499 #define EXT_DEF_HBA_SUSPENDED 1 500 #define EXT_DEF_HBA_LOOP_DOWN 2 501 502 /* Connection mode */ 503 #define EXT_DEF_UNKNOWN_MODE 0 504 #define EXT_DEF_P2P_MODE 1 505 #define EXT_DEF_LOOP_MODE 2 506 #define EXT_DEF_FL_MODE 3 507 #define EXT_DEF_N_MODE 4 508 509 /* Valid name type for Disc. port/target */ 510 #define EXT_DEF_USE_NODE_NAME 1 511 #define EXT_DEF_USE_PORT_NAME 2 512 513 /* FC4 type values */ 514 #define EXT_DEF_FC4_TYPE_SCSI 0x1 515 #define EXT_DEF_FC4_TYPE_IP 0x2 516 #define EXT_DEF_FC4_TYPE_SCTP 0x4 517 #define EXT_DEF_FC4_TYPE_VI 0x8 518 519 /* IIDMA rate values */ 520 #define IIDMA_RATE_1GB 0x0 521 #define IIDMA_RATE_2GB 0x1 522 #define IIDMA_RATE_4GB 0x3 523 #define IIDMA_RATE_8GB 0x4 524 #define IIDMA_RATE_10GB 0x13 525 #define IIDMA_RATE_16GB 0x5 526 #define IIDMA_RATE_32GB 0x6 527 #define IIDMA_RATE_UNKNOWN 0xffff 528 529 /* IIDMA Mode values */ 530 #define IIDMA_MODE_0 0 531 #define IIDMA_MODE_1 1 532 #define IIDMA_MODE_2 2 533 #define IIDMA_MODE_3 3 534 535 /* Port Speed values */ 536 #define EXT_DEF_PORTSPEED_UNKNOWN 0x0 537 #define EXT_DEF_PORTSPEED_1GBIT 0x1 538 #define EXT_DEF_PORTSPEED_2GBIT 0x2 539 #define EXT_DEF_PORTSPEED_4GBIT 0x4 540 #define EXT_DEF_PORTSPEED_8GBIT 0x8 541 #define EXT_DEF_PORTSPEED_10GBIT 0x10 542 #define EXT_DEF_PORTSPEED_16GBIT 0x20 543 #define EXT_DEF_PORTSPEED_32GBIT 0x40 544 #define EXT_PORTSPEED_NOT_NEGOTIATED (1<<15) /* Speed not established */ 545 546 typedef struct _EXT_DISC_PORT { 547 UINT64 TargetId; /* 8 */ 548 UINT16 Type; /* 2; Port Type */ 549 UINT16 Status; /* 2; Port Status */ 550 UINT16 Bus; /* 2; n/a for Solaris */ 551 UINT16 LoopID; /* 2; Loop ID */ 552 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 553 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 554 UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4; 3 bytes used big endian */ 555 UINT8 Local; /* 1; Local or Remote */ 556 UINT8 Reserved[27]; /* 27 */ 557 } EXT_DISC_PORT, *PEXT_DISC_PORT; /* 64 */ 558 559 typedef struct _EXT_DISC_TARGET { 560 UINT64 TargetId; /* 8 */ 561 UINT16 Type; /* 2; Target Type */ 562 UINT16 Status; /* 2; Target Status */ 563 UINT16 Bus; /* 2; n/a for Solaris */ 564 UINT16 LunCount; /* 2; n/a for nt */ 565 UINT16 LoopID; /* 2; Loop ID */ 566 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 567 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 568 UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4; 3 bytes used big endian */ 569 UINT8 Local; /* 1; Local or Remote */ 570 UINT8 Reserved[25]; /* 25 */ 571 } EXT_DISC_TARGET, *PEXT_DISC_TARGET; /* 64 */ 572 573 /* The following command is not supported */ 574 typedef struct _EXT_DISC_LUN { /* n/a for nt */ 575 UINT16 Id; /* 2 */ 576 UINT16 State; /* 2 */ 577 UINT16 IoCount; /* 2 */ 578 UINT8 Reserved[30]; /* 30 */ 579 } EXT_DISC_LUN, *PEXT_DISC_LUN; /* 36 */ 580 581 582 /* SCSI address */ 583 typedef struct _EXT_SCSI_ADDR { 584 UINT64 Target; /* 8 */ 585 UINT16 Bus; /* 2 */ 586 UINT16 Lun; /* 2 */ 587 UINT8 Padding[12]; /* 12 */ 588 } EXT_SCSI_ADDR, *PEXT_SCSI_ADDR; /* 24 */ 589 590 591 /* Fibre Channel address */ 592 typedef struct _EXT_FC_ADDR { 593 UINT16 Type; /* 2 */ 594 union { 595 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 596 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 597 UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4 */ 598 } FcAddr; 599 UINT8 Padding[4]; /* 4 */ 600 } EXT_FC_ADDR, *PEXT_FC_ADDR; /* 14 */ 601 602 #define EXT_DEF_TYPE_WWNN 1 603 #define EXT_DEF_TYPE_WWPN 2 604 #define EXT_DEF_TYPE_PORTID 3 605 #define EXT_DEF_TYPE_FABRIC 4 606 607 /* Destination address */ 608 typedef struct _EXT_DEST_ADDR { 609 union { 610 struct { 611 UINT64 Target; /* 8 */ 612 UINT16 Bus; /* 2 */ 613 UINT8 pad[6]; /* 6 */ 614 } ScsiAddr; 615 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 616 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 617 UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4 */ 618 } DestAddr; 619 UINT16 DestType; /* 2 */ 620 UINT16 Lun; /* 2 */ 621 UINT8 Padding[4]; /* 4 */ 622 } EXT_DEST_ADDR, *PEXT_DEST_ADDR; /* 24 */ 623 624 625 #define EXT_DEF_DESTTYPE_WWNN 1 626 #define EXT_DEF_DESTTYPE_WWPN 2 627 #define EXT_DEF_DESTTYPE_PORTID 3 628 #define EXT_DEF_DESTTYPE_FABRIC 4 629 #define EXT_DEF_DESTTYPE_SCSI 5 630 631 /* Statistic */ 632 typedef struct _EXT_HBA_PORT_STAT { 633 UINT32 ControllerErrorCount; /* 4 */ 634 UINT32 DeviceErrorCount; /* 4 */ 635 UINT32 IoCount; /* 4 */ 636 UINT32 MBytesCount; /* 4; MB of data processed */ 637 UINT32 LipResetCount; /* 4; Total no. of LIP Reset */ 638 UINT32 InterruptCount; /* 4; Total no. of Interrupts */ 639 UINT32 LinkFailureCount; /* 4 */ 640 UINT32 LossOfSyncCount; /* 4 */ 641 UINT32 LossOfSignalsCount; /* 4 */ 642 UINT32 PrimitiveSeqProtocolErrorCount; /* 4 */ 643 UINT32 InvalidTransmissionWordCount; /* 4 */ 644 UINT32 InvalidCRCCount; /* 4 */ 645 UINT8 Reserved[64]; /* 64 */ 646 } EXT_HBA_PORT_STAT, *PEXT_HBA_PORT_STAT; /* 112 */ 647 648 649 /* Driver property */ 650 typedef struct _EXT_DRIVER { 651 UINT32 MaxTransferLen; /* 4 */ 652 UINT32 MaxDataSegments; /* 4 */ 653 UINT32 Attrib; /* 4 */ 654 UINT32 InternalFlags[4]; /* 16 */ 655 UINT16 NumOfBus; /* 2; Port Type */ 656 UINT16 TargetsPerBus; /* 2; Port Status */ 657 UINT16 LunsPerTarget; /* 2 */ 658 UINT16 DmaBitAddresses; /* 2 */ 659 UINT16 IoMapType; /* 2 */ 660 UINT8 Version[EXT_DEF_MAX_STR_SIZE]; /* 128 */ 661 UINT8 Reserved[32]; /* 32 */ 662 } EXT_DRIVER, *PEXT_DRIVER; /* 198 */ 663 664 665 /* Firmware property */ 666 typedef struct _EXT_FW { 667 UINT32 Attrib; /* 4 */ 668 UINT8 Version[EXT_DEF_MAX_STR_SIZE]; /* 128 */ 669 UINT8 Reserved[66]; /* 66 */ 670 } EXT_FW, *PEXT_FW; /* 198 */ 671 672 /* ISP/Chip property */ 673 typedef struct _EXT_CHIP { 674 UINT32 IoAddr; /* 4 */ 675 UINT32 IoAddrLen; /* 4 */ 676 UINT32 MemAddr; /* 4 */ 677 UINT32 MemAddrLen; /* 4 */ 678 UINT16 VendorId; /* 2 */ 679 UINT16 DeviceId; /* 2 */ 680 UINT16 SubVendorId; /* 2 */ 681 UINT16 SubSystemId; /* 2 */ 682 UINT16 PciBusNumber; /* 2 */ 683 UINT16 PciSlotNumber; /* 2 */ 684 UINT16 ChipType; /* 2 */ 685 UINT16 InterruptLevel; /* 2 */ 686 UINT16 OutMbx[8]; /* 16 */ 687 UINT16 FuncNo; /* 2 */ 688 UINT8 Reserved[29]; /* 29 */ 689 UINT8 ChipRevID; /* 1 */ 690 } EXT_CHIP, *PEXT_CHIP; /* 80 */ 691 692 /* CNA properties */ 693 typedef struct _EXT_CNA_PORT { 694 UINT16 VLanId; /* 2 */ 695 UINT8 VNPortMACAddress[EXT_DEF_MAC_ADDRESS_SIZE]; /* 6 */ 696 UINT16 FabricParam; /* 2 */ 697 UINT16 Reserved0; /* 2 */ 698 UINT32 Reserved[29]; /* 116 */ 699 } EXT_CNA_PORT, *PEXT_CNA_PORT; /* 128 */ 700 701 /* Fabric Parameters */ 702 #define EXT_DEF_MAC_ADDR_MODE_FPMA 0x8000 703 704 #define NO_OF_VERSIONS 2 705 #define FLASH_VERSION 0 706 #define RUNNING_VERSION 1 707 #define EXT_OPT_ROM_REGION_MPI_RISC_FW 0x40 708 #define EXT_OPT_ROM_REGION_EDC_PHY_FW 0x45 709 710 typedef struct _EXT_REGIONVERSION { 711 UINT16 Region; 712 UINT16 SubRegion; /* If all boot codes are under region 0x7 */ 713 UINT16 Location; /* 0: Flash, 1: Running */ 714 UINT16 VersionLength; 715 UINT8 Version[8]; 716 UINT8 Reserved[8]; 717 } EXT_REGIONVERSION, *PEXT_REGIONVERSION; 718 719 typedef struct _EXT_ADAPTERREGIONVERSION { 720 UINT32 Length; /* number of struct REGIONVERSION */ 721 UINT32 Reserved; 722 EXT_REGIONVERSION RegionVersion[1]; /* variable length */ 723 } EXT_ADAPTERREGIONVERSION, *PEXT_ADAPTERREGIONVERSION; 724 725 /* Request Buffer for RNID */ 726 typedef struct _EXT_RNID_REQ { 727 EXT_FC_ADDR Addr; /* 14 */ 728 UINT8 DataFormat; /* 1 */ 729 UINT8 Pad; /* 1 */ 730 UINT8 OptWWN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 731 UINT8 OptPortId[EXT_DEF_PORTID_SIZE]; /* 4 */ 732 UINT8 Reserved[51]; /* 51 */ 733 } EXT_RNID_REQ, *PEXT_RNID_REQ; /* 79 */ 734 735 #define EXT_DEF_RNID_DFORMAT_NONE 0 736 #define EXT_DEF_RNID_DFORMAT_TOPO_DISC 0xDF 737 738 /* Request Buffer for Set RNID */ 739 typedef struct _EXT_SET_RNID_REQ { 740 UINT8 IPVersion[2]; /* 2 */ 741 UINT8 UDPPortNumber[2]; /* 2 */ 742 UINT8 IPAddress[16]; /* 16 */ 743 UINT8 Reserved[64]; /* 64 */ 744 } EXT_SET_RNID_REQ, *PEXT_SET_RNID_REQ; /* 84 */ 745 746 /* RNID definition and data struct */ 747 #define SEND_RNID_RSP_SIZE 72 748 749 typedef struct _RNID_DATA 750 { 751 UINT32 UnitType; /* 4 */ 752 UINT32 NumOfAttachedNodes; /* 4 */ 753 UINT16 TopoDiscFlags; /* 2 */ 754 UINT16 Reserved; /* 2 */ 755 UINT8 WWN[16]; /* 16 */ 756 UINT8 PortId[4]; /* 4 */ 757 UINT8 IPVersion[2]; /* 2 */ 758 UINT8 UDPPortNumber[2]; /* 2 */ 759 UINT8 IPAddress[16]; /* 16 */ 760 } EXT_RNID_DATA, *PEXT_RNID_DATA; /* 52 */ 761 762 763 /* SCSI pass-through */ 764 typedef struct _EXT_SCSI_PASSTHRU { 765 EXT_SCSI_ADDR TargetAddr; 766 UINT8 Direction; 767 UINT8 CdbLength; 768 UINT8 Cdb[EXT_DEF_SCSI_PASSTHRU_CDB_LENGTH]; 769 UINT8 Reserved[62]; 770 UINT8 SenseData[256]; 771 } EXT_SCSI_PASSTHRU, *PEXT_SCSI_PASSTHRU; 772 773 /* FC SCSI pass-through */ 774 typedef struct _EXT_FC_SCSI_PASSTHRU { 775 EXT_DEST_ADDR FCScsiAddr; 776 UINT8 Direction; 777 UINT8 CdbLength; 778 UINT8 Cdb[EXT_DEF_SCSI_PASSTHRU_CDB_LENGTH]; 779 UINT8 Reserved[60]; 780 UINT8 SenseData[256]; 781 } EXT_FC_SCSI_PASSTHRU, *PEXT_FC_SCSI_PASSTHRU; 782 783 /* SCSI pass-through direction */ 784 #define EXT_DEF_SCSI_PASSTHRU_DATA_IN 1 785 #define EXT_DEF_SCSI_PASSTHRU_DATA_OUT 2 786 787 788 /* EXT_REG_AEN Request struct */ 789 typedef struct _EXT_REG_AEN { 790 UINT32 Enable; /* 4; non-0 to enable, 0 to disable. */ 791 UINT8 Reserved[4]; /* 4 */ 792 } EXT_REG_AEN, *PEXT_REG_AEN; /* 8 */ 793 794 /* EXT_GET_AEN Response struct */ 795 typedef struct _EXT_ASYNC_EVENT { 796 UINT32 AsyncEventCode; /* 4 */ 797 union { 798 struct { 799 UINT8 RSCNInfo[EXT_DEF_PORTID_SIZE_ACTUAL]; /* 3 BE */ 800 UINT8 AddrFormat; /* 1 */ 801 UINT8 Rsvd_1[8]; /* 8 */ 802 } RSCN; 803 804 UINT8 Reserved[12]; /* 12 */ 805 } Payload; 806 } EXT_ASYNC_EVENT, *PEXT_ASYNC_EVENT; /* 16 */ 807 808 809 /* Asynchronous Event Codes */ 810 #define EXT_DEF_LIP_OCCURRED 0x8010 811 #define EXT_DEF_LINK_UP 0x8011 812 #define EXT_DEF_LINK_DOWN 0x8012 813 #define EXT_DEF_LIP_RESET 0x8013 814 #define EXT_DEF_RSCN 0x8015 815 #define EXT_DEF_DEVICE_UPDATE 0x8014 816 #define EXT_DEF_DPORT_DIAGS 0x8080 817 818 /* LED state information */ 819 #define EXT_DEF_GRN_BLINK_OFF 0x00 820 #define EXT_DEF_GRN_BLINK_ON 0x01 821 822 typedef struct _EXT_BEACON_CONTROL { 823 UINT32 State; /* 4 */ 824 UINT8 Reserved[12]; /* 12 */ 825 } EXT_BEACON_CONTROL, *PEXT_BEACON_CONTROL; /* 16 */ 826 827 /* Required # of entries in the queue buffer allocated. */ 828 #define EXT_DEF_MAX_AEN_QUEUE EXT_DEF_MAX_AEN_QUEUE_OS 829 830 /* 831 * LUN BitMask structure definition, array of 8bit bytes, 832 * 1 bit per lun. When bit == 1, the lun is masked. 833 * Most significant bit of mask[0] is lun 0. 834 * Least significant bit of mask[0] is lun 7. 835 */ 836 typedef struct _EXT_LUN_BIT_MASK { 837 #if ((EXT_DEF_NON_SCSI3_MAX_LUN & 0x7) == 0) 838 UINT8 mask[EXT_DEF_NON_SCSI3_MAX_LUN >> 3]; 839 #else 840 UINT8 mask[(EXT_DEF_NON_SCSI3_MAX_LUN + 8) >> 3 ]; 841 #endif 842 } EXT_LUN_BIT_MASK, *PEXT_LUN_BIT_MASK; 843 844 /* Device type to get for EXT_SC_GET_PORT_SUMMARY */ 845 #define EXT_DEF_GET_KNOWN_DEVICE 0x1 846 #define EXT_DEF_GET_VISIBLE_DEVICE 0x2 847 #define EXT_DEF_GET_HIDDEN_DEVICE 0x4 848 #define EXT_DEF_GET_FABRIC_DEVICE 0x8 849 #define EXT_DEF_GET_LOOP_DEVICE 0x10 850 851 /* Each entry in device database */ 852 typedef struct _EXT_DEVICEDATAENTRY 853 { 854 EXT_SCSI_ADDR TargetAddress; /* scsi address */ 855 UINT32 DeviceFlags; /* Flags for device */ 856 UINT16 LoopID; /* Loop ID */ 857 UINT16 BaseLunNumber; 858 UINT8 NodeWWN[8]; /* Node World Wide Name for device */ 859 UINT8 PortWWN[8]; /* Port World Wide Name for device */ 860 UINT8 PortID[3]; /* Current PortId for device */ 861 UINT8 ControlFlags; /* Control flag */ 862 UINT8 Reserved[132]; 863 } EXT_DEVICEDATAENTRY, *PEXT_DEVICEDATAENTRY; 864 865 #define EXT_DEF_EXTERNAL_LUN_COUNT 2048 866 #define EXT_DEF_EXTERNAL_LUN_BITMASK_BYTES (EXT_DEF_EXTERNAL_LUN_COUNT / 8) 867 868 /* Structure as used in the IOCTL. */ 869 870 typedef struct _EXT_EXTERNAL_LUN_BITMASK_ENTRY 871 { 872 UINT8 NodeName[EXT_DEF_WWN_NAME_SIZE]; 873 UINT8 PortName[EXT_DEF_WWN_NAME_SIZE]; 874 UINT8 Reserved1[16]; /* Pad to 32-byte header */ 875 UINT8 Bitmask[EXT_DEF_EXTERNAL_LUN_BITMASK_BYTES]; 876 } EXT_EXTERNAL_LUN_BITMASK_ENTRY, *PEXT_EXTERNAL_LUN_BITMASK_ENTRY; 877 878 879 /* Structure as it is stored in the NT registry */ 880 881 typedef struct _LUN_BITMASK_LIST 882 { 883 UINT16 Version; /* Should be LUN_BITMASK_REGISTRY_VERSION */ 884 UINT16 EntryCount; /* Count of variable entries following */ 885 UINT8 Reserved[28]; /* Pad to 32-byte header */ 886 887 EXT_EXTERNAL_LUN_BITMASK_ENTRY 888 BitmaskEntry[1]; /* Var-length data */ 889 } EXT_LUN_BITMASK_LIST, *PEXT_LUN_BITMASK_LIST; 890 891 892 /* Device database information */ 893 typedef struct _EXT_DEVICEDATA 894 { 895 UINT32 TotalDevices; /* Set to total number of device */ 896 UINT32 ReturnListEntryCount; /* Set to number of device entries */ 897 /* returned in list. */ 898 899 EXT_DEVICEDATAENTRY EntryList[1]; /* Variable length */ 900 } EXT_DEVICEDATA, *PEXT_DEVICEDATA; 901 902 903 /* Swap Target Device Data structure */ 904 typedef struct _EXT_SWAPTARGETDEVICE 905 { 906 EXT_DEVICEDATAENTRY CurrentExistDevice; 907 EXT_DEVICEDATAENTRY NewDevice; 908 } EXT_SWAPTARGETDEVICE, *PEXT_SWAPTARGETDEVICE; 909 910 #define EXT_DEF_LUN_BITMASK_LIST_MIN_ENTRIES 1 911 #define EXT_DEF_LUN_BITMASK_LIST_MAX_ENTRIES 256 912 913 #ifdef _WIN64 914 #define EXT_DEF_LUN_BITMASK_LIST_HEADER_SIZE 32 915 #else 916 #define EXT_DEF_LUN_BITMASK_LIST_HEADER_SIZE \ 917 offsetof(LUN_BITMASK_LIST_BUFFER, asBitmaskEntry) 918 #endif 919 920 #define EXT_DEF_LUN_BITMASK_LIST_MIN_SIZE \ 921 (EXT_DEF_LUN_BITMASK_LIST_HEADER_SIZE + \ 922 (sizeof (EXT_EXTERNAL_LUN_BITMASK_ENTRY) * \ 923 EXT_DEF_LUN_BITMASK_LIST_MIN_ENTRIES)) 924 #define EXT_DEF_LUN_BITMASK_LIST_MAX_SIZE \ 925 (EXT_DEF_LUN_BITMASK_LIST_HEADER_SIZE + \ 926 (sizeof (EXT_EXTERNAL_LUN_BITMASK_ENTRY) * \ 927 EXT_DEF_LUN_BITMASK_LIST_MAX_ENTRIES)) 928 /* 929 * LUN mask bit manipulation macros 930 * 931 * P = Pointer to an EXT_LUN_BIT_MASK union. 932 * L = LUN number. 933 */ 934 #define EXT_IS_LUN_BIT_SET(P, L) \ 935 (((P)->mask[L / 8] & (0x80 >> (L % 8))) ? 1 : 0) 936 937 #define EXT_SET_LUN_BIT(P, L) \ 938 ((P)->mask[L / 8] |= (0x80 >> (L % 8))) 939 940 #define EXT_CLR_LUN_BIT(P, L) \ 941 ((P)->mask[L / 8] &= ~(0x80 >> (L % 8))) 942 943 typedef struct _EXT_PORT_PARAM { 944 EXT_DEST_ADDR FCScsiAddr; 945 UINT16 Mode; 946 UINT16 Speed; 947 } EXT_PORT_PARAM, *PEXT_PORT_PARAM; 948 949 #define EXT_IIDMA_MODE_GET 0 950 #define EXT_IIDMA_MODE_SET 1 951 952 /* 953 * PCI header structure definitions. 954 */ 955 956 typedef struct _PCI_HEADER_T { 957 UINT8 signature[2]; 958 UINT8 reserved[0x16]; 959 UINT8 dataoffset[2]; 960 UINT8 pad[6]; 961 } PCI_HEADER_T, *PPCI_HEADER_T; 962 963 /* 964 * PCI data structure definitions. 965 */ 966 typedef struct _PCI_DATA_T { 967 UINT8 signature[4]; 968 UINT8 vid[2]; 969 UINT8 did[2]; 970 UINT8 reserved0[2]; 971 UINT8 pcidatalen[2]; 972 UINT8 pcidatarev; 973 UINT8 classcode[3]; 974 UINT8 imagelength[2]; /* In sectors */ 975 UINT8 revisionlevel[2]; 976 UINT8 codetype; 977 UINT8 indicator; 978 UINT8 reserved1[2]; 979 UINT8 pad[8]; 980 } PCI_DATA_T, *PPCI_DATA_T; 981 982 /* 983 * Mercury/Menlo 984 */ 985 986 #define MENLO_RESET_FLAG_ENABLE_DIAG_FW 1 987 988 typedef struct _EXT_MENLO_RESET { 989 UINT16 Flags; 990 UINT16 Reserved; 991 } EXT_MENLO_RESET, *PEXT_MENLO_RESET; 992 993 typedef struct _EXT_MENLO_GET_FW_VERSION { 994 UINT32 FwVersion; 995 } EXT_MENLO_GET_FW_VERSION, *PEXT_MENLO_GET_FW_VERSION; 996 997 #define MENLO_UPDATE_FW_FLAG_DIAG_FW 0x0008 /* if flag is cleared then */ 998 /* it must be an fw op */ 999 typedef struct _EXT_MENLO_UPDATE_FW { 1000 UINT64 pFwDataBytes; 1001 UINT32 TotalByteCount; 1002 UINT16 Flags; 1003 UINT16 Reserved; 1004 } EXT_MENLO_UPDATE_FW, *PEXT_MENLO_UPDATE_FW; 1005 1006 #define CONFIG_PARAM_ID_RESERVED 1 1007 #define CONFIG_PARAM_ID_UIF 2 1008 #define CONFIG_PARAM_ID_FCOE_COS 3 1009 #define CONFIG_PARAM_ID_PAUSE_TYPE 4 1010 #define CONFIG_PARAM_ID_TIMEOUTS 5 1011 1012 #define INFO_DATA_TYPE_CONFIG_LOG_DATA 1 /* Fetch Config Log Data */ 1013 #define INFO_DATA_TYPE_LOG_DATA 2 /* Fetch Log Data */ 1014 #define INFO_DATA_TYPE_PORT_STATISTICS 3 /* Fetch Port Statistics */ 1015 #define INFO_DATA_TYPE_LIF_STATISTICS 4 /* Fetch LIF Statistics */ 1016 #define INFO_DATA_TYPE_ASIC_STATISTICS 5 /* Fetch ASIC Statistics */ 1017 #define INFO_DATA_TYPE_CONFIG_PARAMETERS 6 /* Fetch Config Parameters */ 1018 #define INFO_DATA_TYPE_PANIC_LOG 7 /* Fetch Panic Log */ 1019 1020 /* 1021 * InfoContext defines for INFO_DATA_TYPE_LOG_DATA 1022 */ 1023 #define IC_LOG_DATA_LOG_ID_DEBUG_LOG 0 1024 #define IC_LOG_DATA_LOG_ID_LEARN_LOG 1 1025 #define IC_LOG_DATA_LOG_ID_FC_ACL_INGRESS_LOG 2 1026 #define IC_LOG_DATA_LOG_ID_FC_ACL_EGRESS_LOG 3 1027 #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_INGRESS_LOG 4 1028 #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_EGRESS_LOG 5 1029 #define IC_LOG_DATA_LOG_ID_MESSAGE_TRANSMIT_LOG 6 1030 #define IC_LOG_DATA_LOG_ID_MESSAGE_RECEIVE_LOG 7 1031 #define IC_LOG_DATA_LOG_ID_LINK_EVENT_LOG 8 1032 #define IC_LOG_DATA_LOG_ID_DCX_LOG 9 1033 1034 /* 1035 * InfoContext defines for INFO_DATA_TYPE_PORT_STATISTICS 1036 */ 1037 #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT0 0 1038 #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT1 1 1039 #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT0 2 1040 #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT1 3 1041 #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT0 4 1042 #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT1 5 1043 1044 /* 1045 * InfoContext defines for INFO_DATA_TYPE_LIF_STATISTICS 1046 */ 1047 #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT0 0 1048 #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT1 1 1049 #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT0 2 1050 #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT1 3 1051 #define IC_LIF_STATISTICS_LIF_NUMBER_CPU 6 1052 1053 typedef struct _EXT_MENLO_ACCESS_PARAMETERS { 1054 union { 1055 struct { 1056 UINT32 StartingAddr; 1057 UINT32 Reserved2; 1058 UINT32 Reserved3; 1059 } MenloMemory; /* For Read & Write Menlo Memory */ 1060 1061 struct { 1062 UINT32 ConfigParamID; 1063 UINT32 ConfigParamData0; 1064 UINT32 ConfigParamData1; 1065 } MenloConfig; /* For change Configuration */ 1066 1067 struct { 1068 UINT32 InfoDataType; 1069 UINT32 InfoContext; 1070 UINT32 Reserved; 1071 } MenloInfo; /* For fetch Menlo Info */ 1072 } ap; 1073 } EXT_MENLO_ACCESS_PARAMETERS, *PEXT_MENLO_ACCESS_PARAMETERS; 1074 1075 #define INFO_DATA_TYPE_LOG_CONFIG_TBC ((10 * 7) + 1) * 4 1076 #define INFO_DATA_TYPE_PORT_STAT_ETH_TBC 0x194 1077 #define INFO_DATA_TYPE_PORT_STAT_FC_TBC 0xC0 1078 #define INFO_DATA_TYPE_LIF_STAT_TBC 0x40 1079 #define INFO_DATA_TYPE_ASIC_STAT_TBC 0x5F8 1080 #define INFO_DATA_TYPE_CONFIG_TBC 0x140 1081 1082 #define MENLO_OP_READ_MEM 0 /* Read Menlo Memory */ 1083 #define MENLO_OP_WRITE_MEM 1 /* Write Menlo Memory */ 1084 #define MENLO_OP_CHANGE_CONFIG 2 /* Change Configuration */ 1085 #define MENLO_OP_GET_INFO 3 /* Fetch Menlo Info (Logs, & */ 1086 /* Statistics, Configuration) */ 1087 1088 typedef struct _EXT_MENLO_MANAGE_INFO { 1089 UINT64 pDataBytes; 1090 EXT_MENLO_ACCESS_PARAMETERS Parameters; 1091 UINT32 TotalByteCount; 1092 UINT16 Operation; 1093 UINT16 Reserved; 1094 } EXT_MENLO_MANAGE_INFO, *PEXT_MENLO_MANAGE_INFO; 1095 1096 #define MENLO_FC_CHECKSUM_FAILURE 0x01 1097 #define MENLO_FC_INVALID_LENGTH 0x02 1098 #define MENLO_FC_INVALID_ADDRESS 0x04 1099 #define MENLO_FC_INVALID_CONFIG_ID_TYPE 0x05 1100 #define MENLO_FC_INVALID_CONFIG_DATA 0x06 1101 #define MENLO_FC_INVALID_INFO_CONTEXT 0x07 1102 1103 typedef struct _EXT_MENLO_MGT { 1104 union { 1105 EXT_MENLO_RESET MenloReset; 1106 EXT_MENLO_GET_FW_VERSION MenloGetFwVer; 1107 EXT_MENLO_UPDATE_FW MenloUpdateFw; 1108 EXT_MENLO_MANAGE_INFO MenloManageInfo; 1109 } sp; 1110 } EXT_MENLO_MGT, *PEXT_MENLO_MGT; 1111 1112 /* 1113 * vport enum definations 1114 */ 1115 typedef enum vport_options { 1116 EXT_VPO_LOGIN_RETRY_ENABLE = 0, 1117 EXT_VPO_PERSISTENT = 1, 1118 EXT_VPO_QOS_BW = 2, 1119 EXT_VPO_VFABRIC_ENABLE = 3 1120 } vport_options_t; 1121 1122 /* 1123 * vport struct definations 1124 */ 1125 #define MAX_DEV_PATH 256 1126 #define MAX_VP_ID 256 1127 #define EXT_OLD_VPORT_ID_CNT_SIZE 260 1128 typedef struct _EXT_VPORT_ID_CNT { 1129 UINT32 VpCnt; 1130 UINT8 VpId[MAX_VP_ID]; 1131 UINT8 vp_path[MAX_VP_ID][MAX_DEV_PATH]; 1132 INT32 VpDrvInst[MAX_VP_ID]; 1133 } EXT_VPORT_ID_CNT, *PEXT_VPORT_ID_CNT; 1134 1135 typedef struct _EXT_VPORT_PARAMS { 1136 UINT32 vp_id; 1137 vport_options_t options; 1138 UINT8 wwpn[EXT_DEF_WWN_NAME_SIZE]; 1139 UINT8 wwnn[EXT_DEF_WWN_NAME_SIZE]; 1140 } EXT_VPORT_PARAMS, *PEXT_VPORT_PARAMS; 1141 1142 typedef struct _EXT_VPORT_INFO { 1143 UINT32 free; 1144 UINT32 used; 1145 UINT32 id; 1146 UINT32 state; 1147 UINT32 bound; 1148 UINT8 wwnn[EXT_DEF_WWN_NAME_SIZE]; 1149 UINT8 wwpn[EXT_DEF_WWN_NAME_SIZE]; 1150 UINT8 reserved[220]; 1151 } EXT_VPORT_INFO, *PEXT_VPORT_INFO; 1152 1153 typedef struct _EXT_BOARD_TEMP { 1154 UINT16 IntTemp; 1155 UINT16 FracTemp; 1156 UINT8 Reserved[60]; 1157 } EXT_BOARD_TEMP, *PEXT_BOARD_TEMP; 1158 1159 /* ASIC TEMPERATURE defines */ 1160 #define EXT_DEF_ASIC_TEMP_COMMAND_COMPLETE 0x4000 1161 #define EXT_DEF_ASIC_TEMP_HOST_INT_ERR 0x4002 1162 #define EXT_DEF_ASIC_TEMP_COMMAND_ERR 0x4005 1163 #define EXT_DEF_ASIC_TEMP_COMMAND_PARAM_ERR 0x4006 1164 1165 typedef struct _EXT_SERDES_REG { 1166 UINT16 addr; 1167 UINT16 val; 1168 } EXT_SERDES_REG, *PEXT_SERDES_REG; 1169 1170 typedef struct _EXT_VF_STATE { 1171 UINT32 NoOfVFConfigured; 1172 UINT32 NoOfVFActive; 1173 } EXT_VF_STATE, *PEXT_VF_STATE; 1174 1175 typedef struct _EXT_SERDES_REG_EX { 1176 UINT32 addr; 1177 UINT32 val; 1178 } EXT_SERDES_REG_EX, *PEXT_SERDES_REG_EX; 1179 1180 #define EXT_DEF_FCF_LIST_SIZE 4096 /* Bytes */ 1181 #define FCF_INFO_RETURN_ALL 0 1182 #define FCF_INFO_RETURN_ONE 1 1183 1184 typedef struct _EXT_FCF_INFO { 1185 UINT16 CntrlFlags; /* 2 */ 1186 UINT16 FcfId; /* 2 */ 1187 UINT16 VlanId; /* 2 */ 1188 UINT16 FcfFlags; /* 2 */ 1189 UINT16 FcfAdvertPri; /* 2 */ 1190 UINT16 FcfMacAddr1; /* 2 */ 1191 UINT16 FcfMacAddr2; /* 2 */ 1192 UINT16 FcfMacAddr3; /* 2 */ 1193 UINT16 FcfMapHi; /* 2 */ 1194 UINT16 FcfMapLow; /* 2 */ 1195 UINT8 SwitchName[8]; /* 8 */ 1196 UINT8 FabricName[8]; /* 8 */ 1197 UINT8 Reserved1[8]; /* 8 */ 1198 UINT16 CommFeatures; /* 2 */ 1199 UINT16 Reserved2; /* 2 */ 1200 UINT32 RATovVal; /* 4 */ 1201 UINT32 EDTovVal; /* 4 */ 1202 UINT8 Reserved3[8]; /* 8 */ 1203 } EXT_FCF_INFO, *PEXT_FCF_INFO; 1204 1205 typedef struct _EXT_FCF_LIST { 1206 UINT32 Options; 1207 UINT32 FcfIndex; 1208 UINT32 BufSize; 1209 EXT_FCF_INFO pFcfInfo[1]; 1210 } EXT_FCF_LIST, *PEXT_FCF_LIST; 1211 1212 typedef struct _EXT_RESOURCE_CNTS { 1213 UINT32 OrgTgtXchgCtrlCnt; /* 4 */ 1214 UINT32 CurTgtXchgCtrlCnt; /* 4 */ 1215 UINT32 CurXchgCtrlCnt; /* 4 */ 1216 UINT32 OrgXchgCtrlCnt; /* 4 */ 1217 UINT32 CurIocbBufCnt; /* 4 */ 1218 UINT32 OrgIocbBufCnt; /* 4 */ 1219 UINT32 NoOfSupVPs; /* 4 */ 1220 UINT32 NoOfSupFCFs; /* 4 */ 1221 } EXT_RESOURCE_CNTS, *PEXT_RESOURCE_CNTS; 1222 1223 #define FW_FCE_SIZE (0x4000 * 4) /* bytes - 16kb multiples */ 1224 1225 typedef struct _EXT_FW_FCE_TRACE { 1226 UINT16 Registers[32]; 1227 UINT8 TraceData[FW_FCE_SIZE]; /* Variable length */ 1228 } EXT_FW_FCE_TRACE, *PEXT_FW_FCE_TRACE; 1229 1230 /* Request Buffer for ELS PT */ 1231 #define EXT_DEF_WWPN_VALID 1 1232 #define EXT_DEF_WWNN_VALID 2 1233 #define EXT_DEF_PID_VALID 4 1234 1235 typedef struct _EXT_ELS_PT_REQ { 1236 UINT16 ValidMask; 1237 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; 1238 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; 1239 UINT8 Id[EXT_DEF_PORTID_SIZE]; 1240 UINT8 Reserved[10]; 1241 } EXT_ELS_PT_REQ, *PEXT_ELS_PT_REQ; 1242 1243 typedef struct _EXT_FLASH_UPDATE_CAPS { 1244 UINT64 Capabilities; 1245 UINT32 OutageDuration; 1246 UINT8 Reserved[20]; 1247 } EXT_FLASH_UPDATE_CAPS, *PEXT_FLASH_UPDATE_CAPS; 1248 1249 /* BB_CR Status */ 1250 #define EXT_DEF_BBCR_STATUS_DISABLED 0 1251 #define EXT_DEF_BBCR_STATUS_ENABLED 1 1252 #define EXT_DEF_BBCR_STATUS_UNKNOWN 2 1253 1254 /* BB_CR State */ 1255 #define EXT_DEF_BBCR_STATE_OFFLINE 0 1256 #define EXT_DEF_BBCR_STATE_ONLINE 1 1257 1258 /* BB_CR Offline Reason Code */ 1259 #define EXT_DEF_BBCR_REASON_PORT_SPEED 1 1260 #define EXT_DEF_BBCR_REASON_PEER_PORT 2 1261 #define EXT_DEF_BBCR_REASON_SWITCH 3 1262 #define EXT_DEF_BBCR_REASON_LOGIN_REJECT 4 1263 1264 typedef struct _EXT_BBCR_DATA { 1265 UINT8 Status; /* 1 - enabled, 0 - Disabled */ 1266 UINT8 State; /* 1 - online, 0 - offline */ 1267 UINT8 ConfiguredBBSCN; /* 0-15 */ 1268 UINT8 NegotiatedBBSCN; /* 0-15 */ 1269 UINT8 OfflineReasonCode; 1270 UINT16 mbx1; /* Port State */ 1271 UINT8 Reserved[9]; 1272 } EXT_BBCR_DATA, *PEXT_BBCR_DATA; 1273 1274 #ifdef __cplusplus 1275 } 1276 #endif 1277 1278 #endif /* _EXIOCT_H */ 1279