xref: /freebsd/sys/dev/ichiic/ig4_var.h (revision 5972ffde)
1 /*
2  * Copyright (c) 2014 The DragonFly Project.  All rights reserved.
3  *
4  * This code is derived from software contributed to The DragonFly Project
5  * by Matthew Dillon <dillon@backplane.com> and was subsequently ported
6  * to FreeBSD by Michael Gmelin <freebsd@grem.de>
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  *
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in
16  *    the documentation and/or other materials provided with the
17  *    distribution.
18  * 3. Neither the name of The DragonFly Project nor the names of its
19  *    contributors may be used to endorse or promote products derived
20  *    from this software without specific, prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
25  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
26  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
27  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
28  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
30  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
31  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
32  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  */
35 
36 #ifndef _ICHIIC_IG4_VAR_H_
37 #define _ICHIIC_IG4_VAR_H_
38 
39 #include "bus_if.h"
40 #include "device_if.h"
41 #include "pci_if.h"
42 #include "iicbus_if.h"
43 
44 enum ig4_vers {
45 	IG4_EMAG,
46 	IG4_HASWELL,
47 	IG4_ATOM,
48 	IG4_SKYLAKE,
49 	IG4_APL,
50 	IG4_CANNONLAKE,
51 	IG4_TIGERLAKE,
52 	IG4_GEMINILAKE
53 };
54 
55 /* Controller has additional registers */
56 #define	IG4_HAS_ADDREGS(vers)	((vers) >= IG4_SKYLAKE)
57 
58 struct ig4_hw {
59 	uint32_t	ic_clock_rate;	/* MHz */
60 	uint32_t	sda_fall_time;	/* nsec */
61 	uint32_t	scl_fall_time;	/* nsec */
62 	uint32_t	sda_hold_time;	/* nsec */
63 	int		txfifo_depth;
64 	int		rxfifo_depth;
65 };
66 
67 struct ig4_cfg {
68 	uint32_t	version;
69 	uint32_t	bus_speed;
70 	uint16_t	ss_scl_hcnt;
71 	uint16_t	ss_scl_lcnt;
72 	uint16_t	ss_sda_hold;
73 	uint16_t	fs_scl_hcnt;
74 	uint16_t	fs_scl_lcnt;
75 	uint16_t	fs_sda_hold;
76 	int		txfifo_depth;
77 	int		rxfifo_depth;
78 };
79 
80 struct ig4iic_softc {
81 	device_t	dev;
82 	device_t	iicbus;
83 	struct resource	*regs_res;
84 	int		regs_rid;
85 	struct resource	*intr_res;
86 	int		intr_rid;
87 	void		*intr_handle;
88 	int		intr_type;
89 	enum ig4_vers	version;
90 	struct ig4_cfg	cfg;
91 	uint32_t	intr_mask;
92 	uint8_t		last_slave;
93 	bool		platform_attached : 1;
94 	bool		use_10bit : 1;
95 	bool		slave_valid : 1;
96 	bool		poll: 1;
97 
98 	/*
99 	 * Locking semantics:
100 	 *
101 	 * Functions implementing the icbus interface that interact
102 	 * with the controller acquire an exclusive lock on call_lock
103 	 * to prevent interleaving of calls to the interface.
104 	 *
105 	 * io_lock is used as condition variable to synchronize active process
106 	 * with the interrupt handler. It should not be used for tasks other
107 	 * than waiting for interrupt and passing parameters to and from
108 	 * it's handler.
109 	 */
110 	struct sx	call_lock;
111 	struct mtx	io_lock;
112 };
113 
114 typedef struct ig4iic_softc ig4iic_softc_t;
115 
116 /* Attach/Detach called from ig4iic_pci_*() */
117 int ig4iic_attach(ig4iic_softc_t *sc);
118 int ig4iic_detach(ig4iic_softc_t *sc);
119 int ig4iic_suspend(ig4iic_softc_t *sc);
120 int ig4iic_resume(ig4iic_softc_t *sc);
121 
122 /* iicbus methods */
123 extern iicbus_transfer_t ig4iic_transfer;
124 extern iicbus_reset_t   ig4iic_reset;
125 extern iicbus_callback_t ig4iic_callback;
126 
127 #endif /* _ICHIIC_IG4_VAR_H_ */
128