| /qemu/tests/tcg/hexagon/ |
| H A D | brev.c | 38 #define BREV_LOAD(SZ, RES, ADDR, INC) \ argument
46 #define BREV_LOAD_b(RES, ADDR, INC) \ argument
48 #define BREV_LOAD_ub(RES, ADDR, INC) \ argument
50 #define BREV_LOAD_h(RES, ADDR, INC) \ argument
52 #define BREV_LOAD_uh(RES, ADDR, INC) \ argument
54 #define BREV_LOAD_w(RES, ADDR, INC) \ argument
56 #define BREV_LOAD_d(RES, ADDR, INC) \ argument
67 #define BREV_STORE_b(ADDR, VAL, INC) \ argument
69 #define BREV_STORE_h(ADDR, VAL, INC) \ argument
71 #define BREV_STORE_f(ADDR, VAL, INC) \ argument
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| H A D | circ.c | 78 #define CIRC_LOAD_IMM_b(RES, ADDR, START, LEN, INC) \ in INIT() argument
80 #define CIRC_LOAD_IMM_ub(RES, ADDR, START, LEN, INC) \ in INIT() argument
82 #define CIRC_LOAD_IMM_h(RES, ADDR, START, LEN, INC) \ in INIT() argument
84 #define CIRC_LOAD_IMM_uh(RES, ADDR, START, LEN, INC) \ in INIT() argument
86 #define CIRC_LOAD_IMM_w(RES, ADDR, START, LEN, INC) \ in INIT() argument
88 #define CIRC_LOAD_IMM_d(RES, ADDR, START, LEN, INC) \ in INIT() argument
116 #define CIRC_LOAD_REG_b(RES, ADDR, START, LEN, INC) \ argument
118 #define CIRC_LOAD_REG_ub(RES, ADDR, START, LEN, INC) \ argument
120 #define CIRC_LOAD_REG_h(RES, ADDR, START, LEN, INC) \ argument
124 #define CIRC_LOAD_REG_w(RES, ADDR, START, LEN, INC) \ argument
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| H A D | load_align.c | 161 #define LOAD_pr(SZ, RES, PTR, INC) \ argument
168 #define LOAD_pr_b(RES, PTR, INC) \ argument
170 #define LOAD_pr_h(RES, PTR, INC) \ argument
242 #define LOAD_pi(SZ, RES, PTR, INC) \ argument
246 #define LOAD_pi_b(RES, PTR, INC) \ argument
248 #define LOAD_pi_h(RES, PTR, INC) \ argument
281 #define LOAD_pci(SZ, RES, PTR, START, LEN, INC) \ argument
290 #define LOAD_pci_b(RES, PTR, START, LEN, INC) \ argument
292 #define LOAD_pci_h(RES, PTR, START, LEN, INC) \ argument
335 #define LOAD_pcr_b(RES, PTR, START, LEN, INC) \ argument
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| H A D | load_unpack.c | 180 #define BxW_LOAD_pr(SZ, RES, PTR, INC) \ argument
187 #define BxW_LOAD_pr_Z(RES, PTR, INC) \ argument
189 #define BxW_LOAD_pr_S(RES, PTR, INC) \ argument
271 #define BxW_LOAD_pi(SZ, RES, PTR, INC) \ argument
275 #define BxW_LOAD_pi_Z(RES, PTR, INC) \ argument
277 #define BxW_LOAD_pi_S(RES, PTR, INC) \ argument
324 #define BxW_LOAD_pci_Z(RES, PTR, START, LEN, INC) \ argument
326 #define BxW_LOAD_pci_S(RES, PTR, START, LEN, INC) \ argument
374 #define BxW_LOAD_pcr_Z(RES, PTR, START, LEN, INC) \ argument
376 #define BxW_LOAD_pcr_S(RES, PTR, START, LEN, INC) \ argument
[all …]
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| /qemu/target/hexagon/ |
| H A D | gen_tcg_hvx.h | 576 #define fGEN_TCG_PRED_VEC_LOAD(GET_EA, PRED, DSTOFF, INC) \ argument
708 #define fGEN_TCG_NEWVAL_VEC_STORE(GET_EA, INC) \ argument
741 #define fGEN_TCG_PRED_VEC_STORE(GET_EA, PRED, SRCOFF, ALIGN, INC) \ argument
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