/dports/multimedia/libv4l/linux-5.13-rc2/arch/alpha/lib/ |
H A D | stacktrace.c | 22 #define STK_ALLOC_MATCH(INSTR) \ argument 25 #define STK_PUSH_MATCH(INSTR) \ argument 27 #define MEM_OP_OFFSET(INSTR) \ argument 29 #define MEM_OP_REG(INSTR) \ argument 33 #define BB_END(INSTR) \ argument
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/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/alpha/lib/ |
H A D | stacktrace.c | 22 #define STK_ALLOC_MATCH(INSTR) \ argument 25 #define STK_PUSH_MATCH(INSTR) \ argument 27 #define MEM_OP_OFFSET(INSTR) \ argument 29 #define MEM_OP_REG(INSTR) \ argument 33 #define BB_END(INSTR) \ argument
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/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/alpha/lib/ |
H A D | stacktrace.c | 22 #define STK_ALLOC_MATCH(INSTR) \ argument 25 #define STK_PUSH_MATCH(INSTR) \ argument 27 #define MEM_OP_OFFSET(INSTR) \ argument 29 #define MEM_OP_REG(INSTR) \ argument 33 #define BB_END(INSTR) \ argument
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/dports/devel/rgbds/rgbds/test/link/section-union/ |
H A D | different-syntaxes.asm | 2 INSTR equs "sbc a" label 4 INSTR equs "db $9f" label
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/gdb/vx-share/ |
H A D | vxTypes.h | 62 typedef unsigned short INSTR; /* word-aligned instructions */ typedef 66 typedef unsigned long INSTR; /* 32 bit word-aligned instructions */ typedef
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/gdb/vx-share/ |
H A D | vxTypes.h | 62 typedef unsigned short INSTR; /* word-aligned instructions */ typedef 66 typedef unsigned long INSTR; /* 32 bit word-aligned instructions */ typedef
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/dports/textproc/py-html2text/html2text-2020.1.16/test/ |
H A D | test_memleak.py | 5 INSTR = "miow " variable
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/dports/audio/csound/csound-6.15.0/Frontends/beats/ |
H A D | beats.h | 30 } INSTR; typedef
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/dports/math/flopc++/FlopCpp-d4c1d98/FlopCpp/examples/ |
H A D | stampl.cpp | 26 MP_set INSTR; member in Stage 93 MP_set INSTR(numINSTR); in main() local
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H A D | stampl2.cpp | 19 MP_set INSTR(numINSTR); in main() local
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/dports/lang/lafontaine/lafontaine-0.4/include/ |
H A D | instr.h | 30 #define INSTR(class) ((struct s_instr *)class) macro
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/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/freedreno/ir2/ |
H A D | disasm-a2xx.c | 144 #define INSTR(opc, num_srcs) [opc] = {num_srcs, #opc} macro 460 #define INSTR(opc, name, fxn) [opc] = {name, fxn} macro 579 #define INSTR(opc, fxn) [opc] = {#opc, fxn} macro
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/dports/graphics/libosmesa/mesa-21.3.6/src/freedreno/ir2/ |
H A D | disasm-a2xx.c | 144 #define INSTR(opc, num_srcs) [opc] = {num_srcs, #opc} macro 460 #define INSTR(opc, name, fxn) [opc] = {name, fxn} macro 579 #define INSTR(opc, fxn) [opc] = {#opc, fxn} macro
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/dports/graphics/mesa-libs/mesa-21.3.6/src/freedreno/ir2/ |
H A D | disasm-a2xx.c | 144 #define INSTR(opc, num_srcs) [opc] = {num_srcs, #opc} macro 460 #define INSTR(opc, name, fxn) [opc] = {name, fxn} macro 579 #define INSTR(opc, fxn) [opc] = {#opc, fxn} macro
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/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/freedreno/ir2/ |
H A D | disasm-a2xx.c | 144 #define INSTR(opc, num_srcs) [opc] = {num_srcs, #opc} macro 460 #define INSTR(opc, name, fxn) [opc] = {name, fxn} macro 579 #define INSTR(opc, fxn) [opc] = {#opc, fxn} macro
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/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/freedreno/ir2/ |
H A D | disasm-a2xx.c | 144 #define INSTR(opc, num_srcs) [opc] = {num_srcs, #opc} macro 460 #define INSTR(opc, name, fxn) [opc] = {name, fxn} macro 579 #define INSTR(opc, fxn) [opc] = {#opc, fxn} macro
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/dports/graphics/mesa-dri/mesa-21.3.6/src/freedreno/ir2/ |
H A D | disasm-a2xx.c | 144 #define INSTR(opc, num_srcs) [opc] = {num_srcs, #opc} macro 460 #define INSTR(opc, name, fxn) [opc] = {name, fxn} macro 579 #define INSTR(opc, fxn) [opc] = {#opc, fxn} macro
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/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/freedreno/ir2/ |
H A D | disasm-a2xx.c | 144 #define INSTR(opc, num_srcs) [opc] = {num_srcs, #opc} macro 460 #define INSTR(opc, name, fxn) [opc] = {name, fxn} macro 579 #define INSTR(opc, fxn) [opc] = {#opc, fxn} macro
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/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/freedreno/ir2/ |
H A D | disasm-a2xx.c | 144 #define INSTR(opc, num_srcs) [opc] = {num_srcs, #opc} macro 460 #define INSTR(opc, name, fxn) [opc] = {name, fxn} macro 579 #define INSTR(opc, fxn) [opc] = {#opc, fxn} macro
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/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/freedreno/ir2/ |
H A D | disasm-a2xx.c | 144 #define INSTR(opc, num_srcs) [opc] = {num_srcs, #opc} macro 460 #define INSTR(opc, name, fxn) [opc] = {name, fxn} macro 579 #define INSTR(opc, fxn) [opc] = {#opc, fxn} macro
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/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/freedreno/ir2/ |
H A D | disasm-a2xx.c | 129 #define INSTR(opc, num_srcs) [opc] = { num_srcs, #opc } macro 442 #define INSTR(opc, name, fxn) [opc] = { name, fxn } macro 558 #define INSTR(opc, fxn) [opc] = { #opc, fxn } macro
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/dports/lang/clover/mesa-21.3.6/src/freedreno/ir2/ |
H A D | disasm-a2xx.c | 144 #define INSTR(opc, num_srcs) [opc] = {num_srcs, #opc} macro 460 #define INSTR(opc, name, fxn) [opc] = {name, fxn} macro 579 #define INSTR(opc, fxn) [opc] = {#opc, fxn} macro
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/dports/emulators/mess/mame-mame0226/src/devices/cpu/ssem/ |
H A D | ssem.cpp | 18 #define INSTR ((op >> 13) & 7) macro
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/dports/emulators/mame/mame-mame0226/src/devices/cpu/ssem/ |
H A D | ssem.cpp | 18 #define INSTR ((op >> 13) & 7) macro
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/dports/lang/yap/yap-6.2.2/OPTYap/ |
H A D | tab.tries.i | 35 #define NEW_ANSWER_TRIE_NODE(NODE, INSTR, ENTRY, CHILD, PARENT, NEXT) \ argument 44 #define NEW_ANSWER_TRIE_NODE(NODE, INSTR, ENTRY, CHILD, PARENT, NEXT) \ argument 54 #define ANSWER_CHECK_INSERT_ENTRY(SG_FR, NODE, ENTRY, INSTR) \ argument 59 #define ANSWER_CHECK_INSERT_ENTRY(SG_FR, NODE, ENTRY, INSTR) \ argument
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