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Searched defs:INTENABLE (Results 1 – 10 of 10) sorted by relevance

/dports/emulators/mess/mame-mame0226/src/mame/includes/
H A Dcxhumax.h174 #define INTENABLE 1 // Enables the interrupt generation macro
/dports/emulators/mame/mame-mame0226/src/mame/includes/
H A Dcxhumax.h174 #define INTENABLE 1 // Enables the interrupt generation macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/xtensa/
H A Dcpu.h158 INTENABLE = 228, enumerator
/dports/emulators/qemu-utils/qemu-4.2.1/target/xtensa/
H A Dcpu.h154 INTENABLE = 228, enumerator
/dports/emulators/qemu5/qemu-5.2.0/target/xtensa/
H A Dcpu.h156 INTENABLE = 228, enumerator
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/xtensa/
H A Dcpu.h154 INTENABLE = 228, enumerator
/dports/emulators/qemu42/qemu-4.2.1/target/xtensa/
H A Dcpu.h154 INTENABLE = 228, enumerator
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/xtensa/
H A Dcpu.h154 INTENABLE = 228, enumerator
/dports/emulators/qemu/qemu-6.2.0/target/xtensa/
H A Dcpu.h156 INTENABLE = 228, enumerator
/dports/emulators/qemu60/qemu-6.0.0/target/xtensa/
H A Dcpu.h156 INTENABLE = 228, enumerator