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Searched defs:IO_DELAY_PER_DCHAIN_TAP (Results 1 – 25 of 792) sorted by relevance

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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/devboards/dbm-soc1/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/ebv/socrates/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/altera/arria5-socdk/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/altera/cyclone5-socdk/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/ebv/socrates/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/is1/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/devboards/dbm-soc1/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/altera/arria5-socdk/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/is1/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/terasic/de0-nano-soc/qts/
H A Dsdram_config.h137 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/terasic/de10-nano/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/terasic/sockit/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/samtec/vining_fpga/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/sr1500/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/terasic/de1-soc/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/board/is1/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/board/terasic/sockit/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/board/keymile/secu1/qts/
H A Dsdram_config.h130 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/board/softing/vining_fpga/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/board/sr1500/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/board/terasic/de0-nano-soc/qts/
H A Dsdram_config.h137 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/board/terasic/de1-soc/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/board/terasic/de10-nano/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/board/sr1500/qts/
H A Dsdram_config.h135 #define IO_DELAY_PER_DCHAIN_TAP 25 macro
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/board/keymile/secu1/qts/
H A Dsdram_config.h130 #define IO_DELAY_PER_DCHAIN_TAP 25 macro

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