xref: /openbsd/sys/dev/isa/itvar.h (revision d954485d)
1 /*	$OpenBSD: itvar.h,v 1.15 2013/03/21 18:20:00 brynet Exp $	*/
2 
3 /*
4  * Copyright (c) 2007-2008 Oleg Safiullin <form@pdp-11.org.ru>
5  * Copyright (c) 2006-2007 Juan Romero Pardines <juan@xtrarom.org>
6  * Copyright (c) 2003 Julien Bordet <zejames@greyhats.org>
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28  */
29 
30 #ifndef _DEV_ISA_ITVAR_H_
31 #define _DEV_ISA_ITVAR_H_
32 
33 #define IT_EC_INTERVAL		5
34 #define IT_EC_NUMSENSORS	17
35 #define IT_EC_VREF		4096
36 
37 #define IO_IT1			0x2e
38 #define IO_IT2			0x4e
39 
40 #define IT_IO_ADDR		0x00
41 #define IT_IO_DATA		0x01
42 
43 #define IT_ID_8705		0x8705
44 #define IT_ID_8712		0x8712
45 #define IT_ID_8716		0x8716
46 #define IT_ID_8718		0x8718
47 #define IT_ID_8720		0x8720
48 #define IT_ID_8721		0x8721
49 #define IT_ID_8726		0x8726
50 #define IT_ID_8728		0x8728
51 #define IT_ID_8772		0x8772
52 
53 #define IT_CCR			0x02
54 #define IT_LDN			0x07
55 #define IT_CHIPID1		0x20
56 #define IT_CHIPID2		0x21
57 #define IT_CHIPREV		0x22
58 
59 #define IT_EC_LDN		0x04
60 #define IT_EC_MSB		0x60
61 #define IT_EC_LSB		0x61
62 
63 #define IT_EC_ADDR		0x05
64 #define IT_EC_DATA		0x06
65 
66 #define IT_EC_CFG		0x00
67 #define IT_EC_FAN_DIV		0x0b
68 #define IT_EC_FAN_ECER		0x0c
69 #define IT_EC_FAN_TAC1		0x0d
70 #define IT_EC_FAN_TAC2		0x0e
71 #define IT_EC_FAN_TAC3		0x0f
72 #define IT_EC_FAN_MCR		0x13
73 #define IT_EC_FAN_EXT_TAC1	0x18
74 #define IT_EC_FAN_EXT_TAC2	0x19
75 #define IT_EC_FAN_EXT_TAC3	0x1a
76 #define IT_EC_VOLTBASE		0x20
77 #define IT_EC_TEMPBASE		0x29
78 #define IT_EC_ADC_VINER		0x50
79 #define IT_EC_ADC_TEMPER	0x51
80 #define IT_EC_FAN_TAC4_LSB	0x80
81 #define IT_EC_FAN_TAC4_MSB	0x81
82 #define IT_EC_FAN_TAC5_LSB	0x82
83 #define IT_EC_FAN_TAC5_MSB	0x83
84 
85 #define IT_EC_CFG_START		0x01
86 #define IT_EC_CFG_INTCLR	0x08
87 #define IT_EC_CFG_UPDVBAT	0x40
88 
89 #define IT_WDT_LDN		0x07
90 
91 #define IT_WDT_CSR		0x71
92 #define IT_WDT_TCR		0x72
93 #define IT_WDT_TMO_LSB		0x73
94 #define IT_WDT_TMO_MSB		0x74
95 
96 #define IT_WDT_TCR_SECS		0x80
97 #define IT_WDT_TCR_KRST		0x40
98 #define IT_WDT_TCR_PWROK	0x10
99 
100 
101 struct it_softc {
102 	struct device		sc_dev;
103 
104 	bus_space_tag_t		sc_iot;
105 	bus_space_handle_t	sc_ioh;
106 	int			sc_iobase;
107 	int			sc_ec_iobase;
108 	u_int16_t		sc_chipid;
109 	u_int8_t		sc_chiprev;
110 
111 	bus_space_tag_t		sc_ec_iot;
112 	bus_space_handle_t	sc_ec_ioh;
113 
114 	struct ksensor		sc_sensors[IT_EC_NUMSENSORS];
115 	struct ksensordev	sc_sensordev;
116 
117 	LIST_ENTRY(it_softc)	sc_list;
118 };
119 
120 #endif	/* _DEV_ISA_ITVAR_H_ */
121