1 /* $OpenBSD: pciide_ixp_reg.h,v 1.2 2008/06/26 05:42:17 ray Exp $ */ 2 /* $NetBSD: pciide_ixp_reg.h,v 1.2 2005/02/27 00:27:33 perry Exp $ */ 3 4 /* 5 * Copyright (c) 2004 The NetBSD Foundation. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to the NetBSD Foundation 9 * by Quentin Garnier. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* All values gathered from the linux driver. */ 34 35 #define IXP_PIO_TIMING 0x40 36 #define IXP_MDMA_TIMING 0x44 37 #define IXP_PIO_CTL 0x48 38 #define IXP_PIO_MODE 0x4a 39 #define IXP_UDMA_CTL 0x54 40 #define IXP_UDMA_MODE 0x56 41 42 static const uint8_t ixp_pio_timings[] = { 43 0x5d, 0x47, 0x34, 0x22, 0x20 44 }; 45 46 static const uint8_t ixp_mdma_timings[] = { 47 0x77, 0x21, 0x20 48 }; 49 50 /* First 4 bits of UDMA_CTL enable or disable UDMA for the drive */ 51 #define IXP_UDMA_ENABLE(u, c, d) do { \ 52 (u) |= (1 << (2 * (c) + (d))); \ 53 } while (0) 54 #define IXP_UDMA_DISABLE(u, c, d) do { \ 55 (u) &= ~(1 << (2 * (c) + (d))); \ 56 } while (0) 57 58 /* 59 * UDMA_MODE has 4 bits per drive, though only 3 are actually used 60 * Note that in this macro u is the whole 61 * UDMA_CTL+UDMA_MODE register (32bits). 62 * PIO_MODE works just the same. 63 */ 64 #define IXP_SET_MODE(u, c, d, m) do { \ 65 int __ixpshift = 16 + 8*(c) + 4*(d); \ 66 (u) &= ~(0x7 << __ixpshift); \ 67 (u) |= (((m) & 0x7) << __ixpshift); \ 68 } while (0) 69 70 /* 71 * MDMA_TIMING has one byte per drive. 72 * PIO_TIMING works just the same. 73 */ 74 #define IXP_SET_TIMING(m, c, d, t) do { \ 75 int __ixpshift = 16*(c) + 8*(d); \ 76 (m) &= ~(0xff << __ixpshift); \ 77 (m) |= ((t) & 0xff) << __ixpshift; \ 78 } while (0) 79