1 //===- CodeGenTarget.h - Target Class Wrapper -------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file defines wrappers for the Target class and related global 10 // functionality. This makes it easier to access the data and provides a single 11 // place that needs to check it for validity. All of these classes abort 12 // on error conditions. 13 // 14 //===----------------------------------------------------------------------===// 15 16 #ifndef LLVM_UTILS_TABLEGEN_CODEGENTARGET_H 17 #define LLVM_UTILS_TABLEGEN_CODEGENTARGET_H 18 19 #include "CodeGenHwModes.h" 20 #include "InfoByHwMode.h" 21 #include "SDNodeProperties.h" 22 #include "llvm/ADT/ArrayRef.h" 23 #include "llvm/ADT/DenseMap.h" 24 #include "llvm/ADT/SmallVector.h" 25 #include "llvm/ADT/StringRef.h" 26 #include "llvm/CodeGen/MachineValueType.h" 27 #include <cassert> 28 #include <memory> 29 #include <optional> 30 #include <string> 31 #include <vector> 32 33 namespace llvm { 34 35 class RecordKeeper; 36 class Record; 37 class CodeGenInstruction; 38 class CodeGenRegBank; 39 class CodeGenRegister; 40 class CodeGenRegisterClass; 41 class CodeGenSchedModels; 42 class CodeGenSubRegIndex; 43 44 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen 45 /// record corresponds to. 46 MVT::SimpleValueType getValueType(const Record *Rec); 47 48 StringRef getName(MVT::SimpleValueType T); 49 StringRef getEnumName(MVT::SimpleValueType T); 50 51 /// getQualifiedName - Return the name of the specified record, with a 52 /// namespace qualifier if the record contains one. 53 std::string getQualifiedName(const Record *R); 54 55 /// CodeGenTarget - This class corresponds to the Target class in the .td files. 56 /// 57 class CodeGenTarget { 58 RecordKeeper &Records; 59 Record *TargetRec; 60 61 mutable DenseMap<const Record*, 62 std::unique_ptr<CodeGenInstruction>> Instructions; 63 mutable std::unique_ptr<CodeGenRegBank> RegBank; 64 mutable std::vector<Record*> RegAltNameIndices; 65 mutable SmallVector<ValueTypeByHwMode, 8> LegalValueTypes; 66 CodeGenHwModes CGH; 67 std::vector<Record *> MacroFusions; 68 69 void ReadRegAltNameIndices() const; 70 void ReadInstructions() const; 71 void ReadLegalValueTypes() const; 72 73 mutable std::unique_ptr<CodeGenSchedModels> SchedModels; 74 75 mutable StringRef InstNamespace; 76 mutable std::vector<const CodeGenInstruction*> InstrsByEnum; 77 mutable unsigned NumPseudoInstructions = 0; 78 public: 79 CodeGenTarget(RecordKeeper &Records); 80 ~CodeGenTarget(); 81 getTargetRecord()82 Record *getTargetRecord() const { return TargetRec; } 83 StringRef getName() const; 84 85 /// getInstNamespace - Return the target-specific instruction namespace. 86 /// 87 StringRef getInstNamespace() const; 88 89 /// getRegNamespace - Return the target-specific register namespace. 90 StringRef getRegNamespace() const; 91 92 /// getInstructionSet - Return the InstructionSet object. 93 /// 94 Record *getInstructionSet() const; 95 96 /// getAllowRegisterRenaming - Return the AllowRegisterRenaming flag value for 97 /// this target. 98 /// 99 bool getAllowRegisterRenaming() const; 100 101 /// getAsmParser - Return the AssemblyParser definition for this target. 102 /// 103 Record *getAsmParser() const; 104 105 /// getAsmParserVariant - Return the AssemblyParserVariant definition for 106 /// this target. 107 /// 108 Record *getAsmParserVariant(unsigned i) const; 109 110 /// getAsmParserVariantCount - Return the AssemblyParserVariant definition 111 /// available for this target. 112 /// 113 unsigned getAsmParserVariantCount() const; 114 115 /// getAsmWriter - Return the AssemblyWriter definition for this target. 116 /// 117 Record *getAsmWriter() const; 118 119 /// getRegBank - Return the register bank description. 120 CodeGenRegBank &getRegBank() const; 121 122 /// Return the largest register class on \p RegBank which supports \p Ty and 123 /// covers \p SubIdx if it exists. 124 std::optional<CodeGenRegisterClass *> 125 getSuperRegForSubReg(const ValueTypeByHwMode &Ty, CodeGenRegBank &RegBank, 126 const CodeGenSubRegIndex *SubIdx, 127 bool MustBeAllocatable = false) const; 128 129 /// getRegisterByName - If there is a register with the specific AsmName, 130 /// return it. 131 const CodeGenRegister *getRegisterByName(StringRef Name) const; 132 getRegAltNameIndices()133 const std::vector<Record*> &getRegAltNameIndices() const { 134 if (RegAltNameIndices.empty()) ReadRegAltNameIndices(); 135 return RegAltNameIndices; 136 } 137 138 const CodeGenRegisterClass &getRegisterClass(Record *R) const; 139 140 /// getRegisterVTs - Find the union of all possible SimpleValueTypes for the 141 /// specified physical register. 142 std::vector<ValueTypeByHwMode> getRegisterVTs(Record *R) const; 143 getLegalValueTypes()144 ArrayRef<ValueTypeByHwMode> getLegalValueTypes() const { 145 if (LegalValueTypes.empty()) 146 ReadLegalValueTypes(); 147 return LegalValueTypes; 148 } 149 150 CodeGenSchedModels &getSchedModels() const; 151 getHwModes()152 const CodeGenHwModes &getHwModes() const { return CGH; } 153 hasMacroFusion()154 bool hasMacroFusion() const { return !MacroFusions.empty(); } 155 getMacroFusions()156 const std::vector<Record *> getMacroFusions() const { return MacroFusions; } 157 158 private: 159 DenseMap<const Record*, std::unique_ptr<CodeGenInstruction>> & getInstructions()160 getInstructions() const { 161 if (Instructions.empty()) ReadInstructions(); 162 return Instructions; 163 } 164 public: 165 getInstruction(const Record * InstRec)166 CodeGenInstruction &getInstruction(const Record *InstRec) const { 167 if (Instructions.empty()) ReadInstructions(); 168 auto I = Instructions.find(InstRec); 169 assert(I != Instructions.end() && "Not an instruction"); 170 return *I->second; 171 } 172 173 /// Returns the number of predefined instructions. 174 static unsigned getNumFixedInstructions(); 175 176 /// Returns the number of pseudo instructions. getNumPseudoInstructions()177 unsigned getNumPseudoInstructions() const { 178 if (InstrsByEnum.empty()) 179 ComputeInstrsByEnum(); 180 return NumPseudoInstructions; 181 } 182 183 /// Return all of the instructions defined by the target, ordered by their 184 /// enum value. 185 /// The following order of instructions is also guaranteed: 186 /// - fixed / generic instructions as declared in TargetOpcodes.def, in order; 187 /// - pseudo instructions in lexicographical order sorted by name; 188 /// - other instructions in lexicographical order sorted by name. getInstructionsByEnumValue()189 ArrayRef<const CodeGenInstruction *> getInstructionsByEnumValue() const { 190 if (InstrsByEnum.empty()) 191 ComputeInstrsByEnum(); 192 return InstrsByEnum; 193 } 194 195 typedef ArrayRef<const CodeGenInstruction *>::const_iterator inst_iterator; inst_begin()196 inst_iterator inst_begin() const{return getInstructionsByEnumValue().begin();} inst_end()197 inst_iterator inst_end() const { return getInstructionsByEnumValue().end(); } 198 199 200 /// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]? 201 /// 202 bool isLittleEndianEncoding() const; 203 204 /// reverseBitsForLittleEndianEncoding - For little-endian instruction bit 205 /// encodings, reverse the bit order of all instructions. 206 void reverseBitsForLittleEndianEncoding(); 207 208 /// guessInstructionProperties - should we just guess unset instruction 209 /// properties? 210 bool guessInstructionProperties() const; 211 212 private: 213 void ComputeInstrsByEnum() const; 214 }; 215 216 /// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern 217 /// tablegen class in TargetSelectionDAG.td 218 class ComplexPattern { 219 Record *Ty; 220 unsigned NumOperands; 221 std::string SelectFunc; 222 std::vector<Record*> RootNodes; 223 unsigned Properties; // Node properties 224 unsigned Complexity; 225 public: 226 ComplexPattern(Record *R); 227 getValueType()228 Record *getValueType() const { return Ty; } getNumOperands()229 unsigned getNumOperands() const { return NumOperands; } getSelectFunc()230 const std::string &getSelectFunc() const { return SelectFunc; } getRootNodes()231 const std::vector<Record*> &getRootNodes() const { 232 return RootNodes; 233 } hasProperty(enum SDNP Prop)234 bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); } getComplexity()235 unsigned getComplexity() const { return Complexity; } 236 }; 237 238 } // End llvm namespace 239 240 #endif 241