1 /*-
2 * Copyright (c) 2016 Hiroki Mori
3 * Copyright (c) 2013 Luiz Otavio O Souza.
4 * Copyright (c) 2011-2012 Stefan Bethke.
5 * Copyright (c) 2012 Adrian Chadd.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30 /*
31 * This is Micrel KSZ8995MA driver code. KSZ8995MA use SPI bus on control.
32 * This code development on @SRCHACK's ksz8995ma board and FON2100 with
33 * gpiospi.
34 * etherswitchcfg command port option support addtag, ingress, striptag,
35 * dropuntagged.
36 */
37
38 #include <sys/param.h>
39 #include <sys/bus.h>
40 #include <sys/errno.h>
41 #include <sys/kernel.h>
42 #include <sys/lock.h>
43 #include <sys/malloc.h>
44 #include <sys/module.h>
45 #include <sys/mutex.h>
46 #include <sys/socket.h>
47 #include <sys/sockio.h>
48 #include <sys/sysctl.h>
49 #include <sys/systm.h>
50
51 #include <net/if.h>
52 #include <net/if_var.h>
53 #include <net/ethernet.h>
54 #include <net/if_media.h>
55 #include <net/if_types.h>
56
57 #include <machine/bus.h>
58 #include <dev/mii/mii.h>
59 #include <dev/mii/miivar.h>
60
61 #include <dev/etherswitch/etherswitch.h>
62
63 #include <dev/spibus/spi.h>
64
65 #include "spibus_if.h"
66 #include "miibus_if.h"
67 #include "etherswitch_if.h"
68
69 #define KSZ8995MA_SPI_READ 0x03
70 #define KSZ8995MA_SPI_WRITE 0x02
71
72 #define KSZ8995MA_CID0 0x00
73 #define KSZ8995MA_CID1 0x01
74
75 #define KSZ8995MA_GC0 0x02
76 #define KSZ8995MA_GC1 0x03
77 #define KSZ8995MA_GC2 0x04
78 #define KSZ8995MA_GC3 0x05
79
80 #define KSZ8995MA_PORT_SIZE 0x10
81
82 #define KSZ8995MA_PC0_BASE 0x10
83 #define KSZ8995MA_PC1_BASE 0x11
84 #define KSZ8995MA_PC2_BASE 0x12
85 #define KSZ8995MA_PC3_BASE 0x13
86 #define KSZ8995MA_PC4_BASE 0x14
87 #define KSZ8995MA_PC5_BASE 0x15
88 #define KSZ8995MA_PC6_BASE 0x16
89 #define KSZ8995MA_PC7_BASE 0x17
90 #define KSZ8995MA_PC8_BASE 0x18
91 #define KSZ8995MA_PC9_BASE 0x19
92 #define KSZ8995MA_PC10_BASE 0x1a
93 #define KSZ8995MA_PC11_BASE 0x1b
94 #define KSZ8995MA_PC12_BASE 0x1c
95 #define KSZ8995MA_PC13_BASE 0x1d
96
97 #define KSZ8995MA_PS0_BASE 0x1e
98
99 #define KSZ8995MA_PC14_BASE 0x1f
100
101 #define KSZ8995MA_IAC0 0x6e
102 #define KSZ8995MA_IAC1 0x6f
103 #define KSZ8995MA_IDR8 0x70
104 #define KSZ8995MA_IDR7 0x71
105 #define KSZ8995MA_IDR6 0x72
106 #define KSZ8995MA_IDR5 0x73
107 #define KSZ8995MA_IDR4 0x74
108 #define KSZ8995MA_IDR3 0x75
109 #define KSZ8995MA_IDR2 0x76
110 #define KSZ8995MA_IDR1 0x77
111 #define KSZ8995MA_IDR0 0x78
112
113 #define KSZ8995MA_FAMILI_ID 0x95
114 #define KSZ8995MA_CHIP_ID 0x00
115 #define KSZ8995MA_CHIP_ID_MASK 0xf0
116 #define KSZ8995MA_START 0x01
117 #define KSZ8995MA_VLAN_ENABLE 0x80
118 #define KSZ8995MA_TAG_INS 0x04
119 #define KSZ8995MA_TAG_RM 0x02
120 #define KSZ8995MA_INGR_FILT 0x40
121 #define KSZ8995MA_DROP_NONPVID 0x20
122
123 #define KSZ8995MA_PDOWN 0x08
124 #define KSZ8995MA_STARTNEG 0x20
125
126 #define KSZ8995MA_MII_STAT 0x7808
127 #define KSZ8995MA_MII_PHYID_H 0x0022
128 #define KSZ8995MA_MII_PHYID_L 0x1450
129 #define KSZ8995MA_MII_AA 0x0401
130
131 #define KSZ8995MA_VLAN_TABLE_VALID 0x20
132 #define KSZ8995MA_VLAN_TABLE_READ 0x14
133 #define KSZ8995MA_VLAN_TABLE_WRITE 0x04
134
135 #define KSZ8995MA_MAX_PORT 5
136
137 MALLOC_DECLARE(M_KSZ8995MA);
138 MALLOC_DEFINE(M_KSZ8995MA, "ksz8995ma", "ksz8995ma data structures");
139
140 struct ksz8995ma_softc {
141 struct mtx sc_mtx; /* serialize access to softc */
142 device_t sc_dev;
143 int vlan_mode;
144 int media; /* cpu port media */
145 int cpuport; /* which PHY is connected to the CPU */
146 int phymask; /* PHYs we manage */
147 int numports; /* number of ports */
148 int ifpport[KSZ8995MA_MAX_PORT];
149 int *portphy;
150 char **ifname;
151 device_t **miibus;
152 if_t *ifp;
153 struct callout callout_tick;
154 etherswitch_info_t info;
155 };
156
157 #define KSZ8995MA_LOCK(_sc) \
158 mtx_lock(&(_sc)->sc_mtx)
159 #define KSZ8995MA_UNLOCK(_sc) \
160 mtx_unlock(&(_sc)->sc_mtx)
161 #define KSZ8995MA_LOCK_ASSERT(_sc, _what) \
162 mtx_assert(&(_sc)->sc_mtx, (_what))
163 #define KSZ8995MA_TRYLOCK(_sc) \
164 mtx_trylock(&(_sc)->sc_mtx)
165
166 #if defined(DEBUG)
167 #define DPRINTF(dev, args...) device_printf(dev, args)
168 #else
169 #define DPRINTF(dev, args...)
170 #endif
171
172 static inline int ksz8995ma_portforphy(struct ksz8995ma_softc *, int);
173 static void ksz8995ma_tick(void *);
174 static int ksz8995ma_ifmedia_upd(if_t);
175 static void ksz8995ma_ifmedia_sts(if_t, struct ifmediareq *);
176 static int ksz8995ma_readreg(device_t dev, int addr);
177 static int ksz8995ma_writereg(device_t dev, int addr, int value);
178 static void ksz8995ma_portvlanreset(device_t dev);
179
180 static int
ksz8995ma_probe(device_t dev)181 ksz8995ma_probe(device_t dev)
182 {
183 int id0, id1;
184 struct ksz8995ma_softc *sc;
185
186 sc = device_get_softc(dev);
187 bzero(sc, sizeof(*sc));
188
189 id0 = ksz8995ma_readreg(dev, KSZ8995MA_CID0);
190 id1 = ksz8995ma_readreg(dev, KSZ8995MA_CID1);
191 if (bootverbose)
192 device_printf(dev,"Chip Identifier Register %x %x\n", id0, id1);
193
194 /* check Product Code */
195 if (id0 != KSZ8995MA_FAMILI_ID || (id1 & KSZ8995MA_CHIP_ID_MASK) !=
196 KSZ8995MA_CHIP_ID) {
197 return (ENXIO);
198 }
199
200 device_set_desc(dev, "Micrel KSZ8995MA SPI switch driver");
201 return (BUS_PROBE_DEFAULT);
202 }
203
204 static int
ksz8995ma_attach_phys(struct ksz8995ma_softc * sc)205 ksz8995ma_attach_phys(struct ksz8995ma_softc *sc)
206 {
207 int phy, port, err;
208 char name[IFNAMSIZ];
209
210 port = 0;
211 err = 0;
212 /* PHYs need an interface, so we generate a dummy one */
213 snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->sc_dev));
214 for (phy = 0; phy < sc->numports; phy++) {
215 if (phy == sc->cpuport)
216 continue;
217 if (((1 << phy) & sc->phymask) == 0)
218 continue;
219 sc->ifpport[phy] = port;
220 sc->portphy[port] = phy;
221 sc->ifp[port] = if_alloc(IFT_ETHER);
222 if (sc->ifp[port] == NULL) {
223 device_printf(sc->sc_dev, "couldn't allocate ifnet structure\n");
224 err = ENOMEM;
225 break;
226 }
227
228 sc->ifp[port]->if_softc = sc;
229 sc->ifp[port]->if_flags |= IFF_UP | IFF_BROADCAST |
230 IFF_DRV_RUNNING | IFF_SIMPLEX;
231 if_initname(sc->ifp[port], name, port);
232 sc->miibus[port] = malloc(sizeof(device_t), M_KSZ8995MA,
233 M_WAITOK | M_ZERO);
234 if (sc->miibus[port] == NULL) {
235 err = ENOMEM;
236 goto failed;
237 }
238 err = mii_attach(sc->sc_dev, sc->miibus[port], sc->ifp[port],
239 ksz8995ma_ifmedia_upd, ksz8995ma_ifmedia_sts, \
240 BMSR_DEFCAPMASK, phy, MII_OFFSET_ANY, 0);
241 DPRINTF(sc->sc_dev, "%s attached to pseudo interface %s\n",
242 device_get_nameunit(*sc->miibus[port]),
243 sc->ifp[port]->if_xname);
244 if (err != 0) {
245 device_printf(sc->sc_dev,
246 "attaching PHY %d failed\n",
247 phy);
248 goto failed;
249 }
250 ++port;
251 }
252 sc->info.es_nports = port;
253 if (sc->cpuport != -1) {
254 /* cpu port is MAC5 on ksz8995ma */
255 sc->ifpport[sc->cpuport] = port;
256 sc->portphy[port] = sc->cpuport;
257 ++sc->info.es_nports;
258 }
259
260 return (0);
261
262 failed:
263 for (phy = 0; phy < sc->numports; phy++) {
264 if (((1 << phy) & sc->phymask) == 0)
265 continue;
266 port = ksz8995ma_portforphy(sc, phy);
267 if (sc->miibus[port] != NULL)
268 device_delete_child(sc->sc_dev, (*sc->miibus[port]));
269 if (sc->ifp[port] != NULL)
270 if_free(sc->ifp[port]);
271 if (sc->ifname[port] != NULL)
272 free(sc->ifname[port], M_KSZ8995MA);
273 if (sc->miibus[port] != NULL)
274 free(sc->miibus[port], M_KSZ8995MA);
275 }
276 return (err);
277 }
278
279 static int
ksz8995ma_attach(device_t dev)280 ksz8995ma_attach(device_t dev)
281 {
282 struct ksz8995ma_softc *sc;
283 int err, reg;
284
285 err = 0;
286 sc = device_get_softc(dev);
287
288 sc->sc_dev = dev;
289 mtx_init(&sc->sc_mtx, "ksz8995ma", NULL, MTX_DEF);
290 strlcpy(sc->info.es_name, device_get_desc(dev),
291 sizeof(sc->info.es_name));
292
293 /* KSZ8995MA Defaults */
294 sc->numports = KSZ8995MA_MAX_PORT;
295 sc->phymask = (1 << (KSZ8995MA_MAX_PORT + 1)) - 1;
296 sc->cpuport = -1;
297 sc->media = 100;
298
299 (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
300 "cpuport", &sc->cpuport);
301
302 sc->info.es_nvlangroups = 16;
303 sc->info.es_vlan_caps = ETHERSWITCH_VLAN_PORT | ETHERSWITCH_VLAN_DOT1Q;
304
305 sc->ifp = malloc(sizeof(if_t) * sc->numports, M_KSZ8995MA,
306 M_WAITOK | M_ZERO);
307 sc->ifname = malloc(sizeof(char *) * sc->numports, M_KSZ8995MA,
308 M_WAITOK | M_ZERO);
309 sc->miibus = malloc(sizeof(device_t *) * sc->numports, M_KSZ8995MA,
310 M_WAITOK | M_ZERO);
311 sc->portphy = malloc(sizeof(int) * sc->numports, M_KSZ8995MA,
312 M_WAITOK | M_ZERO);
313
314 if (sc->ifp == NULL || sc->ifname == NULL || sc->miibus == NULL ||
315 sc->portphy == NULL) {
316 err = ENOMEM;
317 goto failed;
318 }
319
320 /*
321 * Attach the PHYs and complete the bus enumeration.
322 */
323 err = ksz8995ma_attach_phys(sc);
324 if (err != 0)
325 goto failed;
326
327 bus_generic_probe(dev);
328 bus_enumerate_hinted_children(dev);
329 err = bus_generic_attach(dev);
330 if (err != 0)
331 goto failed;
332
333 callout_init(&sc->callout_tick, 0);
334
335 ksz8995ma_tick(sc);
336
337 /* start switch */
338 sc->vlan_mode = 0;
339 reg = ksz8995ma_readreg(dev, KSZ8995MA_GC3);
340 ksz8995ma_writereg(dev, KSZ8995MA_GC3,
341 reg & ~KSZ8995MA_VLAN_ENABLE);
342 ksz8995ma_portvlanreset(dev);
343 ksz8995ma_writereg(dev, KSZ8995MA_CID1, KSZ8995MA_START);
344
345 return (0);
346
347 failed:
348 if (sc->portphy != NULL)
349 free(sc->portphy, M_KSZ8995MA);
350 if (sc->miibus != NULL)
351 free(sc->miibus, M_KSZ8995MA);
352 if (sc->ifname != NULL)
353 free(sc->ifname, M_KSZ8995MA);
354 if (sc->ifp != NULL)
355 free(sc->ifp, M_KSZ8995MA);
356
357 return (err);
358 }
359
360 static int
ksz8995ma_detach(device_t dev)361 ksz8995ma_detach(device_t dev)
362 {
363 struct ksz8995ma_softc *sc;
364 int i, port;
365
366 sc = device_get_softc(dev);
367
368 callout_drain(&sc->callout_tick);
369
370 for (i = 0; i < KSZ8995MA_MAX_PORT; i++) {
371 if (((1 << i) & sc->phymask) == 0)
372 continue;
373 port = ksz8995ma_portforphy(sc, i);
374 if (sc->miibus[port] != NULL)
375 device_delete_child(dev, (*sc->miibus[port]));
376 if (sc->ifp[port] != NULL)
377 if_free(sc->ifp[port]);
378 free(sc->ifname[port], M_KSZ8995MA);
379 free(sc->miibus[port], M_KSZ8995MA);
380 }
381
382 free(sc->portphy, M_KSZ8995MA);
383 free(sc->miibus, M_KSZ8995MA);
384 free(sc->ifname, M_KSZ8995MA);
385 free(sc->ifp, M_KSZ8995MA);
386
387 bus_generic_detach(dev);
388 mtx_destroy(&sc->sc_mtx);
389
390 return (0);
391 }
392
393 /*
394 * Convert PHY number to port number.
395 */
396 static inline int
ksz8995ma_portforphy(struct ksz8995ma_softc * sc,int phy)397 ksz8995ma_portforphy(struct ksz8995ma_softc *sc, int phy)
398 {
399
400 return (sc->ifpport[phy]);
401 }
402
403 static inline struct mii_data *
ksz8995ma_miiforport(struct ksz8995ma_softc * sc,int port)404 ksz8995ma_miiforport(struct ksz8995ma_softc *sc, int port)
405 {
406
407 if (port < 0 || port > sc->numports)
408 return (NULL);
409 if (port == sc->cpuport)
410 return (NULL);
411 return (device_get_softc(*sc->miibus[port]));
412 }
413
414 static inline if_t
ksz8995ma_ifpforport(struct ksz8995ma_softc * sc,int port)415 ksz8995ma_ifpforport(struct ksz8995ma_softc *sc, int port)
416 {
417
418 if (port < 0 || port > sc->numports)
419 return (NULL);
420 return (sc->ifp[port]);
421 }
422
423 /*
424 * Poll the status for all PHYs.
425 */
426 static void
ksz8995ma_miipollstat(struct ksz8995ma_softc * sc)427 ksz8995ma_miipollstat(struct ksz8995ma_softc *sc)
428 {
429 int i, port;
430 struct mii_data *mii;
431 struct mii_softc *miisc;
432
433 KSZ8995MA_LOCK_ASSERT(sc, MA_NOTOWNED);
434
435 for (i = 0; i < KSZ8995MA_MAX_PORT; i++) {
436 if (i == sc->cpuport)
437 continue;
438 if (((1 << i) & sc->phymask) == 0)
439 continue;
440 port = ksz8995ma_portforphy(sc, i);
441 if ((*sc->miibus[port]) == NULL)
442 continue;
443 mii = device_get_softc(*sc->miibus[port]);
444 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
445 if (IFM_INST(mii->mii_media.ifm_cur->ifm_media) !=
446 miisc->mii_inst)
447 continue;
448 ukphy_status(miisc);
449 mii_phy_update(miisc, MII_POLLSTAT);
450 }
451 }
452 }
453
454 static void
ksz8995ma_tick(void * arg)455 ksz8995ma_tick(void *arg)
456 {
457 struct ksz8995ma_softc *sc;
458
459 sc = arg;
460
461 ksz8995ma_miipollstat(sc);
462 callout_reset(&sc->callout_tick, hz, ksz8995ma_tick, sc);
463 }
464
465 static void
ksz8995ma_lock(device_t dev)466 ksz8995ma_lock(device_t dev)
467 {
468 struct ksz8995ma_softc *sc;
469
470 sc = device_get_softc(dev);
471
472 KSZ8995MA_LOCK_ASSERT(sc, MA_NOTOWNED);
473 KSZ8995MA_LOCK(sc);
474 }
475
476 static void
ksz8995ma_unlock(device_t dev)477 ksz8995ma_unlock(device_t dev)
478 {
479 struct ksz8995ma_softc *sc;
480
481 sc = device_get_softc(dev);
482
483 KSZ8995MA_LOCK_ASSERT(sc, MA_OWNED);
484 KSZ8995MA_UNLOCK(sc);
485 }
486
487 static etherswitch_info_t *
ksz8995ma_getinfo(device_t dev)488 ksz8995ma_getinfo(device_t dev)
489 {
490 struct ksz8995ma_softc *sc;
491
492 sc = device_get_softc(dev);
493
494 return (&sc->info);
495 }
496
497 static int
ksz8995ma_getport(device_t dev,etherswitch_port_t * p)498 ksz8995ma_getport(device_t dev, etherswitch_port_t *p)
499 {
500 struct ksz8995ma_softc *sc;
501 struct mii_data *mii;
502 struct ifmediareq *ifmr;
503 int phy, err;
504 int tag1, tag2, portreg;
505
506 sc = device_get_softc(dev);
507 ifmr = &p->es_ifmr;
508
509 if (p->es_port < 0 || p->es_port >= sc->numports)
510 return (ENXIO);
511
512 if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) {
513 tag1 = ksz8995ma_readreg(dev, KSZ8995MA_PC3_BASE +
514 KSZ8995MA_PORT_SIZE * p->es_port);
515 tag2 = ksz8995ma_readreg(dev, KSZ8995MA_PC4_BASE +
516 KSZ8995MA_PORT_SIZE * p->es_port);
517 p->es_pvid = (tag1 & 0x0f) << 8 | tag2;
518
519 portreg = ksz8995ma_readreg(dev, KSZ8995MA_PC0_BASE +
520 KSZ8995MA_PORT_SIZE * p->es_port);
521 if (portreg & KSZ8995MA_TAG_INS)
522 p->es_flags |= ETHERSWITCH_PORT_ADDTAG;
523 if (portreg & KSZ8995MA_TAG_RM)
524 p->es_flags |= ETHERSWITCH_PORT_STRIPTAG;
525
526 portreg = ksz8995ma_readreg(dev, KSZ8995MA_PC2_BASE +
527 KSZ8995MA_PORT_SIZE * p->es_port);
528 if (portreg & KSZ8995MA_DROP_NONPVID)
529 p->es_flags |= ETHERSWITCH_PORT_DROPUNTAGGED;
530 if (portreg & KSZ8995MA_INGR_FILT)
531 p->es_flags |= ETHERSWITCH_PORT_INGRESS;
532 }
533
534 phy = sc->portphy[p->es_port];
535 mii = ksz8995ma_miiforport(sc, p->es_port);
536 if (sc->cpuport != -1 && phy == sc->cpuport) {
537 /* fill in fixed values for CPU port */
538 p->es_flags |= ETHERSWITCH_PORT_CPU;
539 ifmr->ifm_count = 0;
540 if (sc->media == 100)
541 ifmr->ifm_current = ifmr->ifm_active =
542 IFM_ETHER | IFM_100_TX | IFM_FDX;
543 else
544 ifmr->ifm_current = ifmr->ifm_active =
545 IFM_ETHER | IFM_1000_T | IFM_FDX;
546 ifmr->ifm_mask = 0;
547 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
548 } else if (mii != NULL) {
549 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr,
550 &mii->mii_media, SIOCGIFMEDIA);
551 if (err)
552 return (err);
553 } else {
554 return (ENXIO);
555 }
556
557 return (0);
558 }
559
560 static int
ksz8995ma_setport(device_t dev,etherswitch_port_t * p)561 ksz8995ma_setport(device_t dev, etherswitch_port_t *p)
562 {
563 struct ksz8995ma_softc *sc;
564 struct mii_data *mii;
565 struct ifmedia *ifm;
566 if_t ifp;
567 int phy, err;
568 int portreg;
569
570 sc = device_get_softc(dev);
571
572 if (p->es_port < 0 || p->es_port >= sc->numports)
573 return (ENXIO);
574
575 if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) {
576 ksz8995ma_writereg(dev, KSZ8995MA_PC4_BASE +
577 KSZ8995MA_PORT_SIZE * p->es_port, p->es_pvid & 0xff);
578 portreg = ksz8995ma_readreg(dev, KSZ8995MA_PC3_BASE +
579 KSZ8995MA_PORT_SIZE * p->es_port);
580 ksz8995ma_writereg(dev, KSZ8995MA_PC3_BASE +
581 KSZ8995MA_PORT_SIZE * p->es_port,
582 (portreg & 0xf0) | ((p->es_pvid >> 8) & 0x0f));
583
584 portreg = ksz8995ma_readreg(dev, KSZ8995MA_PC0_BASE +
585 KSZ8995MA_PORT_SIZE * p->es_port);
586 if (p->es_flags & ETHERSWITCH_PORT_ADDTAG)
587 portreg |= KSZ8995MA_TAG_INS;
588 else
589 portreg &= ~KSZ8995MA_TAG_INS;
590 if (p->es_flags & ETHERSWITCH_PORT_STRIPTAG)
591 portreg |= KSZ8995MA_TAG_RM;
592 else
593 portreg &= ~KSZ8995MA_TAG_RM;
594 ksz8995ma_writereg(dev, KSZ8995MA_PC0_BASE +
595 KSZ8995MA_PORT_SIZE * p->es_port, portreg);
596
597 portreg = ksz8995ma_readreg(dev, KSZ8995MA_PC2_BASE +
598 KSZ8995MA_PORT_SIZE * p->es_port);
599 if (p->es_flags & ETHERSWITCH_PORT_DROPUNTAGGED)
600 portreg |= KSZ8995MA_DROP_NONPVID;
601 else
602 portreg &= ~KSZ8995MA_DROP_NONPVID;
603 if (p->es_flags & ETHERSWITCH_PORT_INGRESS)
604 portreg |= KSZ8995MA_INGR_FILT;
605 else
606 portreg &= ~KSZ8995MA_INGR_FILT;
607 ksz8995ma_writereg(dev, KSZ8995MA_PC2_BASE +
608 KSZ8995MA_PORT_SIZE * p->es_port, portreg);
609 }
610
611 phy = sc->portphy[p->es_port];
612 mii = ksz8995ma_miiforport(sc, p->es_port);
613 if (phy != sc->cpuport) {
614 if (mii == NULL)
615 return (ENXIO);
616 ifp = ksz8995ma_ifpforport(sc, p->es_port);
617 ifm = &mii->mii_media;
618 err = ifmedia_ioctl(ifp, &p->es_ifr, ifm, SIOCSIFMEDIA);
619 }
620 return (0);
621 }
622
623 static int
ksz8995ma_getvgroup(device_t dev,etherswitch_vlangroup_t * vg)624 ksz8995ma_getvgroup(device_t dev, etherswitch_vlangroup_t *vg)
625 {
626 int data0, data1, data2;
627 int vlantab;
628 struct ksz8995ma_softc *sc;
629
630 sc = device_get_softc(dev);
631
632 if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT) {
633 if (vg->es_vlangroup < sc->numports) {
634 vg->es_vid = ETHERSWITCH_VID_VALID;
635 vg->es_vid |= vg->es_vlangroup;
636 data0 = ksz8995ma_readreg(dev, KSZ8995MA_PC1_BASE +
637 KSZ8995MA_PORT_SIZE * vg->es_vlangroup);
638 vg->es_member_ports = data0 & 0x1f;
639 vg->es_untagged_ports = vg->es_member_ports;
640 vg->es_fid = 0;
641 } else {
642 vg->es_vid = 0;
643 }
644 } else if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) {
645 ksz8995ma_writereg(dev, KSZ8995MA_IAC0,
646 KSZ8995MA_VLAN_TABLE_READ);
647 ksz8995ma_writereg(dev, KSZ8995MA_IAC1, vg->es_vlangroup);
648 data2 = ksz8995ma_readreg(dev, KSZ8995MA_IDR2);
649 data1 = ksz8995ma_readreg(dev, KSZ8995MA_IDR1);
650 data0 = ksz8995ma_readreg(dev, KSZ8995MA_IDR0);
651 vlantab = data2 << 16 | data1 << 8 | data0;
652 if (data2 & KSZ8995MA_VLAN_TABLE_VALID) {
653 vg->es_vid = ETHERSWITCH_VID_VALID;
654 vg->es_vid |= vlantab & 0xfff;
655 vg->es_member_ports = (vlantab >> 16) & 0x1f;
656 vg->es_untagged_ports = vg->es_member_ports;
657 vg->es_fid = (vlantab >> 12) & 0x0f;
658 } else {
659 vg->es_fid = 0;
660 }
661 }
662
663 return (0);
664 }
665
666 static int
ksz8995ma_setvgroup(device_t dev,etherswitch_vlangroup_t * vg)667 ksz8995ma_setvgroup(device_t dev, etherswitch_vlangroup_t *vg)
668 {
669 struct ksz8995ma_softc *sc;
670 int data0;
671
672 sc = device_get_softc(dev);
673
674 if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT) {
675 data0 = ksz8995ma_readreg(dev, KSZ8995MA_PC1_BASE +
676 KSZ8995MA_PORT_SIZE * vg->es_vlangroup);
677 ksz8995ma_writereg(dev, KSZ8995MA_PC1_BASE +
678 KSZ8995MA_PORT_SIZE * vg->es_vlangroup,
679 (data0 & 0xe0) | (vg->es_member_ports & 0x1f));
680 } else if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) {
681 if (vg->es_member_ports != 0) {
682 ksz8995ma_writereg(dev, KSZ8995MA_IDR2,
683 KSZ8995MA_VLAN_TABLE_VALID |
684 (vg->es_member_ports & 0x1f));
685 ksz8995ma_writereg(dev, KSZ8995MA_IDR1,
686 vg->es_fid << 4 | vg->es_vid >> 8);
687 ksz8995ma_writereg(dev, KSZ8995MA_IDR0,
688 vg->es_vid & 0xff);
689 } else {
690 ksz8995ma_writereg(dev, KSZ8995MA_IDR2, 0);
691 ksz8995ma_writereg(dev, KSZ8995MA_IDR1, 0);
692 ksz8995ma_writereg(dev, KSZ8995MA_IDR0, 0);
693 }
694 ksz8995ma_writereg(dev, KSZ8995MA_IAC0,
695 KSZ8995MA_VLAN_TABLE_WRITE);
696 ksz8995ma_writereg(dev, KSZ8995MA_IAC1, vg->es_vlangroup);
697 }
698
699 return (0);
700 }
701
702 static int
ksz8995ma_getconf(device_t dev,etherswitch_conf_t * conf)703 ksz8995ma_getconf(device_t dev, etherswitch_conf_t *conf)
704 {
705 struct ksz8995ma_softc *sc;
706
707 sc = device_get_softc(dev);
708
709 /* Return the VLAN mode. */
710 conf->cmd = ETHERSWITCH_CONF_VLAN_MODE;
711 conf->vlan_mode = sc->vlan_mode;
712
713 return (0);
714 }
715
716 static void
ksz8995ma_portvlanreset(device_t dev)717 ksz8995ma_portvlanreset(device_t dev)
718 {
719 int i, data;
720 struct ksz8995ma_softc *sc;
721
722 sc = device_get_softc(dev);
723
724 for (i = 0; i < sc->numports; ++i) {
725 data = ksz8995ma_readreg(dev, KSZ8995MA_PC1_BASE +
726 KSZ8995MA_PORT_SIZE * i);
727 ksz8995ma_writereg(dev, KSZ8995MA_PC1_BASE +
728 KSZ8995MA_PORT_SIZE * i, (data & 0xe0) | 0x1f);
729 }
730 }
731
732 static int
ksz8995ma_setconf(device_t dev,etherswitch_conf_t * conf)733 ksz8995ma_setconf(device_t dev, etherswitch_conf_t *conf)
734 {
735 int reg;
736 struct ksz8995ma_softc *sc;
737
738 sc = device_get_softc(dev);
739
740 if ((conf->cmd & ETHERSWITCH_CONF_VLAN_MODE) == 0)
741 return (0);
742
743 if (conf->vlan_mode == ETHERSWITCH_VLAN_PORT) {
744 sc->vlan_mode = ETHERSWITCH_VLAN_PORT;
745 reg = ksz8995ma_readreg(dev, KSZ8995MA_GC3);
746 ksz8995ma_writereg(dev, KSZ8995MA_GC3,
747 reg & ~KSZ8995MA_VLAN_ENABLE);
748 ksz8995ma_portvlanreset(dev);
749 } else if (conf->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) {
750 sc->vlan_mode = ETHERSWITCH_VLAN_DOT1Q;
751 reg = ksz8995ma_readreg(dev, KSZ8995MA_GC3);
752 ksz8995ma_writereg(dev, KSZ8995MA_GC3,
753 reg | KSZ8995MA_VLAN_ENABLE);
754 } else {
755 sc->vlan_mode = 0;
756 reg = ksz8995ma_readreg(dev, KSZ8995MA_GC3);
757 ksz8995ma_writereg(dev, KSZ8995MA_GC3,
758 reg & ~KSZ8995MA_VLAN_ENABLE);
759 ksz8995ma_portvlanreset(dev);
760 }
761 return (0);
762 }
763
764 static void
ksz8995ma_statchg(device_t dev)765 ksz8995ma_statchg(device_t dev)
766 {
767
768 DPRINTF(dev, "%s\n", __func__);
769 }
770
771 static int
ksz8995ma_ifmedia_upd(if_t ifp)772 ksz8995ma_ifmedia_upd(if_t ifp)
773 {
774 struct ksz8995ma_softc *sc;
775 struct mii_data *mii;
776
777 sc = if_getsoftc(ifp);
778 mii = ksz8995ma_miiforport(sc, if_getdunit(ifp));
779
780 DPRINTF(sc->sc_dev, "%s\n", __func__);
781 if (mii == NULL)
782 return (ENXIO);
783 mii_mediachg(mii);
784 return (0);
785 }
786
787 static void
ksz8995ma_ifmedia_sts(if_t ifp,struct ifmediareq * ifmr)788 ksz8995ma_ifmedia_sts(if_t ifp, struct ifmediareq *ifmr)
789 {
790 struct ksz8995ma_softc *sc;
791 struct mii_data *mii;
792
793 sc = if_getsoftc(ifp);
794 mii = ksz8995ma_miiforport(sc, if_getdunit(ifp));
795
796 DPRINTF(sc->sc_dev, "%s\n", __func__);
797
798 if (mii == NULL)
799 return;
800 mii_pollstat(mii);
801 ifmr->ifm_active = mii->mii_media_active;
802 ifmr->ifm_status = mii->mii_media_status;
803 }
804
805 static int
ksz8995ma_readphy(device_t dev,int phy,int reg)806 ksz8995ma_readphy(device_t dev, int phy, int reg)
807 {
808 int portreg;
809
810 /*
811 * This is no mdio/mdc connection code.
812 * simulate MIIM Registers via the SPI interface
813 */
814 if (reg == MII_BMSR) {
815 portreg = ksz8995ma_readreg(dev, KSZ8995MA_PS0_BASE +
816 KSZ8995MA_PORT_SIZE * phy);
817 return (KSZ8995MA_MII_STAT |
818 (portreg & 0x20 ? BMSR_LINK : 0x00) |
819 (portreg & 0x40 ? BMSR_ACOMP : 0x00));
820 } else if (reg == MII_PHYIDR1) {
821 return (KSZ8995MA_MII_PHYID_H);
822 } else if (reg == MII_PHYIDR2) {
823 return (KSZ8995MA_MII_PHYID_L);
824 } else if (reg == MII_ANAR) {
825 portreg = ksz8995ma_readreg(dev, KSZ8995MA_PC12_BASE +
826 KSZ8995MA_PORT_SIZE * phy);
827 return (KSZ8995MA_MII_AA | (portreg & 0x0f) << 5);
828 } else if (reg == MII_ANLPAR) {
829 portreg = ksz8995ma_readreg(dev, KSZ8995MA_PS0_BASE +
830 KSZ8995MA_PORT_SIZE * phy);
831 return (((portreg & 0x0f) << 5) | 0x01);
832 }
833
834 return (0);
835 }
836
837 static int
ksz8995ma_writephy(device_t dev,int phy,int reg,int data)838 ksz8995ma_writephy(device_t dev, int phy, int reg, int data)
839 {
840 int portreg;
841
842 /*
843 * This is no mdio/mdc connection code.
844 * simulate MIIM Registers via the SPI interface
845 */
846 if (reg == MII_BMCR) {
847 portreg = ksz8995ma_readreg(dev, KSZ8995MA_PC13_BASE +
848 KSZ8995MA_PORT_SIZE * phy);
849 if (data & BMCR_PDOWN)
850 portreg |= KSZ8995MA_PDOWN;
851 else
852 portreg &= ~KSZ8995MA_PDOWN;
853 if (data & BMCR_STARTNEG)
854 portreg |= KSZ8995MA_STARTNEG;
855 else
856 portreg &= ~KSZ8995MA_STARTNEG;
857 ksz8995ma_writereg(dev, KSZ8995MA_PC13_BASE +
858 KSZ8995MA_PORT_SIZE * phy, portreg);
859 } else if (reg == MII_ANAR) {
860 portreg = ksz8995ma_readreg(dev, KSZ8995MA_PC12_BASE +
861 KSZ8995MA_PORT_SIZE * phy);
862 portreg &= 0xf;
863 portreg |= ((data >> 5) & 0x0f);
864 ksz8995ma_writereg(dev, KSZ8995MA_PC12_BASE +
865 KSZ8995MA_PORT_SIZE * phy, portreg);
866 }
867 return (0);
868 }
869
870 static int
ksz8995ma_readreg(device_t dev,int addr)871 ksz8995ma_readreg(device_t dev, int addr)
872 {
873 uint8_t txBuf[8], rxBuf[8];
874 struct spi_command cmd;
875 int err;
876
877 memset(&cmd, 0, sizeof(cmd));
878 memset(txBuf, 0, sizeof(txBuf));
879 memset(rxBuf, 0, sizeof(rxBuf));
880
881 /* read spi */
882 txBuf[0] = KSZ8995MA_SPI_READ;
883 txBuf[1] = addr;
884 cmd.tx_cmd = &txBuf;
885 cmd.rx_cmd = &rxBuf;
886 cmd.tx_cmd_sz = 3;
887 cmd.rx_cmd_sz = 3;
888 err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd);
889 if (err)
890 return(0);
891
892 return (rxBuf[2]);
893 }
894
895 static int
ksz8995ma_writereg(device_t dev,int addr,int value)896 ksz8995ma_writereg(device_t dev, int addr, int value)
897 {
898 uint8_t txBuf[8], rxBuf[8];
899 struct spi_command cmd;
900 int err;
901
902 memset(&cmd, 0, sizeof(cmd));
903 memset(txBuf, 0, sizeof(txBuf));
904 memset(rxBuf, 0, sizeof(rxBuf));
905
906 /* write spi */
907 txBuf[0] = KSZ8995MA_SPI_WRITE;
908 txBuf[1] = addr;
909 txBuf[2] = value;
910 cmd.tx_cmd = &txBuf;
911 cmd.rx_cmd = &rxBuf;
912 cmd.tx_cmd_sz = 3;
913 cmd.rx_cmd_sz = 3;
914 err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd);
915 if (err)
916 return(0);
917
918 return (0);
919 }
920
921 static device_method_t ksz8995ma_methods[] = {
922 /* Device interface */
923 DEVMETHOD(device_probe, ksz8995ma_probe),
924 DEVMETHOD(device_attach, ksz8995ma_attach),
925 DEVMETHOD(device_detach, ksz8995ma_detach),
926
927 /* bus interface */
928 DEVMETHOD(bus_add_child, device_add_child_ordered),
929
930 /* MII interface */
931 DEVMETHOD(miibus_readreg, ksz8995ma_readphy),
932 DEVMETHOD(miibus_writereg, ksz8995ma_writephy),
933 DEVMETHOD(miibus_statchg, ksz8995ma_statchg),
934
935 /* etherswitch interface */
936 DEVMETHOD(etherswitch_lock, ksz8995ma_lock),
937 DEVMETHOD(etherswitch_unlock, ksz8995ma_unlock),
938 DEVMETHOD(etherswitch_getinfo, ksz8995ma_getinfo),
939 DEVMETHOD(etherswitch_readreg, ksz8995ma_readreg),
940 DEVMETHOD(etherswitch_writereg, ksz8995ma_writereg),
941 DEVMETHOD(etherswitch_readphyreg, ksz8995ma_readphy),
942 DEVMETHOD(etherswitch_writephyreg, ksz8995ma_writephy),
943 DEVMETHOD(etherswitch_getport, ksz8995ma_getport),
944 DEVMETHOD(etherswitch_setport, ksz8995ma_setport),
945 DEVMETHOD(etherswitch_getvgroup, ksz8995ma_getvgroup),
946 DEVMETHOD(etherswitch_setvgroup, ksz8995ma_setvgroup),
947 DEVMETHOD(etherswitch_setconf, ksz8995ma_setconf),
948 DEVMETHOD(etherswitch_getconf, ksz8995ma_getconf),
949
950 DEVMETHOD_END
951 };
952
953 DEFINE_CLASS_0(ksz8995ma, ksz8995ma_driver, ksz8995ma_methods,
954 sizeof(struct ksz8995ma_softc));
955
956 DRIVER_MODULE(ksz8995ma, spibus, ksz8995ma_driver, 0, 0);
957 DRIVER_MODULE(miibus, ksz8995ma, miibus_driver, 0, 0);
958 DRIVER_MODULE(etherswitch, ksz8995ma, etherswitch_driver, 0, 0);
959 MODULE_VERSION(ksz8995ma, 1);
960 MODULE_DEPEND(ksz8995ma, spibus, 1, 1, 1); /* XXX which versions? */
961 MODULE_DEPEND(ksz8995ma, miibus, 1, 1, 1); /* XXX which versions? */
962 MODULE_DEPEND(ksz8995ma, etherswitch, 1, 1, 1); /* XXX which versions? */
963