| /dports/lang/gnatdroid-sysroot-x86/android-19-x86/usr/include/linux/ |
| H A D | cache.h | 19 #define L1_CACHE_ALIGN(x) ALIGN(x, L1_CACHE_BYTES) macro
|
| /dports/lang/gnatdroid-sysroot/android-19-arm/usr/include/linux/ |
| H A D | cache.h | 19 #define L1_CACHE_ALIGN(x) ALIGN(x, L1_CACHE_BYTES) macro
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/include/linux/ |
| H A D | cache.h | 9 #define L1_CACHE_ALIGN(x) __ALIGN_KERNEL(x, L1_CACHE_BYTES) macro
|
| /dports/multimedia/libv4l/linux-5.13-rc2/include/linux/ |
| H A D | cache.h | 9 #define L1_CACHE_ALIGN(x) __ALIGN_KERNEL(x, L1_CACHE_BYTES) macro
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/include/linux/ |
| H A D | cache.h | 9 #define L1_CACHE_ALIGN(x) __ALIGN_KERNEL(x, L1_CACHE_BYTES) macro
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/powerpc/include/asm/ |
| H A D | cache.h | 30 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) macro
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/powerpc/include/asm/ |
| H A D | cache.h | 30 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) macro
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/powerpc/include/asm/ |
| H A D | cache.h | 30 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) macro
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/powerpc/include/asm/ |
| H A D | cache.h | 30 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) macro
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/powerpc/include/asm/ |
| H A D | cache.h | 30 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) macro
|
| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/powerpc/include/asm/ |
| H A D | cache.h | 30 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) macro
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/powerpc/include/asm/ |
| H A D | cache.h | 30 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) macro
|
| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/powerpc/include/asm/ |
| H A D | cache.h | 35 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) macro
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/powerpc/include/asm/ |
| H A D | cache.h | 35 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) macro
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/powerpc/include/asm/ |
| H A D | cache.h | 35 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) macro
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | cache.h | 35 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) macro
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | cache.h | 35 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) macro
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | cache.h | 35 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) macro
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | cache.h | 35 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) macro
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | cache.h | 35 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) macro
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | cache.h | 35 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) macro
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | cache.h | 35 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) macro
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | cache.h | 35 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) macro
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | cache.h | 35 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) macro
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | cache.h | 35 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) macro
|