1 /* $OpenBSD: i82489var.h,v 1.16 2024/07/07 03:03:09 jsg Exp $ */
2 /* $NetBSD: i82489var.h,v 1.1.2.2 2000/02/21 18:46:14 sommerfeld Exp $ */
3
4 /*-
5 * Copyright (c) 1998 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Frank van der Linden.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #ifndef _MACHINE_I82489VAR_H_
34 #define _MACHINE_I82489VAR_H_
35
36 static __inline__ u_int32_t i82489_readreg(int);
37 static __inline__ void i82489_writereg(int, u_int32_t);
38
39 #ifdef _KERNEL
40 extern volatile u_int32_t local_apic[];
41 #endif
42
43 static __inline__ u_int32_t
i82489_readreg(int reg)44 i82489_readreg(int reg)
45 {
46 return *((volatile u_int32_t *)(((volatile u_int8_t *)local_apic)
47 + reg));
48 }
49
50 static __inline__ void
i82489_writereg(int reg,u_int32_t val)51 i82489_writereg(int reg, u_int32_t val)
52 {
53 *((volatile u_int32_t *)(((volatile u_int8_t *)local_apic) + reg)) =
54 val;
55 /*
56 * intel xeon errata p53:
57 * write to a lapic register sometimes may appear to have not occurred
58 * workaround:
59 * follow write with a read [from id register]
60 */
61 val = *((volatile u_int32_t *)(((volatile u_int8_t *)local_apic) +
62 LAPIC_ID));
63 }
64
65 /*
66 * "spurious interrupt vector"; vector used by interrupt which was
67 * aborted because the CPU masked it after it happened but before it
68 * was delivered.. "Oh, sorry, i caught you at a bad time".
69 * Low-order 4 bits must be all ones.
70 */
71 extern void Xintrspurious(void);
72 #define LAPIC_SPURIOUS_VECTOR 0xef
73
74 /*
75 * Vector used for inter-processor interrupts.
76 */
77 extern void Xintripi(void);
78 #define LAPIC_IPI_VECTOR IPL_IPI
79
80 /*
81 * Vector used for local apic timer interrupts.
82 */
83
84 extern void Xintrltimer(void);
85 #define LAPIC_TIMER_VECTOR IPL_CLOCK
86
87 /*
88 * Vectors to be used for self-soft-interrupts.
89 */
90
91 #define LAPIC_SOFTCLOCK_VECTOR IPL_SOFTCLOCK
92 #define LAPIC_SOFTNET_VECTOR IPL_SOFTNET
93 #define LAPIC_SOFTTTY_VECTOR IPL_SOFTTTY
94
95 /*
96 * Special IPI vectors. We can use IDT 0xf0 - 0xff for this.
97 */
98 #define LAPIC_IPI_OFFSET 0xf0
99 #define LAPIC_IPI_INVLTLB (LAPIC_IPI_OFFSET + 0)
100 #define LAPIC_IPI_INVLPG (LAPIC_IPI_OFFSET + 1)
101 #define LAPIC_IPI_INVLRANGE (LAPIC_IPI_OFFSET + 2)
102 #define LAPIC_IPI_RELOADCR3 (LAPIC_IPI_OFFSET + 3)
103
104 extern void Xintripi_invltlb(void);
105 extern void Xintripi_invlpg(void);
106 extern void Xintripi_invlrange(void);
107 extern void Xintripi_reloadcr3(void);
108
109 extern void Xintrsoftclock(void);
110 extern void Xintrsoftnet(void);
111 extern void Xintrsofttty(void);
112
113 extern void (*apichandler[])(void);
114
115 struct cpu_info;
116
117 extern void lapic_boot_init(paddr_t);
118 extern void lapic_startclock(void);
119 extern void lapic_initclocks(void);
120 extern void lapic_set_lvt(void);
121 extern void lapic_set_softvectors(void);
122 extern void lapic_enable(void);
123 extern void lapic_disable(void);
124 extern void lapic_calibrate_timer(struct cpu_info *);
125
126 #define lapic_cpu_number() (i82489_readreg(LAPIC_ID)>>LAPIC_ID_SHIFT)
127
128 #endif
129