1 /* tc-xtensa.h -- Header file for tc-xtensa.c.
2    Copyright (C) 2003, 2004, 2005 Free Software Foundation, Inc.
3 
4    This file is part of GAS, the GNU Assembler.
5 
6    GAS is free software; you can redistribute it and/or modify
7    it under the terms of the GNU General Public License as published by
8    the Free Software Foundation; either version 2, or (at your option)
9    any later version.
10 
11    GAS is distributed in the hope that it will be useful,
12    but WITHOUT ANY WARRANTY; without even the implied warranty of
13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14    GNU General Public License for more details.
15 
16    You should have received a copy of the GNU General Public License
17    along with GAS; see the file COPYING.  If not, write to the Free
18    Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
19    02110-1301, USA.  */
20 
21 #ifndef TC_XTENSA
22 #define TC_XTENSA 1
23 
24 struct fix;
25 
26 #ifndef OBJ_ELF
27 #error Xtensa support requires ELF object format
28 #endif
29 
30 #include "xtensa-isa.h"
31 #include "xtensa-config.h"
32 
33 #define TARGET_BYTES_BIG_ENDIAN XCHAL_HAVE_BE
34 
35 
36 /* Maximum number of opcode slots in a VLIW instruction.  */
37 #define MAX_SLOTS 15
38 
39 
40 /* For all xtensa relax states except RELAX_DESIRE_ALIGN and
41    RELAX_DESIRE_ALIGN_IF_TARGET, the amount a frag might grow is stored
42    in the fr_var field.  For the two exceptions, fr_var is a float value
43    that records the frequency with which the following instruction is
44    executed as a branch target.  The aligner uses this information to
45    tell which targets are most important to be aligned.  */
46 
47 enum xtensa_relax_statesE
48 {
49   RELAX_ALIGN_NEXT_OPCODE,
50   /* Use the first opcode of the next fragment to determine the
51      alignment requirements.  This is ONLY used for LOOPs currently.  */
52 
53   RELAX_CHECK_ALIGN_NEXT_OPCODE,
54   /* The next non-empty frag contains a loop instruction.  Check to see
55      if it is correctly aligned, but do not align it.  */
56 
57   RELAX_DESIRE_ALIGN_IF_TARGET,
58   /* These are placed in front of labels and converted to either
59      RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
60      relaxation begins.  */
61 
62   RELAX_ADD_NOP_IF_A0_B_RETW,
63   /* These are placed in front of conditional branches.  Before
64      relaxation begins, they are turned into either NOPs for branches
65      immediately followed by RETW or RETW.N or rs_fills of 0.  This is
66      used to avoid a hardware bug in some early versions of the
67      processor.  */
68 
69   RELAX_ADD_NOP_IF_PRE_LOOP_END,
70   /* These are placed after JX instructions.  Before relaxation begins,
71      they are turned into either NOPs, if the JX is one instruction
72      before a loop end label, or rs_fills of 0.  This is used to avoid a
73      hardware interlock issue prior to Xtensa version T1040.  */
74 
75   RELAX_ADD_NOP_IF_SHORT_LOOP,
76   /* These are placed after LOOP instructions and turned into NOPs when:
77      (1) there are less than 3 instructions in the loop; we place 2 of
78      these in a row to add up to 2 NOPS in short loops; or (2) the
79      instructions in the loop do not include a branch or jump.
80      Otherwise they are turned into rs_fills of 0 before relaxation
81      begins.  This is used to avoid hardware bug PR3830.  */
82 
83   RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
84   /* These are placed after LOOP instructions and turned into NOPs if
85      there are less than 12 bytes to the end of some other loop's end.
86      Otherwise they are turned into rs_fills of 0 before relaxation
87      begins.  This is used to avoid hardware bug PR3830.  */
88 
89   RELAX_DESIRE_ALIGN,
90   /* The next fragment would like its first instruction to NOT cross an
91      instruction fetch boundary.  */
92 
93   RELAX_MAYBE_DESIRE_ALIGN,
94   /* The next fragment might like its first instruction to NOT cross an
95      instruction fetch boundary.  These are placed after a branch that
96      might be relaxed.  If the branch is relaxed, then this frag will be
97      a branch target and this frag will be changed to RELAX_DESIRE_ALIGN
98      frag.  */
99 
100   RELAX_LOOP_END,
101   /* This will be turned into a NOP or NOP.N if the previous instruction
102      is expanded to negate a loop.  */
103 
104   RELAX_LOOP_END_ADD_NOP,
105   /* When the code density option is available, this will generate a
106      NOP.N marked RELAX_NARROW.  Otherwise, it will create an rs_fill
107      fragment with a NOP in it.  */
108 
109   RELAX_LITERAL,
110   /* Another fragment could generate an expansion here but has not yet.  */
111 
112   RELAX_LITERAL_NR,
113   /* Expansion has been generated by an instruction that generates a
114      literal.  However, the stretch has NOT been reported yet in this
115      fragment.  */
116 
117   RELAX_LITERAL_FINAL,
118   /* Expansion has been generated by an instruction that generates a
119      literal.  */
120 
121   RELAX_LITERAL_POOL_BEGIN,
122   RELAX_LITERAL_POOL_END,
123   /* Technically these are not relaxations at all but mark a location
124      to store literals later.  Note that fr_var stores the frchain for
125      BEGIN frags and fr_var stores now_seg for END frags.  */
126 
127   RELAX_NARROW,
128   /* The last instruction in this fragment (at->fr_opcode) can be
129      freely replaced with a single wider instruction if a future
130      alignment desires or needs it.  */
131 
132   RELAX_IMMED,
133   /* The last instruction in this fragment (at->fr_opcode) contains
134      the value defined by fr_symbol (fr_offset = 0).  If the value
135      does not fit, use the specified expansion.  This is similar to
136      "NARROW", except that these may not be expanded in order to align
137      code.  */
138 
139   RELAX_IMMED_STEP1,
140   /* The last instruction in this fragment (at->fr_opcode) contains a
141      literal.  It has already been expanded at least 1 step.  */
142 
143   RELAX_IMMED_STEP2,
144   /* The last instruction in this fragment (at->fr_opcode) contains a
145      literal.  It has already been expanded at least 2 steps.  */
146 
147   RELAX_SLOTS,
148   /* There are instructions within the last VLIW instruction that need
149      relaxation.  Find the relaxation based on the slot info in
150      xtensa_frag_type.  Relaxations that deal with particular opcodes
151      are slot-based (e.g., converting a MOVI to an L32R).  Relaxations
152      that deal with entire instructions, such as alignment, are not
153      slot-based.  */
154 
155   RELAX_FILL_NOP,
156   /* This marks the location of a pipeline stall.  We can fill these guys
157      in for alignment of any size.  */
158 
159   RELAX_UNREACHABLE,
160   /* This marks the location as unreachable.  The assembler may widen or
161      narrow this area to meet alignment requirements of nearby
162      instructions.  */
163 
164   RELAX_MAYBE_UNREACHABLE,
165   /* This marks the location as possibly unreachable.  These are placed
166      after a branch that may be relaxed into a branch and jump. If the
167      branch is relaxed, then this frag will be converted to a
168      RELAX_UNREACHABLE frag.  */
169 
170   RELAX_NONE
171 };
172 
173 /* This is used as a stopper to bound the number of steps that
174    can be taken.  */
175 #define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP2 - RELAX_IMMED)
176 
177 struct xtensa_frag_type
178 {
179   /* Info about the current state of assembly, e.g., transform,
180      absolute_literals, etc.  These need to be passed to the backend and
181      then to the object file.
182 
183      When is_assembly_state_set is false, the frag inherits some of the
184      state settings from the previous frag in this segment.  Because it
185      is not possible to intercept all fragment closures (frag_more and
186      frag_append_1_char can close a frag), we use a pass after initial
187      assembly to fill in the assembly states.  */
188 
189   unsigned int is_assembly_state_set : 1;
190   unsigned int is_no_density : 1;
191   unsigned int is_no_transform : 1;
192   unsigned int use_longcalls : 1;
193   unsigned int use_absolute_literals : 1;
194 
195   /* Inhibits relaxation of machine-dependent alignment frags the
196      first time through a relaxation....  */
197   unsigned int relax_seen : 1;
198 
199   /* Information that is needed in the object file and set when known.  */
200   unsigned int is_literal : 1;
201   unsigned int is_loop_target : 1;
202   unsigned int is_branch_target : 1;
203   unsigned int is_insn : 1;
204   unsigned int is_unreachable : 1;
205 
206   unsigned int is_specific_opcode : 1; /* also implies no_transform */
207 
208   unsigned int is_align : 1;
209   unsigned int is_text_align : 1;
210   unsigned int alignment : 5;
211 
212   /* A frag with this bit set is the first in a loop that actually
213      contains an instruction.  */
214   unsigned int is_first_loop_insn : 1;
215 
216   /* A frag with this bit set is a branch that we are using to
217      align branch targets as if it were a normal narrow instruction.  */
218   unsigned int is_aligning_branch : 1;
219 
220   /* For text fragments that can generate literals at relax time, this
221      variable points to the frag where the literal will be stored.  For
222      literal frags, this variable points to the nearest literal pool
223      location frag.  This literal frag will be moved to after this
224      location.  */
225   fragS *literal_frag;
226 
227   /* The destination segment for literal frags.  (Note that this is only
228      valid after xtensa_move_literals.)  This field is also used for
229      LITERAL_POOL_END frags.  */
230   segT lit_seg;
231 
232   /* Frag chain for LITERAL_POOL_BEGIN frags.  */
233   struct frchain *lit_frchain;
234 
235   /* For the relaxation scheme, some literal fragments can have their
236      expansions modified by an instruction that relaxes.  */
237   int text_expansion[MAX_SLOTS];
238   int literal_expansion[MAX_SLOTS];
239   int unreported_expansion;
240 
241   /* For text fragments that can generate literals at relax time:  */
242   fragS *literal_frags[MAX_SLOTS];
243   enum xtensa_relax_statesE slot_subtypes[MAX_SLOTS];
244   symbolS *slot_symbols[MAX_SLOTS];
245   offsetT slot_offsets[MAX_SLOTS];
246 
247   /* The global aligner needs to walk backward through the list of
248      frags.  This field is only valid after xtensa_end.  */
249   fragS *fr_prev;
250 };
251 
252 
253 /* For VLIW support, we need to know what slot a fixup applies to.  */
254 typedef struct xtensa_fix_data_struct
255 {
256   int slot;
257   symbolS *X_add_symbol;
258   offsetT X_add_number;
259 } xtensa_fix_data;
260 
261 
262 /* Structure to record xtensa-specific symbol information.  */
263 typedef struct xtensa_symfield_type
264 {
265   unsigned int is_loop_target : 1;
266   unsigned int is_branch_target : 1;
267 } xtensa_symfield_type;
268 
269 
270 /* Structure for saving information about a block of property data
271    for frags that have the same flags.   The forward reference is
272    in this header file.  The actual definition is in tc-xtensa.c.  */
273 struct xtensa_block_info_struct;
274 typedef struct xtensa_block_info_struct xtensa_block_info;
275 
276 
277 /* Property section types.  */
278 typedef enum
279 {
280   xt_literal_sec,
281   xt_prop_sec,
282   max_xt_sec
283 } xt_section_type;
284 
285 typedef struct xtensa_segment_info_struct
286 {
287   fragS *literal_pool_loc;
288   xtensa_block_info *blocks[max_xt_sec];
289 } xtensa_segment_info;
290 
291 
292 extern const char *xtensa_target_format (void);
293 extern void xtensa_init_fix_data (struct fix *);
294 extern void xtensa_frag_init (fragS *);
295 extern int xtensa_force_relocation (struct fix *);
296 extern int xtensa_validate_fix_sub (struct fix *);
297 extern void xtensa_frob_label (struct symbol *);
298 extern void xtensa_end (void);
299 extern void xtensa_post_relax_hook (void);
300 extern void xtensa_file_arch_init (bfd *);
301 extern void xtensa_flush_pending_output (void);
302 extern bfd_boolean xtensa_fix_adjustable (struct fix *);
303 extern void xtensa_symbol_new_hook (symbolS *);
304 extern long xtensa_relax_frag (fragS *, long, int *);
305 extern void xtensa_elf_section_change_hook (void);
306 extern int xtensa_unrecognized_line (int);
307 extern bfd_boolean xtensa_check_inside_bundle (void);
308 extern void xtensa_handle_align (fragS *);
309 extern char *xtensa_section_rename (char *);
310 
311 #define TARGET_FORMAT			xtensa_target_format ()
312 #define TARGET_ARCH			bfd_arch_xtensa
313 #define TC_SEGMENT_INFO_TYPE		xtensa_segment_info
314 #define TC_SYMFIELD_TYPE                struct xtensa_symfield_type
315 #define TC_FIX_TYPE			xtensa_fix_data
316 #define TC_INIT_FIX_DATA(x)		xtensa_init_fix_data (x)
317 #define TC_FRAG_TYPE			struct xtensa_frag_type
318 #define TC_FRAG_INIT(frag)		xtensa_frag_init (frag)
319 #define TC_FORCE_RELOCATION(fix)	xtensa_force_relocation (fix)
320 #define TC_FORCE_RELOCATION_SUB_SAME(fix, seg) \
321   (! SEG_NORMAL (seg) || xtensa_force_relocation (fix))
322 #define	TC_VALIDATE_FIX_SUB(fix)	xtensa_validate_fix_sub (fix)
323 #define NO_PSEUDO_DOT			xtensa_check_inside_bundle ()
324 #define tc_canonicalize_symbol_name(s)	xtensa_section_rename (s)
325 #define tc_canonicalize_section_name(s)	xtensa_section_rename (s)
326 #define tc_init_after_args()		xtensa_file_arch_init (stdoutput)
327 #define tc_fix_adjustable(fix)		xtensa_fix_adjustable (fix)
328 #define tc_frob_label(sym)		xtensa_frob_label (sym)
329 #define tc_unrecognized_line(ch)	xtensa_unrecognized_line (ch)
330 #define md_do_align(a,b,c,d,e)		xtensa_flush_pending_output ()
331 #define md_elf_section_change_hook	xtensa_elf_section_change_hook
332 #define md_end				xtensa_end
333 #define md_flush_pending_output()	xtensa_flush_pending_output ()
334 #define md_operand(x)
335 #define TEXT_SECTION_NAME		xtensa_section_rename (".text")
336 #define DATA_SECTION_NAME		xtensa_section_rename (".data")
337 #define BSS_SECTION_NAME		xtensa_section_rename (".bss")
338 #define HANDLE_ALIGN(fragP)		xtensa_handle_align (fragP)
339 #define MAX_MEM_FOR_RS_ALIGN_CODE	1
340 
341 
342 /* The renumber_section function must be mapped over all the sections
343    after calling xtensa_post_relax_hook.  That function is static in
344    write.c so it cannot be called from xtensa_post_relax_hook itself.  */
345 
346 #define md_post_relax_hook \
347   do \
348     { \
349       int i = 0; \
350       xtensa_post_relax_hook (); \
351       bfd_map_over_sections (stdoutput, renumber_sections, &i); \
352     } \
353   while (0)
354 
355 
356 /* Because xtensa relaxation can insert a new literal into the middle of
357    fragment and thus require re-running the relaxation pass on the
358    section, we need an explicit flag here.  We explicitly use the name
359    "stretched" here to avoid changing the source code in write.c.  */
360 
361 #define md_relax_frag(segment, fragP, stretch) \
362   xtensa_relax_frag (fragP, stretch, &stretched)
363 
364 
365 #define LOCAL_LABELS_FB 1
366 #define WORKING_DOT_WORD 1
367 #define DOUBLESLASH_LINE_COMMENTS
368 #define TC_HANDLES_FX_DONE
369 #define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
370 #define TC_LINKRELAX_FIXUP(SEG) 0
371 #define MD_APPLY_SYM_VALUE(FIX) 0
372 #define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0
373 
374 
375 /* Resource reservation info functions.  */
376 
377 /* Returns the number of copies of a particular unit.  */
378 typedef int (*unit_num_copies_func) (void *, xtensa_funcUnit);
379 
380 /* Returns the number of units the opcode uses.  */
381 typedef int (*opcode_num_units_func) (void *, xtensa_opcode);
382 
383 /* Given an opcode and an index into the opcode's funcUnit list,
384    returns the unit used for the index.  */
385 typedef int (*opcode_funcUnit_use_unit_func) (void *, xtensa_opcode, int);
386 
387 /* Given an opcode and an index into the opcode's funcUnit list,
388    returns the cycle during which the unit is used.  */
389 typedef int (*opcode_funcUnit_use_stage_func) (void *, xtensa_opcode, int);
390 
391 /* The above typedefs parameterize the resource_table so that the
392    optional scheduler doesn't need its own resource reservation system.
393 
394    For simple resource checking, which is all that happens normally,
395    the functions will be as follows (with some wrapping to make the
396    interface more convenient):
397 
398    unit_num_copies_func = xtensa_funcUnit_num_copies
399    opcode_num_units_func = xtensa_opcode_num_funcUnit_uses
400    opcode_funcUnit_use_unit_func = xtensa_opcode_funcUnit_use->unit
401    opcode_funcUnit_use_stage_func = xtensa_opcode_funcUnit_use->stage
402 
403    Of course the optional scheduler has its own reservation table
404    and functions.  */
405 
406 int opcode_funcUnit_use_unit (void *, xtensa_opcode, int);
407 int opcode_funcUnit_use_stage (void *, xtensa_opcode, int);
408 
409 typedef struct
410 {
411   void *data;
412   int cycles;
413   int allocated_cycles;
414   int num_units;
415   unit_num_copies_func unit_num_copies;
416   opcode_num_units_func opcode_num_units;
417   opcode_funcUnit_use_unit_func opcode_unit_use;
418   opcode_funcUnit_use_stage_func opcode_unit_stage;
419   unsigned char **units;
420 } resource_table;
421 
422 resource_table *new_resource_table
423   (void *, int, int, unit_num_copies_func, opcode_num_units_func,
424    opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func);
425 void resize_resource_table (resource_table *, int);
426 void clear_resource_table (resource_table *);
427 bfd_boolean resources_available (resource_table *, xtensa_opcode, int);
428 void reserve_resources (resource_table *, xtensa_opcode, int);
429 void release_resources (resource_table *, xtensa_opcode, int);
430 
431 #endif /* TC_XTENSA */
432