/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/ |
H A D | smemc.h | 28 #define MCIO0 (SMEMC_VIRT + 0x38) /* Card interface I/O Space Socket 0 Timing Configuration */ macro
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/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/ |
H A D | smemc.h | 28 #define MCIO0 (SMEMC_VIRT + 0x38) /* Card interface I/O Space Socket 0 Timing Configuration */ macro
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/dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/ |
H A D | smemc.h | 28 #define MCIO0 (SMEMC_VIRT + 0x38) /* Card interface I/O Space Socket 0 Timing Configuration */ macro
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/dports/devel/openwince-include/include-0.4.2/arm/pxa2x0/ |
H A D | mc.h | 112 #define MCIO0 MC_pointer->mcio0 macro
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/dports/devel/urjtag/urjtag-2021.03/src/bus/ |
H A D | pxa2x0_mc.h | 113 #define MCIO0 MC_pointer->mcio0 macro
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/dports/emulators/qemu/qemu-6.2.0/hw/arm/ |
H A D | pxa2xx.c | 405 #define MCIO0 0x38 /* PC Card I/O Socket 0 Timing register */ macro
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/dports/emulators/qemu42/qemu-4.2.1/hw/arm/ |
H A D | pxa2xx.c | 394 #define MCIO0 0x38 /* PC Card I/O Socket 0 Timing register */ macro
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/dports/emulators/qemu60/qemu-6.0.0/hw/arm/ |
H A D | pxa2xx.c | 405 #define MCIO0 0x38 /* PC Card I/O Socket 0 Timing register */ macro
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/dports/emulators/qemu-utils/qemu-4.2.1/hw/arm/ |
H A D | pxa2xx.c | 394 #define MCIO0 0x38 /* PC Card I/O Socket 0 Timing register */ macro
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/arm/ |
H A D | pxa2xx.c | 390 #define MCIO0 0x38 /* PC Card I/O Socket 0 Timing register */ macro
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/dports/emulators/qemu5/qemu-5.2.0/hw/arm/ |
H A D | pxa2xx.c | 404 #define MCIO0 0x38 /* PC Card I/O Socket 0 Timing register */ macro
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/arm/ |
H A D | pxa2xx.c | 405 #define MCIO0 0x38 /* PC Card I/O Socket 0 Timing register */ macro
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/arm/ |
H A D | pxa2xx.c | 394 #define MCIO0 0x38 /* PC Card I/O Socket 0 Timing register */ macro
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/arm/ |
H A D | pxa2xx.c | 394 #define MCIO0 0x38 /* PC Card I/O Socket 0 Timing register */ macro
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/dports/devel/codeblocks/codeblocks-20.03/src/plugins/scriptedwizard/resources/arm/files/phyCORE-PXA255/h/ |
H A D | pxa255regs.h | 1048 #define MCIO0 __REG(MEMC_BASE+0x38) /* Card interface I/O Space Socket 0 Timing Configuration */ macro
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-pxa/ |
H A D | pxa-regs.h | 2274 #define MCIO0 0x4A000038 /* Card interface I/O Space Socket 0 Timing Configuration */ macro 2463 #define MCIO0 0x48000038 /* Card interface I/O Space Socket 0 Timing Configuration */ macro
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/include/asm/arch-pxa/ |
H A D | pxa-regs.h | 2219 #define MCIO0 __REG_2(0x4A000038) /* Card interface I/O Space Socket 0 Timing Configuration */ macro 2405 #define MCIO0 __REG(0x48000038) /* Card interface I/O Space Socket 0 Timing Configuration */ macro
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/dports/emulators/qemu/qemu-6.2.0/roms/u-boot/arch/arm/include/asm/arch-pxa/ |
H A D | pxa-regs.h | 2274 #define MCIO0 0x4A000038 /* Card interface I/O Space Socket 0 Timing Configuration */ macro 2463 #define MCIO0 0x48000038 /* Card interface I/O Space Socket 0 Timing Configuration */ macro
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/include/asm/arch-pxa/ |
H A D | pxa-regs.h | 2274 #define MCIO0 0x4A000038 /* Card interface I/O Space Socket 0 Timing Configuration */ macro 2463 #define MCIO0 0x48000038 /* Card interface I/O Space Socket 0 Timing Configuration */ macro
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/arm/include/asm/arch-pxa/ |
H A D | pxa-regs.h | 2219 #define MCIO0 __REG_2(0x4A000038) /* Card interface I/O Space Socket 0 Timing Configuration */ macro 2405 #define MCIO0 __REG(0x48000038) /* Card interface I/O Space Socket 0 Timing Configuration */ macro
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/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
H A D | pxa-regs.h | 2274 #define MCIO0 0x4A000038 /* Card interface I/O Space Socket 0 Timing Configuration */ macro 2463 #define MCIO0 0x48000038 /* Card interface I/O Space Socket 0 Timing Configuration */ macro
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/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
H A D | pxa-regs.h | 2274 #define MCIO0 0x4A000038 /* Card interface I/O Space Socket 0 Timing Configuration */ macro 2463 #define MCIO0 0x48000038 /* Card interface I/O Space Socket 0 Timing Configuration */ macro
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/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
H A D | pxa-regs.h | 2274 #define MCIO0 0x4A000038 /* Card interface I/O Space Socket 0 Timing Configuration */ macro 2463 #define MCIO0 0x48000038 /* Card interface I/O Space Socket 0 Timing Configuration */ macro
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/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
H A D | pxa-regs.h | 2274 #define MCIO0 0x4A000038 /* Card interface I/O Space Socket 0 Timing Configuration */ macro 2463 #define MCIO0 0x48000038 /* Card interface I/O Space Socket 0 Timing Configuration */ macro
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/arm/include/asm/arch-pxa/ |
H A D | pxa-regs.h | 2219 #define MCIO0 __REG_2(0x4A000038) /* Card interface I/O Space Socket 0 Timing Configuration */ macro 2405 #define MCIO0 __REG(0x48000038) /* Card interface I/O Space Socket 0 Timing Configuration */ macro
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