xref: /openbsd/sys/arch/alpha/pci/mcpciavar.h (revision 2f4de8e4)
1 /* $OpenBSD: mcpciavar.h,v 1.1 2007/03/16 21:22:27 robert Exp $ */
2 /* $NetBSD: mcpciavar.h,v 1.4 1999/04/16 02:18:07 thorpej Exp $ */
3 
4 /*
5  * Copyright (c) 1998 by Matthew Jacob
6  * NASA AMES Research Center.
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice immediately at the beginning of the file, without modification,
14  *    this list of conditions, and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. The name of the author may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
25  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31  * SUCH DAMAGE.
32  */
33 
34 #include <dev/pci/pcivar.h>
35 #include <sys/extent.h>
36 
37 #include <alpha/pci/pci_sgmap_pte64.h>
38 
39 #define	_FSTORE	(EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long))
40 
41 /*
42  * MPCIA configuration.
43  */
44 struct mcpcia_config {
45 	int				cc_gid;	/* GID of this MCbus */
46 	int				cc_mid;	/* MCbus Module ID */
47 	int				cc_initted;
48 	int				cc_mallocsafe;
49 	struct alpha_bus_space		cc_iot;
50 	struct alpha_bus_space		cc_memt;
51 	struct extent *			cc_io_ex;
52 	struct extent *			cc_d_mem_ex;
53 	struct extent *			cc_s_mem_ex;
54 	struct alpha_pci_chipset	cc_pc;
55 	struct mcpcia_softc *		cc_sc;	/* back pointer */
56 	long				cc_io_exstorage[_FSTORE];
57 	long				cc_dmem_exstorage[_FSTORE];
58 	long				cc_smem_exstorage[_FSTORE];
59 	unsigned long			cc_sysbase;	/* shorthand */
60 	struct alpha_bus_dma_tag	cc_dmat_direct;
61 	struct alpha_bus_dma_tag	cc_dmat_pci_sgmap;
62 	struct alpha_bus_dma_tag	cc_dmat_isa_sgmap;
63 	struct alpha_sgmap		cc_pci_sgmap;
64 	struct alpha_sgmap		cc_isa_sgmap;
65 	char				pc_io_ex_name[16];
66 	char				pc_mem_dex_name[16];
67 	char				pc_mem_sex_name[16];
68 	long				pc_io_ex_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
69 	long				pc_mem_dex_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
70 	long				pc_mem_sex_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
71 };
72 
73 struct mcpcia_softc {
74 	struct device		mcpcia_dev;
75 	struct mcpcia_config	*mcpcia_cc;	/* config info */
76 };
77 
78 void	mcpcia_init (void);
79 void	mcpcia_init0 (struct mcpcia_config *, int);
80 void	mcpcia_pci_init (pci_chipset_tag_t, void *);
81 void	mcpcia_dma_init (struct mcpcia_config *);
82 
83 void	mcpcia_bus_io_init (bus_space_tag_t, void *);
84 void	mcpcia_bus_mem_init (bus_space_tag_t, void *);
85 
86 /*
87  * IO Interrupt handler.
88  */
89 void 	mcpcia_iointr (void *, unsigned long);
90 
91 /*
92  * There are four PCI slots per MCPCIA PCI bus here, but some are 'hidden'-
93  * none seems to be higher than 6 though.
94  */
95 #define	MCPCIA_MAXDEV	6
96 #define	MCPCIA_MAXSLOT	8
97 
98 /*
99  * Interrupt Stuff for MCPCIA systems.
100  *
101  * EISA interrupts (at vector 0x800) have to be shared interrupts-
102  * and that can be easily managed. All the PCI interrupts are deterministic
103  * in that they start at vector 0x900, 0x40 per PCI slot, 0x200 per
104  * MCPCIA, 4 MCPCIAs per GCBUS....
105  */
106 #define MCPCIA_EISA_KEYB_IRQ	1
107 #define MCPCIA_EISA_MOUSE_IRQ	12
108 #define MCPCIA_VEC_EISA		0x800
109 #define MCPCIA_VEC_PCI		0x900
110 
111 /*
112  * Special Vectors
113  */
114 #define	MCPCIA_I2C_CVEC		0xA90
115 #define	MCPCIA_I2C_BVEC		0xAA0
116