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Searched defs:MC_FUS_ARB_GARLIC_WR_PRI2__SMU_WR_PRI__SHIFT (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_0_sh_mask.h6084 #define MC_FUS_ARB_GARLIC_WR_PRI2__SMU_WR_PRI__SHIFT 0x0 macro
H A Dgmc_8_2_sh_mask.h7530 #define MC_FUS_ARB_GARLIC_WR_PRI2__SMU_WR_PRI__SHIFT 0x0 macro