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Searched defs:MC_RPB_WR_COMBINE_CNTL__WC_FLUSH_TIMER__SHIFT (Results 1 – 5 of 5) sorted by path

/dragonfly/sys/dev/drm/amd/include/asic_reg/gmc/
H A Dgmc_6_0_sh_mask.h7747 #define MC_RPB_WR_COMBINE_CNTL__WC_FLUSH_TIMER__SHIFT 0x00000003 macro
H A Dgmc_7_0_sh_mask.h2796 #define MC_RPB_WR_COMBINE_CNTL__WC_FLUSH_TIMER__SHIFT 0x3 macro
H A Dgmc_7_1_sh_mask.h3378 #define MC_RPB_WR_COMBINE_CNTL__WC_FLUSH_TIMER__SHIFT 0x3 macro
H A Dgmc_8_1_sh_mask.h3764 #define MC_RPB_WR_COMBINE_CNTL__WC_FLUSH_TIMER__SHIFT 0x3 macro
H A Dgmc_8_2_sh_mask.h3606 #define MC_RPB_WR_COMBINE_CNTL__WC_FLUSH_TIMER__SHIFT 0x3 macro