Home
last modified time | relevance | path

Searched defs:MC_SEQ_PERF_CNTL_1__SEL_CH0_D_MSB__SHIFT (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gmc/
H A Dgmc_6_0_sh_mask.h8239 #define MC_SEQ_PERF_CNTL_1__SEL_CH0_D_MSB__SHIFT 0x0000000b macro
H A Dgmc_7_1_sh_mask.h8582 #define MC_SEQ_PERF_CNTL_1__SEL_CH0_D_MSB__SHIFT 0xb macro
H A Dgmc_8_1_sh_mask.h9496 #define MC_SEQ_PERF_CNTL_1__SEL_CH0_D_MSB__SHIFT 0xb macro