1 /*
2 * Copyright (c) 2009-2021, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file mos_os.h
24 //! \brief Common interface and structure used in MOS OS
25 //!
26
27 #ifndef __MOS_OS_H__
28 #define __MOS_OS_H__
29
30 #include "mos_defs.h"
31 #include "media_skuwa_specific.h"
32 #include "mos_utilities.h"
33 #include "mos_utilities_next.h"
34 #include "mos_util_debug_next.h"
35 #include "mos_os_hw.h" //!< HW specific details that flow through OS pathes
36 #ifndef MEDIA_SOFTLET
37 #include "mos_os_cp_interface_specific.h" //!< CP specific OS functionality
38 #else
39 class MosCpInterface;
40 #endif
41 #if (_RELEASE_INTERNAL || _DEBUG)
42 #if defined(CM_DIRECT_GUC_SUPPORT)
43 #include "work_queue_mngr.h"
44 #include "KmGucClientInterface.h"
45 #endif
46 #endif
47
48 #include "media_user_setting.h"
49 #include "null_hardware.h"
50 extern PerfUtility *g_perfutility;
51
52 #define PERF_DECODE "DECODE"
53 #define PERF_ENCODE "ENCODE"
54 #define PERF_VP "VP"
55 #define PERF_CP "CP"
56 #define PERF_MOS "MOS"
57
58 #define PERF_LEVEL_DDI "DDI"
59 #define PERF_LEVEL_HAL "HAL"
60
61 #define DECODE_DDI (1)
62 #define DECODE_HAL (1 << 1)
63 #define ENCODE_DDI (1 << 4)
64 #define ENCODE_HAL (1 << 5)
65 #define VP_DDI (1 << 8)
66 #define VP_HAL (1 << 9)
67 #define CP_DDI (1 << 12)
68 #define CP_HAL (1 << 13)
69 #define MOS_DDI (1 << 16)
70 #define MOS_HAL (1 << 17)
71
72 #define PERFUTILITY_IS_ENABLED(sCOMP,sLEVEL) \
73 (((sCOMP == "DECODE" && sLEVEL == "DDI") && (g_perfutility->dwPerfUtilityIsEnabled & DECODE_DDI)) || \
74 ((sCOMP == "DECODE" && sLEVEL == "HAL") && (g_perfutility->dwPerfUtilityIsEnabled & DECODE_HAL)) || \
75 ((sCOMP == "ENCODE" && sLEVEL == "DDI") && (g_perfutility->dwPerfUtilityIsEnabled & ENCODE_DDI)) || \
76 ((sCOMP == "ENCODE" && sLEVEL == "HAL") && (g_perfutility->dwPerfUtilityIsEnabled & ENCODE_HAL)) || \
77 ((sCOMP == "VP" && sLEVEL == "DDI") && (g_perfutility->dwPerfUtilityIsEnabled & VP_DDI)) || \
78 ((sCOMP == "VP" && sLEVEL == "HAL") && (g_perfutility->dwPerfUtilityIsEnabled & VP_HAL)) || \
79 ((sCOMP == "CP" && sLEVEL == "DDI") && (g_perfutility->dwPerfUtilityIsEnabled & CP_DDI)) || \
80 ((sCOMP == "CP" && sLEVEL == "HAL") && (g_perfutility->dwPerfUtilityIsEnabled & CP_HAL)) || \
81 ((sCOMP == "MOS" && sLEVEL == "DDI") && (g_perfutility->dwPerfUtilityIsEnabled & MOS_DDI)) || \
82 ((sCOMP == "MOS" && sLEVEL == "HAL") && (g_perfutility->dwPerfUtilityIsEnabled & MOS_HAL)))
83
84 #define PERF_UTILITY_START(TAG,COMP,LEVEL) \
85 do \
86 { \
87 if (PERFUTILITY_IS_ENABLED((std::string)COMP,(std::string)LEVEL)) \
88 { \
89 g_perfutility->startTick(TAG); \
90 } \
91 } while(0)
92
93 #define PERF_UTILITY_STOP(TAG, COMP, LEVEL) \
94 do \
95 { \
96 if (PERFUTILITY_IS_ENABLED((std::string)COMP,(std::string)LEVEL)) \
97 { \
98 g_perfutility->stopTick(TAG); \
99 } \
100 } while (0)
101
102 static int perf_count_start = 0;
103 static int perf_count_stop = 0;
104
105 #define PERF_UTILITY_START_ONCE(TAG, COMP,LEVEL) \
106 do \
107 { \
108 if (perf_count_start == 0 \
109 && PERFUTILITY_IS_ENABLED((std::string)COMP,(std::string)LEVEL)) \
110 { \
111 g_perfutility->startTick(TAG); \
112 } \
113 perf_count_start++; \
114 } while(0)
115
116 #define PERF_UTILITY_STOP_ONCE(TAG, COMP, LEVEL) \
117 do \
118 { \
119 if (perf_count_stop == 0 \
120 && PERFUTILITY_IS_ENABLED((std::string)COMP,(std::string)LEVEL)) \
121 { \
122 g_perfutility->stopTick(TAG); \
123 } \
124 perf_count_stop++; \
125 } while (0)
126
127 #define PERF_UTILITY_AUTO(TAG,COMP,LEVEL) AutoPerfUtility apu(TAG,COMP,LEVEL)
128
129 #define PERF_UTILITY_PRINT \
130 do \
131 { \
132 if (g_perfutility->dwPerfUtilityIsEnabled && MosUtilities::MosIsProfilerDumpEnabled()) \
133 { \
134 g_perfutility->savePerfData(); \
135 } \
136 } while(0)
137
138 class AutoPerfUtility
139 {
140 public:
141 AutoPerfUtility(std::string tag, std::string comp, std::string level);
142 ~AutoPerfUtility();
143
144 private:
145 bool bEnable = false;
146 std::string autotag ="intialized";
147 };
148
149 //!
150 //! \brief OS specific includes and definitions
151 //!
152 #include "mos_os_specific.h"
153 #include "mos_os_virtualengine_specific.h"
154
155 #include "mos_oca_interface.h"
156
157 #define MOS_NAL_UNIT_LENGTH 4
158 #define MOS_NAL_UNIT_STARTCODE_LENGTH 3
159 #define MOS_MAX_PATH_LENGTH 256
160
161 #define MOS_MAX_SEMAPHORE_COUNT 3
162 #define MOS_MAX_OBJECT_SIGNALED 32
163
164 #define MOS_INVALID_APPID 0xFFFFFFFF
165
166 #define MOS_GPU_CONTEXT_CREATE_DEFAULT 1
167 #define MOS_GPU_CONTEXT_CREATE_CM_DEFAULT 15
168
169 #define MOS_VCS_ENGINE_USED(GpuContext) ( \
170 ((GpuContext) == MOS_GPU_CONTEXT_VIDEO) || \
171 ((GpuContext) == MOS_GPU_CONTEXT_VIDEO2) || \
172 ((GpuContext) == MOS_GPU_CONTEXT_VIDEO3) || \
173 ((GpuContext) == MOS_GPU_CONTEXT_VIDEO4) || \
174 ((GpuContext) == MOS_GPU_CONTEXT_VDBOX2_VIDEO) || \
175 ((GpuContext) == MOS_GPU_CONTEXT_VDBOX2_VIDEO2) || \
176 ((GpuContext) == MOS_GPU_CONTEXT_VDBOX2_VIDEO3) || \
177 ((GpuContext) == MOS_GPU_CONTEXT_VIDEO5) || \
178 ((GpuContext) == MOS_GPU_CONTEXT_VIDEO6) || \
179 ((GpuContext) == MOS_GPU_CONTEXT_VIDEO7) \
180 )
181
182 #define MOS_RCS_ENGINE_USED(GpuContext) ( \
183 ((GpuContext) == MOS_GPU_CONTEXT_RENDER) || \
184 ((GpuContext) == MOS_GPU_CONTEXT_RENDER2) || \
185 ((GpuContext) == MOS_GPU_CONTEXT_RENDER3) || \
186 ((GpuContext) == MOS_GPU_CONTEXT_RENDER4) || \
187 ((GpuContext) == MOS_GPU_CONTEXT_COMPUTE) || \
188 ((GpuContext) == MOS_GPU_CONTEXT_CM_COMPUTE) || \
189 ((GpuContext) == MOS_GPU_CONTEXT_COMPUTE_RA) || \
190 ((GpuContext) == MOS_GPU_CONTEXT_RENDER_RA) \
191 )
192
193 #define MOS_BCS_ENGINE_USED(GpuContext) ( \
194 ((GpuContext) == MOS_GPU_CONTEXT_BLT))
195
196 #if MOS_MEDIASOLO_SUPPORTED
197 #define MOS_VECS_ENGINE_USED(GpuContext) ( \
198 ((GpuContext) == MOS_GPU_CONTEXT_VEBOX) || \
199 ((GpuContext) == MOS_GPU_CONTEXT_VEBOX2))
200 #else
201 #define MOS_VECS_ENGINE_USED(GpuContext) ( \
202 ((GpuContext) == MOS_GPU_CONTEXT_VEBOX))
203 #endif
204
205 #define MOS_GCS_ENGINE_USED(GpuContext) ( \
206 ((GpuContext) == MOS_GPU_CONTEXT_TEE))
207
208 #if MOS_COMMAND_BUFFER_DUMP_SUPPORTED
209 #define MOS_COMMAND_BUFFER_OUT_FILE "Command_buffer_output"
210 #define MOS_COMMAND_BUFFER_OUT_DIR "Command_buffer_dumps"
211 #define MOS_COMMAND_BUFFER_RENDER_ENGINE "CS"
212 #define MOS_COMMAND_BUFFER_VIDEO_ENGINE "VCS"
213 #define MOS_COMMAND_BUFFER_VEBOX_ENGINE "VECS"
214 #define MOS_COMMAND_BUFFER_TEE_ENGINE "TEE"
215 #define MOS_COMMAND_BUFFER_PLATFORM_LEN 4
216 #endif // MOS_COMMAND_BUFFER_DUMP_SUPPORTED
217
218 #ifndef E_NOTIMPL
219 #define E_NOTIMPL 0x80004001L
220 #endif // E_NOTIMPL
221
222 #ifndef E_UNEXPECTED
223 #define E_UNEXPECTED 0x8000FFFFL
224 #endif // E_UNEXPECTED
225
226 //!
227 //! \brief Enum for OS component
228 //!
229 enum MOS_COMPONENT
230 {
231 COMPONENT_UNKNOWN = 0,
232 COMPONENT_LibVA,
233 COMPONENT_EMULATION,
234 COMPONENT_CM,
235 COMPONENT_Encode,
236 COMPONENT_Decode,
237 COMPONENT_VPCommon,
238 COMPONENT_VPreP,
239 COMPONENT_CP,
240 COMPONENT_MEMDECOMP,
241 COMPONENT_MCPY,
242 };
243 C_ASSERT(COMPONENT_MCPY == 10); // When adding, update assert
244
245 //!
246 //! \brief Structure to OS sync parameters
247 //!
248 typedef struct _MOS_SYNC_PARAMS
249 {
250 MOS_GPU_CONTEXT GpuContext; //!< GPU context you would like to signal on or wait in
251 PMOS_RESOURCE presSyncResource; //!< Has 2 meanings:
252 //!< 1) a resource that requires sync, like a destination surface
253 //!< 2) a resource used by HW/OS to sync between engines, like for MI_SEMAPHORE_MBOX
254 uint32_t uiSemaphoreCount;
255 uint32_t uiSemaphoreValue; //!< Tag value in the case of resource tagging
256 uint32_t uiSemaphoreOffset; //!< Offset into the sync resource for value read/write
257 int32_t bReadOnly; //!< Marks the resource as read or write for future waits
258 int32_t bDisableDecodeSyncLock; //!< Disable the lock function for decode.
259 int32_t bDisableLockForTranscode; //!< Disable the lock function for transcode perf.
260 } MOS_SYNC_PARAMS, *PMOS_SYNC_PARAMS;
261
262 typedef enum _MOS_SCALABILITY_ENABLE_MODE
263 {
264 MOS_SCALABILITY_ENABLE_MODE_FALSE = 0,
265 MOS_SCALABILITY_ENABLE_MODE_DEFAULT = 0x0001,
266 MOS_SCALABILITY_ENABLE_MODE_USER_FORCE = 0x0010
267 } MOS_SCALABILITY_ENABLE_MODE;
268
269 #if (_DEBUG || _RELEASE_INTERNAL)
270 //!
271 //! \brief for forcing VDBOX
272 //!
273
274 #define MOS_FORCE_VDBOX_NONE 0
275 #define MOS_FORCE_VDBOX_1 0x0001
276 #define MOS_FORCE_VDBOX_2 0x0002
277 //below is for scalability case,
278 //format is FE vdbox is specified as lowest 4 bits; BE0 is 2nd low 4 bits; BE1 is 3rd low 4bits.
279 #define MOS_FORCE_VDBOX_1_1_2 0x0211
280 //FE-VDBOX2, BE0-VDBOX1, BE2-VDBOX2
281 #define MOS_FORCE_VDBOX_2_1_2 0x0212
282
283 //!
284 //! \brief Enum for forcing VEBOX
285 //!
286 typedef enum _MOS_FORCE_VEBOX
287 {
288 MOS_FORCE_VEBOX_NONE = 0,
289 MOS_FORCE_VEBOX_1 = 0x0001,
290 MOS_FORCE_VEBOX_2 = 0x0002,
291 MOS_FORCE_VEBOX_3 = 0x0003,
292 MOS_FORCE_VEBOX_4 = 0x0004,
293 // For scalability case
294 MOS_FORCE_VEBOX_1_2 = 0x0012,
295 MOS_FORCE_VEBOX_1_2_3 = 0x0123,
296 MOS_FORCE_VEBOX_1_2_3_4 = 0x1234
297 } MOS_FORCE_VEBOX;
298
299 #define MOS_FORCEVEBOX_VEBOXID_BITSNUM 4 //each VEBOX ID occupies 4 bits see defintion MOS_FORCE_VEBOX
300 #define MOS_FORCEVEBOX_MASK 0xf
301
302
303 #define MOS_FORCEVDBOX_VDBOXID_BITSNUM 4 //each VDBOX ID occupies 4 bits see defintion MOS_FORCE_VDBOX
304 #define MOS_FORCEVDBOX_MASK 0xF
305
306 #define MOS_FORCEENGINE_MASK 0xf
307 #define MOS_FORCEENGINE_ENGINEID_BITSNUM 4 //each VDBOX ID occupies 4 bits see defintion MOS_FORCE_VDBOX
308 #define MOS_INVALID_FORCEENGINE_VALUE 0xffffffff
309 #endif
310
311 typedef struct _MOS_VIRTUALENGINE_INTERFACE *PMOS_VIRTUALENGINE_INTERFACE;
312 typedef struct _MOS_CMD_BUF_ATTRI_VE MOS_CMD_BUF_ATTRI_VE, *PMOS_CMD_BUF_ATTRI_VE;
313
314
315 typedef struct _MOS_COMMAND_BUFFER_ATTRIBUTES
316 {
317 int32_t bTurboMode;
318 int32_t bIsMdfLoad;
319 int32_t bMediaPreemptionEnabled;
320 uint32_t dwNumRequestedEUSlices;
321 uint32_t dwNumRequestedSubSlices;
322 uint32_t dwNumRequestedEUs;
323 int32_t bValidPowerGatingRequest;
324 int32_t bEnableMediaFrameTracking;
325 uint32_t dwMediaFrameTrackingTag;
326 uint32_t dwMediaFrameTrackingAddrOffset;
327 PMOS_RESOURCE resMediaFrameTrackingSurface;
328 int32_t bUmdSSEUEnable;
329 int32_t bFrequencyBoost;
330 void* pAttriVe;
331 } MOS_COMMAND_BUFFER_ATTRIBUTES, *PMOS_COMMAND_BUFFER_ATTRIBUTES;
332
333 //!
334 //! \brief VDBOX indices
335 //!
336 typedef enum _MOS_VDBOX_NODE_IND
337 {
338 MOS_VDBOX_NODE_INVALID = -1,
339 MOS_VDBOX_NODE_1 = 0x0,
340 MOS_VDBOX_NODE_2 = 0x1
341 } MOS_VDBOX_NODE_IND;
342
343 //!
344 //! \brief VEBOX indices
345 //!
346 typedef enum _MOS_VEBOX_NODE_IND
347 {
348 MOS_VEBOX_NODE_INVALID = -1,
349 MOS_VEBOX_NODE_1 = 0x0,
350 MOS_VEBOX_NODE_2 = 0x1,
351 MOS_VEBOX_NODE_3 = 0x2,
352 MOS_VEBOX_NODE_4 = 0x3
353 } MOS_VEBOX_NODE_IND;
354
355 #define SUBMISSION_TYPE_SINGLE_PIPE (1 << 0)
356 #define SUBMISSION_TYPE_SINGLE_PIPE_MASK (0xff)
357 #define SUBMISSION_TYPE_MULTI_PIPE_SHIFT 8
358 #define SUBMISSION_TYPE_MULTI_PIPE_ALONE (1 << SUBMISSION_TYPE_MULTI_PIPE_SHIFT)
359 #define SUBMISSION_TYPE_MULTI_PIPE_MASTER (1 << (SUBMISSION_TYPE_MULTI_PIPE_SHIFT+1))
360 #define SUBMISSION_TYPE_MULTI_PIPE_SLAVE (1 << (SUBMISSION_TYPE_MULTI_PIPE_SHIFT+2))
361 #define SUBMISSION_TYPE_MULTI_PIPE_MASK (0xff << SUBMISSION_TYPE_MULTI_PIPE_SHIFT)
362 #define SUBMISSION_TYPE_MULTI_PIPE_SLAVE_INDEX_SHIFT 16
363 #define SUBMISSION_TYPE_MULTI_PIPE_SLAVE_INDEX_MASK (0xff << SUBMISSION_TYPE_MULTI_PIPE_SLAVE_INDEX_SHIFT)
364 #define SUBMISSION_TYPE_MULTI_PIPE_FLAGS_SHIFT 24
365 #define SUBMISSION_TYPE_MULTI_PIPE_FLAGS_MASK (0xff << SUBMISSION_TYPE_MULTI_PIPE_FLAGS_SHIFT)
366 #define SUBMISSION_TYPE_MULTI_PIPE_FLAGS_LAST_PIPE (1 << SUBMISSION_TYPE_MULTI_PIPE_FLAGS_SHIFT)
367 typedef int32_t MOS_SUBMISSION_TYPE;
368
369 #define EXTRA_PADDING_NEEDED 4096
370
371 //!
372 //! \brief Structure to command buffer
373 //!
374 typedef struct _MOS_COMMAND_BUFFER
375 {
376 MOS_RESOURCE OsResource; //!< OS Resource
377
378 // Common fields
379 uint32_t *pCmdBase; //!< Base address (CPU)
380 uint32_t *pCmdPtr; //!< Current address (CPU)
381 int32_t iOffset; //!< Current offset in bytes
382 int32_t iRemaining; //!< Remaining size
383 int32_t iTokenOffsetInCmdBuf; //!< Pointer to (Un)Secure token's next field Offset
384 int32_t iCmdIndex; //!< command buffer's index
385 MOS_VDBOX_NODE_IND iVdboxNodeIndex; //!< Which VDBOX buffer is binded to
386 MOS_VEBOX_NODE_IND iVeboxNodeIndex; //!< Which VEBOX buffer is binded to
387 int32_t iSubmissionType;
388 bool is1stLvlBB; //!< indicate it's a first level BB or not
389 struct _MOS_COMMAND_BUFFER *cmdBuf1stLvl; //!< Pointer to 1st level command buffer.
390 MOS_COMMAND_BUFFER_ATTRIBUTES Attributes; //!< Attributes for the command buffer to be provided to KMD at submission
391 } MOS_COMMAND_BUFFER;
392
393 //!
394 //! \brief Structure to Lock params
395 //!
396 typedef struct _MOS_LOCK_PARAMS
397 {
398 union
399 {
400 struct
401 {
402 uint32_t ReadOnly : 1; //!< Lock only for reading.
403 uint32_t WriteOnly : 1; //!< Lock only for writing.
404 uint32_t TiledAsTiled : 1; //!< Means that you want to lock a tiled surface as tiled, not linear.
405 uint32_t NoOverWrite : 1; //!< No Over write for async locks
406 uint32_t NoDecompress : 1; //!< No decompression for memory compressed surface
407 uint32_t Uncached : 1; //!< Use uncached lock
408 uint32_t ForceCached : 1; //!< Prefer normal map to global GTT map(Uncached) if both can work
409 uint32_t DumpBeforeSubmit : 1; //!< Lock only for dump before submit
410 uint32_t DumpAfterSubmit : 1; //!< Lock only for dump after submit
411 uint32_t Reserved : 23; //!< Reserved for expansion.
412 };
413 uint32_t Value;
414 };
415 } MOS_LOCK_PARAMS, *PMOS_LOCK_PARAMS;
416
417 //!
418 //! \brief flags for GFX allocation destroy
419 //!
420 typedef struct _MOS_GFXRES_FREE_FLAGS
421 {
422 union
423 {
424 struct
425 {
426 uint32_t AssumeNotInUse : 1;
427 uint32_t SynchronousDestroy : 1;
428 uint32_t Reserved : 30;
429 };
430 uint32_t Value;
431 };
432 } MOS_GFXRES_FREE_FLAGS;
433
434 //!
435 //! \brief Structure to Resource Flags
436 //!
437 typedef struct _MOS_GFXRES_FLAGS
438 {
439 int32_t bNotLockable; //!< [in] true: Resource will not be CPU accessible. false: Resource can be CPU accessed.
440 int32_t bOverlay;
441 int32_t bFlipChain;
442 int32_t bSVM;
443 int32_t bCacheable;
444 } MOS_GFXRES_FLAGS, *PMOS_GFXRES_FLAGS;
445
446 //!
447 //! \brief Structure to Resource allocation parameters
448 //!
449 typedef struct _MOS_ALLOC_GFXRES_PARAMS
450 {
451 MOS_GFXRES_TYPE Type; //!< [in] Basic resource geometry
452 MOS_GFXRES_FLAGS Flags; //!< [in] Flags to describe attributes
453 union
454 {
455 uint32_t dwWidth; //!< [in] Type == 2D || VOLUME, width in pixels.
456 uint32_t dwBytes; //!< [in] Type == BUFFER, # of bytes
457 };
458 uint32_t dwHeight; //!< [in] Type == 2D || VOLUME, height in rows. Type == BUFFER, n/a
459 uint32_t dwDepth; //!< [in] 0: Implies 2D resource. >=1: volume resource
460 uint32_t dwArraySize; //!< [in] 0,1: 1 element. >1: N elements
461 MOS_TILE_TYPE TileType; //!< [in] Defines the layout of a physical page. Optimal choice depends on usage model.
462 MOS_TILE_MODE_GMM m_tileModeByForce; //!< [in] Indicates a tile Encoding (aligned w/ GMM defination) needs set by force
463 MOS_FORMAT Format; //!< [in] Pixel format
464 void *pSystemMemory; //!< [in] Optional parameter. If non null, TileType must be set to linear.
465 const char *pBufName; //!< [in] Optional parameter. A string indicates the buffer name and is used for debugging. nullptr is OK.
466 int32_t bIsCompressible; //!< [in] Resource is compressible or not.
467 MOS_RESOURCE_MMC_MODE CompressionMode; //!< [in] Compression mode.
468 int32_t bIsPersistent; //!< [in] Optional parameter. Used to indicate that resource can not be evicted
469 int32_t bBypassMODImpl;
470 int32_t dwMemType; //!< [in] Optional paramerter. Prefer memory type
471 MOS_HW_RESOURCE_DEF ResUsageType; //!< [in] the resource usage type to determine the cache policy
472 bool hardwareProtected; //!< [in] Flag as hint that Resource can be used as hw protected
473 } MOS_ALLOC_GFXRES_PARAMS, *PMOS_ALLOC_GFXRES_PARAMS;
474
475 //!
476 //! \brief Enum for MOS patch type
477 //!
478 typedef enum _MOS_PATCH_TYPE
479 {
480 MOS_PATCH_TYPE_BASE_ADDRESS = 0,
481 MOS_PATCH_TYPE_PITCH,
482 MOS_PATCH_TYPE_UV_Y_OFFSET,
483 MOS_PATCH_TYPE_BIND_ONLY,
484 MOS_PATCH_TYPE_UV_BASE_ADDRESS,
485 MOS_PATCH_TYPE_V_BASE_ADDRESS,
486 MOS_PATCH_TYPE_V_Y_OFFSET
487 } MOS_PATCH_TYPE;
488
489 //!
490 //! \brief Structure to OS sync parameters
491 //!
492 typedef struct _MOS_PATCH_ENTRY_PARAMS
493 {
494 PMOS_RESOURCE presResource; //!< resource to be patched
495 uint32_t uiAllocationIndex;
496 uint32_t uiResourceOffset; //!< resource offset
497 uint32_t uiPatchOffset; //!< patch offset
498 uint32_t bWrite; //!< is write operation
499 int32_t bUpperBoundPatch; //!< is upper bound patch
500 MOS_HW_COMMAND HwCommandType; //!< hw cmd type
501 uint32_t forceDwordOffset; //!< force dword offset
502 uint8_t *cmdBufBase; //!< cmd buffer base address
503 uint32_t offsetInSSH; //!< patch offset in SSH
504 uint32_t shiftAmount; //!< shift amount for patch
505 uint32_t shiftDirection; //!< shift direction for patch
506 MOS_PATCH_TYPE patchType; //!< patch type
507 MOS_COMMAND_BUFFER *cmdBuffer; //!< command buffer
508 } MOS_PATCH_ENTRY_PARAMS, *PMOS_PATCH_ENTRY_PARAMS;
509
510 typedef struct _MOS_GPUCTX_CREATOPTIONS MOS_GPUCTX_CREATOPTIONS, *PMOS_GPUCTX_CREATOPTIONS;
511 struct _MOS_GPUCTX_CREATOPTIONS
512 {
513 uint32_t CmdBufferNumScale;
514 uint32_t RAMode;
515 uint32_t ProtectMode;
516 uint32_t gpuNode;
517 //For slice shutdown
518 union
519 {
520 struct
521 {
522 uint8_t SliceCount;
523 uint8_t SubSliceCount; //Subslice count per slice
524 uint8_t MaxEUcountPerSubSlice;
525 uint8_t MinEUcountPerSubSlice;
526 } packed;
527
528 uint32_t SSEUValue;
529 };
530
_MOS_GPUCTX_CREATOPTIONS_MOS_GPUCTX_CREATOPTIONS531 _MOS_GPUCTX_CREATOPTIONS() : CmdBufferNumScale(MOS_GPU_CONTEXT_CREATE_DEFAULT),
532 RAMode(0),
533 ProtectMode(0),
534 gpuNode(0),
535 SSEUValue(0){}
536
~_MOS_GPUCTX_CREATOPTIONS_MOS_GPUCTX_CREATOPTIONS537 virtual ~_MOS_GPUCTX_CREATOPTIONS(){}
538 };
539
540 class OsContext;
541
542 #if MOS_COMMAND_RESINFO_DUMP_SUPPORTED
543 //!
544 //! \brief Class to Dump GPU Command Info
545 //!
546 class GpuCmdResInfoDump
547 {
548 public:
549
550 static const GpuCmdResInfoDump *GetInstance(PMOS_CONTEXT mosCtx);
551 GpuCmdResInfoDump(PMOS_CONTEXT mosCtx);
552
553 void Dump(PMOS_INTERFACE pOsInterface) const;
554
555 void StoreCmdResPtr(PMOS_INTERFACE pOsInterface, const void *pRes) const;
556
557 void ClearCmdResPtrs(PMOS_INTERFACE pOsInterface) const;
558
559 private:
560
561 struct GpuCmdResInfo;
562
563 void Dump(const void *pRes, std::ofstream &outputFile) const;
564
565 const std::vector<const void *> &GetCmdResPtrs(PMOS_INTERFACE pOsInterface) const;
566
567 const char *GetResType(MOS_GFXRES_TYPE resType) const;
568
569 const char *GetTileType(MOS_TILE_TYPE tileType) const;
570
571 private:
572
573 static std::shared_ptr<GpuCmdResInfoDump> m_instance;
574 mutable uint32_t m_cnt = 0;
575 bool m_dumpEnabled = false;
576 std::string m_path;
577 };
578 #endif // MOS_COMMAND_RESINFO_DUMP_SUPPORTED
579
580 class OsContextNext;
581 typedef void * OS_PER_STREAM_PARAMETERS;
582 typedef void * EXTRA_PARAMS;
583 typedef OsContextNext OsDeviceContext;
584 typedef _MOS_GPUCTX_CREATOPTIONS GpuContextCreateOption;
585 struct _MOS_INTERFACE;
586 class MosVeInterface;
587 class CommandList;
588 class CmdBufMgrNext;
589
590 struct MosStreamState
591 {
592 OsDeviceContext *osDeviceContext = nullptr;
593 GPU_CONTEXT_HANDLE currentGpuContextHandle = MOS_GPU_CONTEXT_INVALID_HANDLE;
594 MOS_COMPONENT component;
595
596 CommandList *currentCmdList = nullptr; //<! Command list used in async mode
597 CmdBufMgrNext *currentCmdBufMgr = nullptr; //<! Cmd buffer manager used in async mode
598 bool postponedExecution = false; //!< Indicate if the stream is work in postponed execution mode. This flag is only used in aync mode.
599
600 bool supportVirtualEngine = false; //!< Flag to indicate using virtual engine interface
601 MosVeInterface *virtualEngineInterface = nullptr; //!< Interface to virtual engine state
602 bool useHwSemaForResSyncInVe = false; //!< Flag to indicate if UMD need to send HW sema cmd under this OS when there is a resource sync need with Virtual Engine interface
603 bool veEnable = false; //!< Flag to indicate virtual engine enabled (Can enable VE without using virtual engine interface)
604 bool phasedSubmission = false; //!< Flag to indicate if secondary command buffers are submitted together or separately due to different OS
605 bool frameSplit = true; //!< Flag to indicate if frame split is enabled (only active when phasedSubmission is true)
606 int32_t hcpDecScalabilityMode = 0; //!< Hcp scalability mode
607 int32_t veboxScalabilityMode = 0; //!< Vebox scalability mode
608
609 bool ctxBasedScheduling = false; //!< Indicate if context based scheduling is enabled in this stream
610 bool multiNodeScaling = false; //!< Flag to indicate if multi-node scaling is enabled for virtual engine (only active when ctxBasedScheduling is true)
611
612 int32_t ctxPriority = 0;
613 bool softReset = false; //!< trigger soft reset
614
615 MosCpInterface *osCpInterface = nullptr; //!< CP interface
616
617 bool mediaReset = false; //!< Flag to indicate media reset is enabled
618
619 bool simIsActive = false; //!< Flag to indicate if Simulation is enabled
620 MOS_NULL_RENDERING_FLAGS nullHwAccelerationEnable = {}; //!< To indicate which components to enable Null HW support
621
622 bool usesPatchList = false; //!< Uses patch list instead of graphic address directly
623 bool usesGfxAddress = false; //!< Uses graphic address directly instead of patch list
624 bool enableKmdMediaFrameTracking = false; //!< Enable KMD Media frame tracking
625 bool usesCmdBufHeaderInResize = false; //!< Use cmd buffer header in resize
626 bool usesCmdBufHeader = false; //!< Use cmd buffer header
627
628 // GPU Reset Statistics
629 uint32_t gpuResetCount = 0;
630 uint32_t gpuActiveBatch = 0;
631 uint32_t gpuPendingBatch = 0;
632
633 #if MOS_COMMAND_BUFFER_DUMP_SUPPORTED
634 // Command buffer dump
635 bool dumpCommandBuffer = false; //!< Flag to indicate if Dump command buffer is enabled
636 bool dumpCommandBufferToFile = false; //!< Indicates that the command buffer should be dumped to a file
637 bool dumpCommandBufferAsMessages = false; //!< Indicates that the command buffer should be dumped via MOS normal messages
638 char sDirName[MOS_MAX_HLT_FILENAME_LEN] = {0}; //!< Dump Directory name - maximum 260 bytes length
639 #endif // MOS_COMMAND_BUFFER_DUMP_SUPPORTED
640
641 #if _DEBUG || _RELEASE_INTERNAL
642 bool enableDbgOvrdInVirtualEngine = false; //!< enable debug override in virtual engine
643
644 int32_t eForceVdbox = 0; //!< Force select Vdbox
645 int32_t eForceVebox = 0; //!< Force select Vebox
646 #endif // _DEBUG || _RELEASE_INTERNAL
647
648 bool bGucSubmission = false; //!< Flag to indicate if guc submission is enabled
649 OS_PER_STREAM_PARAMETERS perStreamParameters = nullptr; //!< Parameters of OS specific per stream
650 };
651
652 // OS agnostic MOS objects
653 typedef OsDeviceContext *MOS_DEVICE_HANDLE;
654 typedef MosStreamState *MOS_STREAM_HANDLE;
655 //typedef uint32_t GPU_CONTEXT_HANDLE;
656 typedef MOS_COMMAND_BUFFER *COMMAND_BUFFER_HANDLE;
657 typedef MOS_RESOURCE *MOS_RESOURCE_HANDLE;
658 typedef MosVeInterface *MOS_VE_HANDLE;
659
660 // OS specific MOS objects
661 typedef void * OsSpecificRes; //!< stand for different os specific resource structure (or info)
662 typedef void * OS_HANDLE; //!< stand for different os handles
663 typedef MOS_SURFACE MosResourceInfo;
664 typedef void * DDI_DEVICE_CONTEXT; //!< stand for different os specific device context
665 typedef void * MOS_INTERFACE_HANDLE;
666
667 class GpuContextMgr;
668 //!
669 //! \brief Structure to Unified HAL OS resources
670 //!
671 typedef struct _MOS_INTERFACE
672 {
673 //APO WRAPPER
674 MOS_STREAM_HANDLE osStreamState = MOS_INVALID_HANDLE;
675
676 // Saved OS context
677 PMOS_CONTEXT pOsContext;
678 MOS_GPU_CONTEXT CurrentGpuContextOrdinal;
679 //!< An internal handle that indexes into the list of GPU Context object
680 uint32_t CurrentGpuContextHandle;
681 //!< A handle to the graphics context device that can be used to calls back
682 //!< into the kernel subsystem
683 HANDLE CurrentGpuContextRuntimeHandle;
684
685 //!< Only used in async mode for backward compatiable
686 GPU_CONTEXT_HANDLE m_GpuContextHandleMap[MOS_GPU_CONTEXT_MAX] = {0};
687
688 // OS dependent settings, flags, limits
689 int32_t b64bit;
690 int32_t bDeallocateOnExit;
691 MOS_USER_FEATURE_INTERFACE UserFeatureInterface;
692 MosCpInterface *osCpInterface;
693
694 int32_t bUsesCmdBufHeader;
695 int32_t bUsesCmdBufHeaderInResize;
696 int32_t bEnableKmdMediaFrameTracking;
697 int32_t bNoParsingAssistanceInKmd;
698 bool bPitchAndUVPatchingNeeded = false;
699 uint32_t dwCommandBufferReservedSpace;
700 uint32_t dwNumNalUnitBytesIncluded;
701
702 // GPU Reset Statistics
703 uint32_t dwGPUResetCount;
704 uint32_t dwGPUActiveBatch;
705 uint32_t dwGPUPendingBatch;
706
707 // Resource addressing
708 int32_t bUsesPatchList;
709 int32_t bUsesGfxAddress;
710 int32_t bMapOnCreate; // For limited GPU VA resource can not be mapped during creation
711 int32_t bInlineCodecStatusUpdate; // check whether use inline codec status update or seperate BB
712 int32_t bAllowExtraPatchToSameLoc; // patch another resource to same location in cmdbuffer
713
714 // Component info
715 MOS_COMPONENT Component;
716
717 // Stream info
718 uint32_t streamIndex = 0;
719
720 // Synchronization
721 int32_t bTagEngineSync;
722 int32_t bTagResourceSync;
723 int32_t bOsEngineSync;
724 int32_t bOsResourceSync;
725
726 // Simulation (HAS) related
727 int32_t bSimIsActive; //!< Flag to indicate if HAS is enabled
728
729 MOS_NULL_RENDERING_FLAGS NullHWAccelerationEnable; //!< To indicate which components to enable Null HW support
730
731 // for MODS Wrapper
732 int32_t modulizedMosEnabled;
733 int32_t modularizedGpuCtxEnabled;
734 OsContext* osContextPtr;
735
736 // used for media reset enabling/disabling in UMD
737 // pls remove it after hw scheduling
738 int32_t bMediaReset;
739
740 bool umdMediaResetEnable;
741
742 #if MOS_MEDIASOLO_SUPPORTED
743 // MediaSolo related
744 int32_t bSoloInUse; //!< Flag to indicate if MediaSolo is enabled
745 static void *pvSoloContext; //!< pointer to MediaSolo context
746 static uint32_t soloRefCnt;
747 uint32_t dwEnableMediaSoloFrameNum; //!< The frame number at which MediaSolo will be enabled, 0 is not valid.
748 #endif // MOS_MEDIASOLO_SUPPORTED
749
750 #if MOS_COMMAND_BUFFER_DUMP_SUPPORTED
751 // Command buffer dump
752 int32_t bDumpCommandBuffer; //!< Flag to indicate if Dump command buffer is enabled
753 int32_t bDumpCommandBufferToFile; //!< Indicates that the command buffer should be dumped to a file
754 int32_t bDumpCommandBufferAsMessages; //!< Indicates that the command buffer should be dumped via MOS normal messages
755 char sPlatformName[MOS_COMMAND_BUFFER_PLATFORM_LEN]; //!< Platform name - maximum 4 bytes length
756 char sDirName[MOS_MAX_HLT_FILENAME_LEN]; //!< Dump Directory name - maximum 260 bytes length
757 #endif // MOS_COMMAND_BUFFER_DUMP_SUPPORTED
758
759 #if (_RELEASE_INTERNAL||_DEBUG)
760 #if defined(CM_DIRECT_GUC_SUPPORT)
761 CMRTWorkQueueMngr *m_pWorkQueueMngr;
762 CMRT_WORK_QUEUE_INFO m_WorkQueueInfo[5]; //IGFX_ABSOLUTE_MAX_ENGINES
763 #endif
764 #endif
765
766 bool bEnableVdboxBalancing; //!< Enable per BB VDBox balancing
767
768 #if (_DEBUG || _RELEASE_INTERNAL)
769 int eForceVdbox; //!< Force select Vdbox
770 uint32_t dwForceTileYfYs; // force to allocate Yf (=1) or Ys (=2), remove after full validation
771 int32_t bTriggerCodecHang; // trigger GPU HANG in codec
772 int32_t bTriggerVPHang; //!< trigger GPU HANG in VP
773 #endif // (_DEBUG || _RELEASE_INTERNAL)
774
775 bool apoMosEnabled; //!< apo mos or not
776
777 MEMORY_OBJECT_CONTROL_STATE (* pfnCachePolicyGetMemoryObject) (
778 MOS_HW_RESOURCE_DEF Usage,
779 GMM_CLIENT_CONTEXT *pGmmClientContext);
780
781 uint8_t (* pfnCachePolicyGetL1Config) (
782 MOS_HW_RESOURCE_DEF Usage,
783 GMM_CLIENT_CONTEXT *pGmmClientContext);
784
785 MOS_STATUS (* pfnCreateGpuContext) (
786 PMOS_INTERFACE pOsInterface,
787 MOS_GPU_CONTEXT GpuContext,
788 MOS_GPU_NODE GpuNode,
789 PMOS_GPUCTX_CREATOPTIONS createOption);
790
791 GPU_CONTEXT_HANDLE (*pfnCreateGpuComputeContext) (
792 PMOS_INTERFACE osInterface,
793 MOS_GPU_CONTEXT gpuContext,
794 MOS_GPUCTX_CREATOPTIONS *createOption);
795
796 MOS_STATUS (* pfnDestroyGpuContext) (
797 PMOS_INTERFACE pOsInterface,
798 MOS_GPU_CONTEXT GpuContext);
799
800 MOS_STATUS (* pfnDestroyGpuComputeContext) (
801 PMOS_INTERFACE osInterface,
802 GPU_CONTEXT_HANDLE gpuContextHandle);
803
804 MOS_STATUS (* pfnSetGpuContext) (
805 PMOS_INTERFACE pOsInterface,
806 MOS_GPU_CONTEXT GpuContext);
807
808 MOS_STATUS (*pfnSetGpuContextFromHandle)(PMOS_INTERFACE osInterface,
809 MOS_GPU_CONTEXT contextName,
810 GPU_CONTEXT_HANDLE contextHandle);
811
812 MOS_STATUS (*pfnSetGpuContextHandle) (
813 PMOS_INTERFACE pOsInterface,
814 GPU_CONTEXT_HANDLE gpuContextHandle,
815 MOS_GPU_CONTEXT GpuContext);
816
817 GpuContextMgr* (*pfnGetGpuContextMgr) (
818 PMOS_INTERFACE pOsInterface);
819
820 #if (_RELEASE_INTERNAL || _DEBUG)
821 #if defined(CM_DIRECT_GUC_SUPPORT)
822 MOS_STATUS(*pfnDestroyGuC) (
823 PMOS_INTERFACE pOsInterface);
824 MOS_STATUS(*pfnInitGuC) (
825 PMOS_INTERFACE pOsInterface,
826 MOS_GPU_NODE Engine);
827 MOS_STATUS(*pfnSubmitWorkQueue) (
828 PMOS_INTERFACE pOsInterface,
829 MOS_GPU_NODE Engine,
830 uint64_t BatchBufferAddress);
831 #endif
832 #endif
833
834 MOS_GPU_CONTEXT (* pfnGetGpuContext) (
835 PMOS_INTERFACE pOsInterface);
836
837 void* (*pfnGetGpuContextbyHandle)(
838 PMOS_INTERFACE pOsInterface,
839 const GPU_CONTEXT_HANDLE gpuContextHandle);
840
841 GMM_CLIENT_CONTEXT* (* pfnGetGmmClientContext) (
842 PMOS_INTERFACE pOsInterface);
843
844 MOS_STATUS (* pfnIsGpuContextValid) (
845 PMOS_INTERFACE pOsInterface,
846 MOS_GPU_CONTEXT GpuContext);
847
848 void (* pfnSetEncodeEncContext) (
849 PMOS_INTERFACE pOsInterface,
850 MOS_GPU_CONTEXT GpuContext);
851
852 void (* pfnSetEncodePakContext) (
853 PMOS_INTERFACE pOsInterface,
854 MOS_GPU_CONTEXT GpuContext);
855
856 void (* pfnSyncOnResource) (
857 PMOS_INTERFACE pOsInterface,
858 PMOS_RESOURCE pOsResource,
859 MOS_GPU_CONTEXT requestorGPUCtx,
860 int32_t bWriteOperation);
861
862 void (* pfnSyncOnOverlayResource) (
863 PMOS_INTERFACE pOsInterface,
864 PMOS_RESOURCE pOsResource,
865 MOS_GPU_CONTEXT requestorGPUCtx);
866
867 void (* pfnSetResourceSyncTag) (
868 PMOS_INTERFACE pOsInterface,
869 PMOS_SYNC_PARAMS pParams);
870
871 MOS_STATUS (* pfnPerformOverlaySync) (
872 PMOS_INTERFACE pOsInterface,
873 PMOS_SYNC_PARAMS pParams);
874
875 MOS_STATUS (* pfnResourceSignal) (
876 PMOS_INTERFACE pOsInterface,
877 PMOS_SYNC_PARAMS pParams);
878
879 MOS_STATUS (* pfnResourceWait) (
880 PMOS_INTERFACE pOsInterface,
881 PMOS_SYNC_PARAMS pParams);
882
883 MOS_STATUS (* pfnEngineSignal) (
884 PMOS_INTERFACE pOsInterface,
885 PMOS_SYNC_PARAMS pParams);
886
887 MOS_STATUS (* pfnEngineWait) (
888 PMOS_INTERFACE pOsInterface,
889 PMOS_SYNC_PARAMS pParams);
890
891 MOS_STATUS (* pfnWaitAllCmdCompletion) (
892 PMOS_INTERFACE pOsInterface);
893
894 MOS_STATUS (* pfnCreateSyncResource) (
895 PMOS_INTERFACE pOsInterface,
896 PMOS_RESOURCE pOsResource);
897
898 MOS_STATUS (* pfnDestroySyncResource) (
899 PMOS_INTERFACE pOsInterface,
900 PMOS_RESOURCE pOsResource);
901
902 void (* pfnSyncGpuContext) (
903 PMOS_INTERFACE pOsInterface,
904 MOS_GPU_CONTEXT busyGPUCtx,
905 MOS_GPU_CONTEXT requestorGPUCtx);
906
907 void(* pfnSyncWith3DContext)(
908 PMOS_INTERFACE pOsInterface,
909 PMOS_SYNC_PARAMS pParams);
910
911 MOS_STATUS (* pfnRegisterBBCompleteNotifyEvent) (
912 PMOS_INTERFACE pOsInterface,
913 MOS_GPU_CONTEXT GpuContext);
914
915 MOS_STATUS (* pfnWaitForBBCompleteNotifyEvent) (
916 PMOS_INTERFACE pOsInterface,
917 MOS_GPU_CONTEXT GpuContext,
918 uint32_t uiTimeOut);
919
920 void (* pfnDestroy) (
921 PMOS_INTERFACE pOsInterface,
922 int32_t bDestroyVscVppDeviceTag);
923
924 void (* pfnGetPlatform) (
925 PMOS_INTERFACE pOsInterface,
926 PLATFORM *pPlatform);
927
928 MEDIA_FEATURE_TABLE *(* pfnGetSkuTable) (
929 PMOS_INTERFACE pOsInterface);
930
931 MEDIA_WA_TABLE *(* pfnGetWaTable) (
932 PMOS_INTERFACE pOsInterface);
933
934 MEDIA_SYSTEM_INFO *(* pfnGetGtSystemInfo)(
935 PMOS_INTERFACE pOsInterface);
936
937 MOS_STATUS (*pfnGetMediaEngineInfo)(
938 PMOS_INTERFACE pOsInterface, MEDIA_ENGINE_INFO &info);
939
940 void (* pfnResetOsStates) (
941 PMOS_INTERFACE pOsInterface);
942
943 MOS_STATUS(* pfnInitializeMultiThreadingSyncTags) (
944 PMOS_INTERFACE pOsInterface,
945 PMOS_RESOURCE pOsResource,
946 uint8_t ucRenderTargetIndex,
947 PMOS_SEMAPHORE *pCurFrmSem,
948 PMOS_SEMAPHORE *pRefFrmSem,
949 PMOS_MUTEX *pFrmMutex);
950
951 MOS_STATUS (* pfnMultiThreadingWaitCurrentFrame) (
952 PMOS_RESOURCE pOsResource);
953
954 MOS_STATUS (* pfnMultiThreadingPostCurrentFrame) (
955 PMOS_RESOURCE pOsResource);
956
957 MOS_STATUS (* pfnMultiThreadResourceSync) (
958 PMOS_INTERFACE pOsInterface,
959 PMOS_RESOURCE pOsResource);
960
961 MOS_STATUS(*pfnSetHybridDecoderRunningFlag) (
962 PMOS_INTERFACE pOsInterface,
963 int32_t bFlag);
964
965 MOS_STATUS(*pfnGetHybridDecoderRunningFlag) (
966 PMOS_INTERFACE pOsInterface,
967 int32_t *pFlag);
968
969 uint32_t (* pfnGetInterfaceVersion) (
970 PMOS_INTERFACE pOsInterface);
971
972 #if MOS_MESSAGES_ENABLED
973
974 #define pfnAllocateResource(pOsInterface, pParams, pOsResource) \
975 pfnAllocateResource(pOsInterface, pParams, __FUNCTION__, __FILE__, __LINE__, pOsResource)
976
977 MOS_STATUS (* pfnAllocateResource) (
978 PMOS_INTERFACE pOsInterface,
979 PMOS_ALLOC_GFXRES_PARAMS pParams,
980 const char *functionName,
981 const char *filename,
982 int32_t line,
983 PMOS_RESOURCE pOsResource);
984
985 MOS_STATUS (* pfnDumpCommandBuffer) (
986 PMOS_INTERFACE pOsInterface,
987 PMOS_COMMAND_BUFFER pCmdBuffer);
988
989 #define pfnFreeResource(pOsInterface, pResource) \
990 pfnFreeResource(pOsInterface, __FUNCTION__, __FILE__, __LINE__, pResource)
991
992 void (* pfnFreeResource) (
993 PMOS_INTERFACE pOsInterface,
994 const char *functionName,
995 const char *filename,
996 int32_t line,
997 PMOS_RESOURCE pResource);
998
999 #define pfnFreeResourceWithFlag(pOsInterface, pResource, uiFlag) \
1000 pfnFreeResourceWithFlag(pOsInterface, pResource, __FUNCTION__, __FILE__, __LINE__, uiFlag)
1001
1002 void (* pfnFreeResourceWithFlag) (
1003 PMOS_INTERFACE pOsInterface,
1004 PMOS_RESOURCE pResource,
1005 const char *functionName,
1006 const char *filename,
1007 int32_t line,
1008 uint32_t uiFlag);
1009
1010 #else
1011
1012 MOS_STATUS (* pfnAllocateResource) (
1013 PMOS_INTERFACE pOsInterface,
1014 PMOS_ALLOC_GFXRES_PARAMS pParams,
1015 PMOS_RESOURCE pOsResource);
1016
1017 void (* pfnFreeResource) (
1018 PMOS_INTERFACE pOsInterface,
1019 PMOS_RESOURCE pResource);
1020
1021 void (* pfnFreeResourceWithFlag) (
1022 PMOS_INTERFACE pOsInterface,
1023 PMOS_RESOURCE pResource,
1024 uint32_t uiFlag);
1025
1026 #endif // MOS_MESSAGES_ENABLED
1027
1028 MOS_STATUS (* pfnGetResourceInfo) (
1029 PMOS_INTERFACE pOsInterface,
1030 PMOS_RESOURCE pOsResource,
1031 PMOS_SURFACE pDetails);
1032
1033 MOS_STATUS (* pfnLockSyncRequest) (
1034 PMOS_INTERFACE pOsInterface,
1035 PMOS_RESOURCE pResource,
1036 PMOS_LOCK_PARAMS pFlags);
1037
1038 void *(* pfnLockResource) (
1039 PMOS_INTERFACE pOsInterface,
1040 PMOS_RESOURCE pResource,
1041 PMOS_LOCK_PARAMS pFlags);
1042
1043 MOS_STATUS (* pfnUnlockResource) (
1044 PMOS_INTERFACE pOsInterface,
1045 PMOS_RESOURCE pResource);
1046
1047 MOS_STATUS (* pfnDecompResource) (
1048 PMOS_INTERFACE pOsInterface,
1049 PMOS_RESOURCE pResource);
1050
1051 MOS_STATUS(*pfnDoubleBufferCopyResource) (
1052 PMOS_INTERFACE pOsInterface,
1053 PMOS_RESOURCE pInputOsResource,
1054 PMOS_RESOURCE pOutputOsResource,
1055 bool bOutputCompressed);
1056
1057 MOS_STATUS(*pfnMediaCopyResource2D) (
1058 PMOS_INTERFACE pOsInterface,
1059 PMOS_RESOURCE pInputOsResource,
1060 PMOS_RESOURCE pOutputOsResource,
1061 uint32_t copyWidth,
1062 uint32_t copyHeight,
1063 uint32_t copyInputOffset,
1064 uint32_t copyOutputOffset,
1065 uint32_t bpp,
1066 bool bOutputCompressed);
1067
1068 MOS_STATUS(*pfnGetMosContext) (
1069 PMOS_INTERFACE pOsInterface,
1070 PMOS_CONTEXT* mosContext);
1071
1072 MOS_STATUS (* pfnFillResource) (
1073 PMOS_INTERFACE pOsInterface,
1074 PMOS_RESOURCE pResource,
1075 uint32_t dwSize,
1076 uint8_t iValue);
1077
1078 MOS_STATUS (*pfnUpdateResourceUsageType) (
1079 PMOS_RESOURCE pOsResource,
1080 MOS_HW_RESOURCE_DEF resUsageType);
1081
1082 MOS_STATUS (* pfnRegisterResource) (
1083 PMOS_INTERFACE pOsInterface,
1084 PMOS_RESOURCE pResource,
1085 int32_t bWrite,
1086 int32_t bWritebSetResourceSyncTag);
1087
1088 void (* pfnResetResourceAllocationIndex) (
1089 PMOS_INTERFACE pOsInterface,
1090 PMOS_RESOURCE pResource);
1091
1092 int32_t (* pfnGetResourceAllocationIndex) (
1093 PMOS_INTERFACE pOsInterface,
1094 PMOS_RESOURCE pResource);
1095
1096 uint64_t (* pfnGetResourceGfxAddress) (
1097 PMOS_INTERFACE pOsInterface,
1098 PMOS_RESOURCE pResource);
1099
1100 MOS_STATUS (* pfnSetPatchEntry) (
1101 PMOS_INTERFACE pOsInterface,
1102 PMOS_PATCH_ENTRY_PARAMS pParams);
1103
1104 #if MOS_MEDIASOLO_SUPPORTED
1105 MOS_STATUS (* pfnInitializeMediaSolo) (
1106 PMOS_INTERFACE pOsInterface);
1107 #endif // MOS_MEDIASOLO_SUPPORTED
1108
1109 MOS_STATUS (* pfnWaitOnResource) (
1110 PMOS_INTERFACE pOsInterface,
1111 PMOS_RESOURCE pResource);
1112
1113 uint32_t (* pfnGetGpuStatusTag) (
1114 PMOS_INTERFACE pOsInterface,
1115 MOS_GPU_CONTEXT GpuContext);
1116
1117 void (* pfnIncrementGpuStatusTag) (
1118 PMOS_INTERFACE pOsInterface,
1119 MOS_GPU_CONTEXT GpuContext);
1120
1121 uint32_t (* pfnGetGpuStatusTagOffset) (
1122 PMOS_INTERFACE pOsInterface,
1123 MOS_GPU_CONTEXT GpuContext);
1124
1125 uint32_t (* pfnGetGpuStatusSyncTag) (
1126 PMOS_INTERFACE pOsInterface,
1127 MOS_GPU_CONTEXT GpuContext);
1128
1129 MOS_STATUS (* pfnVerifyCommandBufferSize) (
1130 PMOS_INTERFACE pOsInterface,
1131 uint32_t dwRequestedSize,
1132 uint32_t dwFlags);
1133
1134 MOS_STATUS (* pfnResizeCommandBufferAndPatchList) (
1135 PMOS_INTERFACE pOsInterface,
1136 uint32_t dwRequestedCommandBufferSize,
1137 uint32_t dwRequestedPatchListSize,
1138 uint32_t dwFlags);
1139
1140 MOS_STATUS (* pfnGetCommandBuffer) (
1141 PMOS_INTERFACE pOsInterface,
1142 PMOS_COMMAND_BUFFER pCmdBuffer,
1143 uint32_t dwFlags);
1144
1145 MOS_STATUS (* pfnSetIndirectStateSize) (
1146 PMOS_INTERFACE pOsInterface,
1147 uint32_t uSize);
1148
1149 MOS_STATUS (* pfnGetIndirectState) (
1150 PMOS_INTERFACE pOsInterface,
1151 uint32_t *puOffset,
1152 uint32_t *puSize);
1153
1154 MOS_STATUS (* pfnGetIndirectStatePointer) (
1155 PMOS_INTERFACE pOsInterface,
1156 uint8_t **pIndirectState);
1157
1158 void (* pfnReturnCommandBuffer) (
1159 PMOS_INTERFACE pOsInterface,
1160 PMOS_COMMAND_BUFFER pCmdBuffer,
1161 uint32_t dwFlags);
1162
1163 MOS_STATUS (* pfnSubmitCommandBuffer) (
1164 PMOS_INTERFACE pOsInterface,
1165 PMOS_COMMAND_BUFFER pCmdBuffer,
1166 int32_t bNullRendering);
1167
1168 MOS_STATUS (* pfnWaitAndReleaseCmdBuffer) (
1169 PMOS_INTERFACE pOsInterface,
1170 PMOS_COMMAND_BUFFER pCmdBuffer);
1171
1172 MOS_FORMAT (* pfnFmt_OsToMos) (
1173 MOS_OS_FORMAT format);
1174
1175 MOS_OS_FORMAT (* pfnFmt_MosToOs) (
1176 MOS_FORMAT format);
1177
1178 GMM_RESOURCE_FORMAT (* pfnFmt_MosToGmm) (
1179 MOS_FORMAT format);
1180
1181 void (* pfnSetPerfTag) (
1182 PMOS_INTERFACE pOsInterface,
1183 uint32_t PerfTag);
1184
1185 uint32_t(* pfnGetPerfTag) (
1186 PMOS_INTERFACE pOsInterface);
1187
1188 void (* pfnResetPerfBufferID) (
1189 PMOS_INTERFACE pOsInterface);
1190
1191 void (* pfnIncPerfFrameID) (
1192 PMOS_INTERFACE pOsInterface);
1193
1194 void (* pfnIncPerfBufferID) (
1195 PMOS_INTERFACE pOsInterface);
1196
1197 void (* pfnSetPerfHybridKernelID) (
1198 PMOS_INTERFACE pOsInterface,
1199 uint32_t KernelID);
1200
1201 int32_t (* pfnIsPerfTagSet) (
1202 PMOS_INTERFACE pOsInterface);
1203
1204 MOS_STATUS (* pfnGetBitsPerPixel) (
1205 PMOS_INTERFACE pOsInterface,
1206 MOS_FORMAT Format,
1207 uint32_t *piBpp);
1208
1209 MOS_STATUS (*pfnLoadLibrary) (
1210 PMOS_INTERFACE pOsInterface,
1211 const char *pFileName,
1212 PHMODULE phModule);
1213
1214 MOS_STATUS (*pfnFreeLibrary) (
1215 HINSTANCE hInstance);
1216
1217 void (*pfnLogData)(
1218 char *pData);
1219
1220 MOS_NULL_RENDERING_FLAGS (* pfnGetNullHWRenderFlags) (
1221 PMOS_INTERFACE pOsInterface);
1222
1223 MOS_STATUS (* pfnSetCmdBufferDebugInfo) (
1224 PMOS_INTERFACE pOsInterface,
1225 int32_t bSamplerState,
1226 int32_t bSurfaceState,
1227 uint32_t dwStateIndex,
1228 uint32_t dwType);
1229
1230 uint32_t (* pfnGetCmdBufferDebugInfo) (
1231 PMOS_INTERFACE pOsInterface,
1232 int32_t bSamplerState,
1233 int32_t bSurfaceState,
1234 uint32_t dwStateIndex);
1235
1236 MOS_STATUS (*pfnGetGpuStatusBufferResource) (
1237 PMOS_INTERFACE pOsInterface,
1238 PMOS_RESOURCE &pOsResource);
1239
1240 MOS_STATUS (* pfnVerifyPatchListSize) (
1241 PMOS_INTERFACE pOsInterface,
1242 uint32_t dwRequestedSize);
1243
1244 MOS_STATUS (* pfnResetCommandBuffer) (
1245 PMOS_INTERFACE pOsInterface,
1246 PMOS_COMMAND_BUFFER pCmdBuffer);
1247
1248 MOS_STATUS (* pfnGetMemoryCompressionMode) (
1249 PMOS_INTERFACE pOsInterface,
1250 PMOS_RESOURCE pOsResource,
1251 PMOS_MEMCOMP_STATE pResMmcMode);
1252
1253 MOS_STATUS (* pfnSetMemoryCompressionMode) (
1254 PMOS_INTERFACE pOsInterface,
1255 PMOS_RESOURCE pOsResource,
1256 MOS_MEMCOMP_STATE ResMmcMode);
1257
1258 MOS_STATUS (* pfnSetMemoryCompressionHint) (
1259 PMOS_INTERFACE pOsInterface,
1260 PMOS_RESOURCE pOsResource,
1261 int32_t bHintOn);
1262
1263 MOS_STATUS (* pfnGetMemoryCompressionFormat) (
1264 PMOS_INTERFACE pOsInterface,
1265 PMOS_RESOURCE pOsResource,
1266 uint32_t *pResMmcFormat);
1267
1268 MOS_STATUS (* pfnCreateVideoNodeAssociation)(
1269 PMOS_INTERFACE pOsInterface,
1270 int32_t bSetVideoNode,
1271 MOS_GPU_NODE *pVideoNodeOrdinal);
1272
1273 MOS_VDBOX_NODE_IND (* pfnGetVdboxNodeId)(
1274 PMOS_INTERFACE pOsInterface,
1275 PMOS_COMMAND_BUFFER pCmdBuffer);
1276
1277 MOS_STATUS (* pfnDestroyVideoNodeAssociation)(
1278 PMOS_INTERFACE pOsInterface,
1279 MOS_GPU_NODE VideoNodeOrdinal);
1280
1281 int32_t (*pfnSetCpuCacheability)(
1282 PMOS_INTERFACE pOsInterface,
1283 PMOS_ALLOC_GFXRES_PARAMS pParams);
1284
1285 MOS_STATUS(*pfnSkipResourceSync)(
1286 PMOS_RESOURCE pOsResource);
1287
1288 MOS_STATUS(*pfnSetObjectCapture)(
1289 PMOS_RESOURCE pOsResource);
1290
1291 MOS_STATUS(*pfnSkipResourceSyncDynamic)(
1292 PMOS_RESOURCE pOsResource);
1293
1294 MOS_STATUS(*pfnEnableResourceSyncDynamic)(
1295 PMOS_RESOURCE pOsResource);
1296
1297 bool(*pfnIsValidStreamID)(
1298 PMOS_RESOURCE pOsResource);
1299
1300 void(*pfnInvalidateStreamID)(
1301 PMOS_RESOURCE pOsResource);
1302
1303 MOS_STATUS(*pfnSetStreamID)(
1304 PMOS_RESOURCE pOsResource,
1305 PMOS_INTERFACE pOsInterface,
1306 uint8_t streamID);
1307
1308 uint8_t(*pfnGetStreamID)(
1309 PMOS_RESOURCE pOsResource);
1310
1311 int32_t (*pfnIsGPUHung)(
1312 PMOS_INTERFACE pOsInterface);
1313
1314 MOS_STATUS (*pfnDumpTraceGpuData)(
1315 PMOS_INTERFACE pOsInterface,
1316 const char * pcName,
1317 uint32_t flags,
1318 PMOS_RESOURCE pOsResource,
1319 uint32_t dwSize);
1320
1321 //!
1322 //! \brief Get Aux Table base address
1323 //!
1324 //! \param [in] pOsInterface
1325 //! MOS_INTERFACE pointer
1326 //! \return uint64_t
1327 //! return Aux Table base address
1328 //!
1329 uint64_t(*pfnGetAuxTableBaseAddr)(
1330 PMOS_INTERFACE pOsInterface);
1331
1332 //!
1333 //! \brief Get Gpu Priority
1334 //! \param [in] pOsInterface
1335 //! pointer to the current gpu context.
1336 //! \param [out] pPriority
1337 //! pointer to the priority get from gpu context.
1338 //!
1339 void (*pfnGetGpuPriority)(
1340 PMOS_INTERFACE pOsInterface,
1341 int32_t *pPriority);
1342
1343 //!
1344 //! \brief Set Gpu Priority
1345 //!
1346 //! \param [in] pOsInterface
1347 //! pointer to the current gpu context
1348 //! \param [in] priority
1349 //! pointer to the priority set to gpu context
1350 //!
1351 void (*pfnSetGpuPriority)(
1352 PMOS_INTERFACE pOsInterface,
1353 int32_t priority);
1354
1355 //!
1356 //! \brief Set slice count to shared memory and KMD
1357 //! \param [in] pOsInterface
1358 //! pointer to the requested slice count for current context
1359 //! \param [out] pSliceCount
1360 //! pointer to the ruling slice count shared by all contexts
1361 void (*pfnSetSliceCount)(
1362 PMOS_INTERFACE pOsInterface,
1363 uint32_t *pSliceCount);
1364
1365 //!
1366 //! \brief Get resource index
1367 //! \param [in] osResource
1368 //! pointer to the resource
1369 //! \return uint32_t
1370 //! return resource index
1371 uint32_t(*pfnGetResourceIndex)(
1372 PMOS_RESOURCE osResource);
1373
1374 //!
1375 //! \brief Get SetMarker enabled flag
1376 //! \details Get SetMarker enabled flag from OsInterface
1377 //! \param PMOS_INTERFACE pOsInterface
1378 //! [in] OS Interface
1379 //! \return bool
1380 //! SetMarker enabled flag
1381 //!
1382 bool (*pfnIsSetMarkerEnabled)(
1383 PMOS_INTERFACE pOsInterface);
1384
1385 //!
1386 //! \brief Get SetMarker resource address
1387 //! \details Get SetMarker resource address from OsInterface
1388 //! \param PMOS_INTERFACE pOsInterface
1389 //! [in] OS Interface
1390 //! \return PMOS_RESOURCE
1391 //! SetMarker resource address
1392 //!
1393 PMOS_RESOURCE (*pfnGetMarkerResource)(
1394 PMOS_INTERFACE pOsInterface);
1395
1396 //!
1397 //! \brief Notify shared Stream index
1398 //!
1399 //! \param PMOS_INTERFACE pOsInterface
1400 //! [in] OS Interface
1401 //! \return void
1402 //!
1403 void (*pfnNotifyStreamIndexSharing)(
1404 PMOS_INTERFACE pOsInterface);
1405
1406 // Virtual Engine related
1407 int32_t bSupportVirtualEngine; //!< Enable virtual engine flag
1408 int32_t bUseHwSemaForResSyncInVE; //!< Flag to indicate if UMD need to send HW sema cmd under this OS when there is a resource sync need with Virtual Engine interface
1409 PMOS_VIRTUALENGINE_INTERFACE pVEInterf;
1410 bool ctxBasedScheduling; //!< Flag to indicate if context based scheduling enabled for virtual engine, that is VE2.0.
1411 bool multiNodeScaling; //!< Flag to indicate if multi-node scaling is enabled for virtual engine, that is VE3.0.
1412 bool veDefaultEnable = true; //!< Flag to indicate if virtual engine is enabled by default
1413 bool phasedSubmission = false; //!< Flag to indicate if secondary command buffers are submitted together (Win) or separately (Linux)
1414 bool frameSplit = true; //!< Flag to indicate if frame split is enabled
1415 bool bSetHandleInvalid = false;
1416 bool bGucSubmission = false; //!< Flag to indicate if guc submission is enabled
1417 MOS_CMD_BUF_ATTRI_VE bufAttriVe[MOS_GPU_CONTEXT_MAX];
1418
1419 MOS_STATUS (*pfnCheckVirtualEngineSupported)(
1420 PMOS_INTERFACE pOsInterface);
1421
1422 #if MOS_MEDIASOLO_SUPPORTED
1423 int32_t bSupportMediaSoloVirtualEngine; //!< Flag to indicate if MediaSolo uses VE solution in cmdbuffer submission.
1424 #endif // MOS_MEDIASOLO_SUPPORTED
1425 bool VEEnable;
1426 bool bCanEnableSecureRt;
1427
1428 int32_t bHcpDecScalabilityMode; //!< enable scalability decode {mode: default, user force, false}
1429 #if (_DEBUG || _RELEASE_INTERNAL)
1430 MOS_FORCE_VEBOX eForceVebox; //!< Force select Vebox
1431 int32_t bEnableDbgOvrdInVE; //!< It is for all scalable engines: used together with KMD VE for UMD to specify an engine directly
1432 int32_t bSoftReset; //!< trigger soft reset
1433 #endif // (_DEBUG || _RELEASE_INTERNAL)
1434 bool streamStateIniter = false;
1435
1436 int32_t bVeboxScalabilityMode; //!< Enable scalability vebox
1437
1438 bool bOptimizeCpuTiming; //!< Optimize Cpu Timing
1439
1440 //!< os interface extension
1441 void *pOsExt;
1442 } MOS_INTERFACE;
1443
1444 #ifdef __cplusplus
1445 extern "C" {
1446 #endif
1447
1448 //! \brief Unified OS Initializes OS Interface
1449 //! \details OS Interface initilization
1450 //! \param PMOS_INTERFACE pOsInterface
1451 //! [in/out] Pointer to OS Interface
1452 //! \param PMOS_CONTEXT pOsDriverContext
1453 //! [in] Pointer to Driver context
1454 //! \return MOS_STATUS
1455 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
1456 //!
1457 MOS_STATUS Mos_InitInterface(
1458 PMOS_INTERFACE pOsInterface,
1459 PMOS_CONTEXT pOsDriverContext,
1460 MOS_COMPONENT component);
1461
1462 //! \brief Destroy the mos interface
1463 //! \details MOS Interface release
1464 //! \param PMOS_INTERFACE pOsInterface
1465 //! [in/out] Pointer to OS Interface
1466 //! \return MOS_STATUS
1467 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
1468 //!
1469 MOS_STATUS Mos_DestroyInterface(PMOS_INTERFACE pOsInterface);
1470
1471 //! \brief Unified OS add command to command buffer
1472 //! \details Offset returned is dword aligned but size requested can be byte aligned
1473 //! \param PMOS_COMMAND_BUFFER pCmdBuffer
1474 //! [in/out] Pointer to Command Buffer
1475 //! \param void *pCmd
1476 //! [in] Command Pointer
1477 //! \param uint32_t dwCmdSize
1478 //! [in] Size of command in bytes
1479 //! \return MOS_STATUS
1480 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
1481 //!
1482 MOS_STATUS Mos_AddCommand(
1483 PMOS_COMMAND_BUFFER pCmdBuffer,
1484 const void *pCmd,
1485 uint32_t dwCmdSize);
1486
1487 //! \brief Unified OS get uf path info
1488 //! \details return a pointer to the user feature key path info
1489 //! \param PMOS_CONTEXT mosContext
1490 //! [in/out] Pointer to mosContext
1491 //! \return MOS_USER_FEATURE_KEY_PATH_INFO*
1492 //! Return a poniter to user feature path info
1493 //!
1494 MOS_USER_FEATURE_KEY_PATH_INFO *Mos_GetDeviceUfPathInfo(
1495 PMOS_CONTEXT mosContext);
1496
1497
1498 #if !EMUL
1499 //!
1500 //! \brief Get memory object based on resource usage
1501 //! \details Get memory object based on resource usage
1502 //! \param MOS_HW_RESOURCE_DEF MosUsage
1503 //! [in] Current usage for resource
1504 //! [in] Gmm client context
1505 //! \return MEMORY_OBJECT_CONTROL_STATE
1506 //! Populated memory object
1507 //!
1508 MEMORY_OBJECT_CONTROL_STATE Mos_CachePolicyGetMemoryObject(
1509 MOS_HW_RESOURCE_DEF MosUsage,
1510 GMM_CLIENT_CONTEXT *pGmmClientContext);
1511
1512 #endif
1513
1514 #ifdef __cplusplus
1515 }
1516 #endif
1517
1518 typedef struct _MOS_GPUCTX_CREATOPTIONS_ENHANCED MOS_GPUCTX_CREATOPTIONS_ENHANCED, *PMOS_GPUCTX_CREATOPTIONS_ENHANCED;
1519 struct _MOS_GPUCTX_CREATOPTIONS_ENHANCED : public _MOS_GPUCTX_CREATOPTIONS
1520 {
1521 union
1522 {
1523 struct
1524 {
1525 uint32_t UsingSFC : 1;
1526 uint32_t Reserved1 : 1; // remove HWRestrictedEngine
1527 #if (_DEBUG || _RELEASE_INTERNAL)
1528 uint32_t Reserved : 29;
1529 uint32_t DebugOverride : 1; // Debug & validation usage only
1530 #else
1531 uint32_t Reserved : 30;
1532 #endif
1533 };
1534 uint32_t Flags;
1535 };
1536
1537 uint32_t LRCACount;
1538
1539 #if (_DEBUG || _RELEASE_INTERNAL)
1540 // Logical engine instances used by this context; valid only if flag DebugOverride is set.
1541 uint8_t EngineInstance[MOS_MAX_ENGINE_INSTANCE_PER_CLASS];
1542 #endif
1543
_MOS_GPUCTX_CREATOPTIONS_ENHANCED_MOS_GPUCTX_CREATOPTIONS_ENHANCED1544 _MOS_GPUCTX_CREATOPTIONS_ENHANCED()
1545 : Flags(0),
1546 LRCACount(0)
1547 {
1548 #if (_DEBUG || _RELEASE_INTERNAL)
1549 for (auto i = 0; i < MOS_MAX_ENGINE_INSTANCE_PER_CLASS; i++)
1550 {
1551 EngineInstance[i] = 0xff;
1552 }
1553 #endif
1554 }
1555 };
1556
1557 #define MOS_VE_SUPPORTED(pOsInterface) \
1558 (pOsInterface ? pOsInterface->bSupportVirtualEngine : false)
1559
1560 #define MOS_VE_CTXBASEDSCHEDULING_SUPPORTED(pOsInterface) \
1561 (pOsInterface ? pOsInterface->ctxBasedScheduling : false)
1562
1563 #define MOS_VE_MULTINODESCALING_SUPPORTED(pOsInterface) \
1564 (pOsInterface ? pOsInterface->multiNodeScaling : false)
1565
1566 #if MOS_MEDIASOLO_SUPPORTED
1567 #define MOS_MEDIASOLO_VE_SUPPORTED(pOsInterface) \
1568 (pOsInterface ? pOsInterface->bSupportMediaSoloVirtualEngine : false)
1569 #endif
1570
Mos_SetVirtualEngineSupported(PMOS_INTERFACE pOsInterface,bool bEnabled)1571 __inline void Mos_SetVirtualEngineSupported(PMOS_INTERFACE pOsInterface, bool bEnabled)
1572 {
1573 if (pOsInterface && pOsInterface->veDefaultEnable)
1574 {
1575 pOsInterface->bSupportVirtualEngine = bEnabled;
1576 }
1577 }
1578
1579 //!
1580 //! \brief Check virtual engine is supported
1581 //! \details Check virtual engine is supported
1582 //! \param PMOS_INTERFACE pOsInterface
1583 //! [in] OS Interface
1584 //! \return MOS_STATUS
1585 //! MOS_STATUS_SUCCESS if succeeded, otherwise error code
1586 //!
1587 MOS_STATUS Mos_CheckVirtualEngineSupported(
1588 PMOS_INTERFACE osInterface,
1589 bool isDecode,
1590 bool veDefaultEnable);
1591
1592 struct ContextRequirement
1593 {
1594 bool IsEnc = false;
1595 bool IsPak = false;
1596 bool IsContextSwitchBack = false;
1597 };
1598
1599 #endif // __MOS_OS_H__
1600