1 /////////////////////////////////////////////////////////////////////////
2 // $Id: data_xfer32.cc 13466 2018-02-16 07:57:32Z sshwarts $
3 /////////////////////////////////////////////////////////////////////////
4 //
5 // Copyright (C) 2001-2018 The Bochs Project
6 //
7 // This library is free software; you can redistribute it and/or
8 // modify it under the terms of the GNU Lesser General Public
9 // License as published by the Free Software Foundation; either
10 // version 2 of the License, or (at your option) any later version.
11 //
12 // This library is distributed in the hope that it will be useful,
13 // but WITHOUT ANY WARRANTY; without even the implied warranty of
14 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 // Lesser General Public License for more details.
16 //
17 // You should have received a copy of the GNU Lesser General Public
18 // License along with this library; if not, write to the Free Software
19 // Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
20 /////////////////////////////////////////////////////////////////////////
21
22 #define NEED_CPU_REG_SHORTCUTS 1
23 #include "bochs.h"
24 #include "cpu.h"
25 #define LOG_THIS BX_CPU_THIS_PTR
26
MOV_EdIdM(bxInstruction_c * i)27 void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EdIdM(bxInstruction_c *i)
28 {
29 bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
30 write_virtual_dword(i->seg(), eaddr, i->Id());
31
32 BX_NEXT_INSTR(i);
33 }
34
MOV_EdIdR(bxInstruction_c * i)35 void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EdIdR(bxInstruction_c *i)
36 {
37 BX_WRITE_32BIT_REGZ(i->dst(), i->Id());
38
39 BX_NEXT_INSTR(i);
40 }
41
MOV32_EdGdM(bxInstruction_c * i)42 void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV32_EdGdM(bxInstruction_c *i)
43 {
44 Bit32u eaddr = (Bit32u) BX_CPU_RESOLVE_ADDR_32(i);
45
46 write_virtual_dword_32(i->seg(), eaddr, BX_READ_32BIT_REG(i->src()));
47
48 BX_NEXT_INSTR(i);
49 }
50
MOV32S_EdGdM(bxInstruction_c * i)51 void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV32S_EdGdM(bxInstruction_c *i)
52 {
53 Bit32u eaddr = (Bit32u) BX_CPU_RESOLVE_ADDR_32(i);
54
55 stack_write_dword(eaddr, BX_READ_32BIT_REG(i->src()));
56
57 BX_NEXT_INSTR(i);
58 }
59
MOV_GdEdR(bxInstruction_c * i)60 void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_GdEdR(bxInstruction_c *i)
61 {
62 BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
63
64 BX_NEXT_INSTR(i);
65 }
66
MOV32_GdEdM(bxInstruction_c * i)67 void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV32_GdEdM(bxInstruction_c *i)
68 {
69 Bit32u eaddr = (Bit32u) BX_CPU_RESOLVE_ADDR_32(i);
70 Bit32u val32 = read_virtual_dword_32(i->seg(), eaddr);
71
72 BX_WRITE_32BIT_REGZ(i->dst(), val32);
73
74 BX_NEXT_INSTR(i);
75 }
76
MOV32S_GdEdM(bxInstruction_c * i)77 void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV32S_GdEdM(bxInstruction_c *i)
78 {
79 Bit32u eaddr = (Bit32u) BX_CPU_RESOLVE_ADDR_32(i);
80 Bit32u val32 = stack_read_dword(eaddr);
81
82 BX_WRITE_32BIT_REGZ(i->dst(), val32);
83
84 BX_NEXT_INSTR(i);
85 }
86
LEA_GdM(bxInstruction_c * i)87 void BX_CPP_AttrRegparmN(1) BX_CPU_C::LEA_GdM(bxInstruction_c *i)
88 {
89 Bit32u eaddr = (Bit32u) BX_CPU_RESOLVE_ADDR(i);
90
91 BX_WRITE_32BIT_REGZ(i->dst(), eaddr);
92
93 BX_NEXT_INSTR(i);
94 }
95
MOV_EAXOd(bxInstruction_c * i)96 void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EAXOd(bxInstruction_c *i)
97 {
98 RAX = read_virtual_dword_32(i->seg(), i->Id());
99
100 BX_NEXT_INSTR(i);
101 }
102
MOV_OdEAX(bxInstruction_c * i)103 void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_OdEAX(bxInstruction_c *i)
104 {
105 write_virtual_dword_32(i->seg(), i->Id(), EAX);
106
107 BX_NEXT_INSTR(i);
108 }
109
MOVZX_GdEbM(bxInstruction_c * i)110 void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GdEbM(bxInstruction_c *i)
111 {
112 bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
113
114 Bit8u op2_8 = read_virtual_byte(i->seg(), eaddr);
115
116 /* zero extend byte op2 into dword op1 */
117 BX_WRITE_32BIT_REGZ(i->dst(), (Bit32u) op2_8);
118
119 BX_NEXT_INSTR(i);
120 }
121
MOVZX_GdEbR(bxInstruction_c * i)122 void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GdEbR(bxInstruction_c *i)
123 {
124 Bit8u op2_8 = BX_READ_8BIT_REGx(i->src(), i->extend8bitL());
125
126 /* zero extend byte op2 into dword op1 */
127 BX_WRITE_32BIT_REGZ(i->dst(), (Bit32u) op2_8);
128
129 BX_NEXT_INSTR(i);
130 }
131
MOVZX_GdEwM(bxInstruction_c * i)132 void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GdEwM(bxInstruction_c *i)
133 {
134 bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
135
136 Bit16u op2_16 = read_virtual_word(i->seg(), eaddr);
137
138 /* zero extend word op2 into dword op1 */
139 BX_WRITE_32BIT_REGZ(i->dst(), (Bit32u) op2_16);
140
141 BX_NEXT_INSTR(i);
142 }
143
MOVZX_GdEwR(bxInstruction_c * i)144 void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GdEwR(bxInstruction_c *i)
145 {
146 Bit16u op2_16 = BX_READ_16BIT_REG(i->src());
147
148 /* zero extend word op2 into dword op1 */
149 BX_WRITE_32BIT_REGZ(i->dst(), (Bit32u) op2_16);
150
151 BX_NEXT_INSTR(i);
152 }
153
MOVSX_GdEbM(bxInstruction_c * i)154 void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GdEbM(bxInstruction_c *i)
155 {
156 bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
157
158 Bit8u op2_8 = read_virtual_byte(i->seg(), eaddr);
159
160 /* sign extend byte op2 into dword op1 */
161 BX_WRITE_32BIT_REGZ(i->dst(), (Bit8s) op2_8);
162
163 BX_NEXT_INSTR(i);
164 }
165
MOVSX_GdEbR(bxInstruction_c * i)166 void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GdEbR(bxInstruction_c *i)
167 {
168 Bit8u op2_8 = BX_READ_8BIT_REGx(i->src(), i->extend8bitL());
169
170 /* sign extend byte op2 into dword op1 */
171 BX_WRITE_32BIT_REGZ(i->dst(), (Bit8s) op2_8);
172
173 BX_NEXT_INSTR(i);
174 }
175
MOVSX_GdEwM(bxInstruction_c * i)176 void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GdEwM(bxInstruction_c *i)
177 {
178 bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
179
180 Bit16u op2_16 = read_virtual_word(i->seg(), eaddr);
181
182 /* sign extend word op2 into dword op1 */
183 BX_WRITE_32BIT_REGZ(i->dst(), (Bit16s) op2_16);
184
185 BX_NEXT_INSTR(i);
186 }
187
MOVSX_GdEwR(bxInstruction_c * i)188 void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GdEwR(bxInstruction_c *i)
189 {
190 Bit16u op2_16 = BX_READ_16BIT_REG(i->src());
191
192 /* sign extend word op2 into dword op1 */
193 BX_WRITE_32BIT_REGZ(i->dst(), (Bit16s) op2_16);
194
195 BX_NEXT_INSTR(i);
196 }
197
XCHG_EdGdM(bxInstruction_c * i)198 void BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_EdGdM(bxInstruction_c *i)
199 {
200 bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
201
202 Bit32u op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
203 Bit32u op2_32 = BX_READ_32BIT_REG(i->src());
204 write_RMW_linear_dword(op2_32);
205 BX_WRITE_32BIT_REGZ(i->src(), op1_32);
206
207 BX_NEXT_INSTR(i);
208 }
209
XCHG_EdGdR(bxInstruction_c * i)210 void BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_EdGdR(bxInstruction_c *i)
211 {
212 Bit32u op1_32 = BX_READ_32BIT_REG(i->dst());
213 Bit32u op2_32 = BX_READ_32BIT_REG(i->src());
214
215 BX_WRITE_32BIT_REGZ(i->src(), op1_32);
216 BX_WRITE_32BIT_REGZ(i->dst(), op2_32);
217
218 BX_NEXT_INSTR(i);
219 }
220
221 // Note: CMOV accesses a memory source operand (read), regardless
222 // of whether condition is true or not. Thus, exceptions may
223 // occur even if the MOV does not take place.
224
CMOVO_GdEdR(bxInstruction_c * i)225 void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVO_GdEdR(bxInstruction_c *i)
226 {
227 if (get_OF())
228 BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
229
230 BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
231
232 BX_NEXT_INSTR(i);
233 }
234
CMOVNO_GdEdR(bxInstruction_c * i)235 void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNO_GdEdR(bxInstruction_c *i)
236 {
237 if (!get_OF())
238 BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
239
240 BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
241
242 BX_NEXT_INSTR(i);
243 }
244
CMOVB_GdEdR(bxInstruction_c * i)245 void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVB_GdEdR(bxInstruction_c *i)
246 {
247 if (get_CF())
248 BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
249
250 BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
251
252 BX_NEXT_INSTR(i);
253 }
254
CMOVNB_GdEdR(bxInstruction_c * i)255 void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNB_GdEdR(bxInstruction_c *i)
256 {
257 if (!get_CF())
258 BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
259
260 BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
261
262 BX_NEXT_INSTR(i);
263 }
264
CMOVZ_GdEdR(bxInstruction_c * i)265 void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVZ_GdEdR(bxInstruction_c *i)
266 {
267 if (get_ZF())
268 BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
269
270 BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
271
272 BX_NEXT_INSTR(i);
273 }
274
CMOVNZ_GdEdR(bxInstruction_c * i)275 void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNZ_GdEdR(bxInstruction_c *i)
276 {
277 if (!get_ZF())
278 BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
279
280 BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
281
282 BX_NEXT_INSTR(i);
283 }
284
CMOVBE_GdEdR(bxInstruction_c * i)285 void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVBE_GdEdR(bxInstruction_c *i)
286 {
287 if (get_CF() || get_ZF())
288 BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
289
290 BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
291
292 BX_NEXT_INSTR(i);
293 }
294
CMOVNBE_GdEdR(bxInstruction_c * i)295 void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNBE_GdEdR(bxInstruction_c *i)
296 {
297 if (! (get_CF() || get_ZF()))
298 BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
299
300 BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
301
302 BX_NEXT_INSTR(i);
303 }
304
CMOVS_GdEdR(bxInstruction_c * i)305 void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVS_GdEdR(bxInstruction_c *i)
306 {
307 if (get_SF())
308 BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
309
310 BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
311
312 BX_NEXT_INSTR(i);
313 }
314
CMOVNS_GdEdR(bxInstruction_c * i)315 void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNS_GdEdR(bxInstruction_c *i)
316 {
317 if (!get_SF())
318 BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
319
320 BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
321
322 BX_NEXT_INSTR(i);
323 }
324
CMOVP_GdEdR(bxInstruction_c * i)325 void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVP_GdEdR(bxInstruction_c *i)
326 {
327 if (get_PF())
328 BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
329
330 BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
331
332 BX_NEXT_INSTR(i);
333 }
334
CMOVNP_GdEdR(bxInstruction_c * i)335 void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNP_GdEdR(bxInstruction_c *i)
336 {
337 if (!get_PF())
338 BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
339
340 BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
341
342 BX_NEXT_INSTR(i);
343 }
344
CMOVL_GdEdR(bxInstruction_c * i)345 void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVL_GdEdR(bxInstruction_c *i)
346 {
347 if (getB_SF() != getB_OF())
348 BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
349
350 BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
351
352 BX_NEXT_INSTR(i);
353 }
354
CMOVNL_GdEdR(bxInstruction_c * i)355 void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNL_GdEdR(bxInstruction_c *i)
356 {
357 if (getB_SF() == getB_OF())
358 BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
359
360 BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
361
362 BX_NEXT_INSTR(i);
363 }
364
CMOVLE_GdEdR(bxInstruction_c * i)365 void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVLE_GdEdR(bxInstruction_c *i)
366 {
367 if (get_ZF() || (getB_SF() != getB_OF()))
368 BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
369
370 BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
371
372 BX_NEXT_INSTR(i);
373 }
374
CMOVNLE_GdEdR(bxInstruction_c * i)375 void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNLE_GdEdR(bxInstruction_c *i)
376 {
377 if (! get_ZF() && (getB_SF() == getB_OF()))
378 BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
379
380 BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
381
382 BX_NEXT_INSTR(i);
383 }
384