1 /*******************************************************************************
2 SPDX-License-Identifier: BSD-2-Clause
3
4 Copyright (c) 2006-2013, Myricom Inc.
5 All rights reserved.
6
7 Redistribution and use in source and binary forms, with or without
8 modification, are permitted provided that the following conditions are met:
9
10 1. Redistributions of source code must retain the above copyright notice,
11 this list of conditions and the following disclaimer.
12
13 2. Neither the name of the Myricom Inc, nor the names of its
14 contributors may be used to endorse or promote products derived from
15 this software without specific prior written permission.
16
17 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
21 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 POSSIBILITY OF SUCH DAMAGE.
28
29 ***************************************************************************/
30
31 #define MXGE_ETH_STOPPED 0
32 #define MXGE_ETH_STOPPING 1
33 #define MXGE_ETH_STARTING 2
34 #define MXGE_ETH_RUNNING 3
35 #define MXGE_ETH_OPEN_FAILED 4
36
37 #define MXGE_FW_OFFSET 1024*1024
38 #define MXGE_EEPROM_STRINGS_SIZE 256
39 #define MXGE_MAX_SEND_DESC 128
40
41 #ifndef VLAN_CAPABILITIES
42 #define VLAN_CAPABILITIES(ifp)
43 #define mxge_vlans_active(sc) (sc)->ifp->if_nvlans
44 #else
45 #define mxge_vlans_active(sc) if_getvlantrunk((sc)->ifp)
46 #endif
47
48 #ifndef VLAN_TAG_VALUE
49 #define MXGE_NEW_VLAN_API
50 #endif
51
52 #ifndef IFCAP_LRO
53 #define IFCAP_LRO 0
54 #endif
55
56 #ifndef IFCAP_TSO
57 #define IFCAP_TSO 0
58 #endif
59
60 #ifndef IFCAP_TSO4
61 #define IFCAP_TSO4 0
62 #endif
63
64 #ifndef IFCAP_TSO6
65 #define IFCAP_TSO6 0
66 #endif
67
68 #ifndef IFCAP_TXCSUM_IPV6
69 #define IFCAP_TXCSUM_IPV6 0
70 #endif
71
72 #ifndef IFCAP_RXCSUM_IPV6
73 #define IFCAP_RXCSUM_IPV6 0
74 #endif
75
76 #ifndef CSUM_TSO
77 #define CSUM_TSO 0
78 #endif
79
80 #ifndef CSUM_TCP_IPV6
81 #define CSUM_TCP_IPV6 0
82 #endif
83
84 #ifndef CSUM_UDP_IPV6
85 #define CSUM_UDP_IPV6 0
86 #endif
87
88 #ifndef CSUM_DELAY_DATA_IPV6
89 #define CSUM_DELAY_DATA_IPV6 0
90 #endif
91
92 typedef struct {
93 void *addr;
94 bus_addr_t bus_addr;
95 bus_dma_tag_t dmat;
96 bus_dmamap_t map;
97 } mxge_dma_t;
98
99 typedef struct {
100 mcp_slot_t *entry;
101 mxge_dma_t dma;
102 int cnt;
103 int idx;
104 int mask;
105 } mxge_rx_done_t;
106
107 typedef struct
108 {
109 uint32_t data0;
110 uint32_t data1;
111 uint32_t data2;
112 } mxge_cmd_t;
113
114 struct mxge_rx_buffer_state {
115 struct mbuf *m;
116 bus_dmamap_t map;
117 };
118
119 struct mxge_tx_buffer_state {
120 struct mbuf *m;
121 bus_dmamap_t map;
122 int flag;
123 };
124
125 typedef struct
126 {
127 volatile mcp_kreq_ether_recv_t *lanai; /* lanai ptr for recv ring */
128 mcp_kreq_ether_recv_t *shadow; /* host shadow of recv ring */
129 struct mxge_rx_buffer_state *info;
130 bus_dma_tag_t dmat;
131 bus_dmamap_t extra_map;
132 int cnt;
133 int nbufs;
134 int cl_size;
135 int alloc_fail;
136 int mask; /* number of rx slots -1 */
137 int mlen;
138 } mxge_rx_ring_t;
139
140 typedef struct
141 {
142 struct mtx mtx;
143 struct buf_ring *br;
144 volatile mcp_kreq_ether_send_t *lanai; /* lanai ptr for sendq */
145 volatile uint32_t *send_go; /* doorbell for sendq */
146 volatile uint32_t *send_stop; /* doorbell for sendq */
147 mcp_kreq_ether_send_t *req_list; /* host shadow of sendq */
148 char *req_bytes;
149 bus_dma_segment_t *seg_list;
150 struct mxge_tx_buffer_state *info;
151 bus_dma_tag_t dmat;
152 int req; /* transmits submitted */
153 int mask; /* number of transmit slots -1 */
154 int done; /* transmits completed */
155 int pkt_done; /* packets completed */
156 int max_desc; /* max descriptors per xmit */
157 int queue_active; /* fw currently polling this queue*/
158 int activate;
159 int deactivate;
160 int stall; /* #times hw queue exhausted */
161 int wake; /* #times irq re-enabled xmit */
162 int watchdog_req; /* cache of req */
163 int watchdog_done; /* cache of done */
164 int watchdog_rx_pause; /* cache of pause rq recvd */
165 int defrag;
166 char mtx_name[16];
167 } mxge_tx_ring_t;
168
169 struct mxge_softc;
170 typedef struct mxge_softc mxge_softc_t;
171
172 struct mxge_slice_state {
173 mxge_softc_t *sc;
174 mxge_tx_ring_t tx; /* transmit ring */
175 mxge_rx_ring_t rx_small;
176 mxge_rx_ring_t rx_big;
177 mxge_rx_done_t rx_done;
178 mcp_irq_data_t *fw_stats;
179 volatile uint32_t *irq_claim;
180 u_long ipackets;
181 u_long opackets;
182 u_long obytes;
183 u_long omcasts;
184 u_long oerrors;
185 int if_drv_flags;
186 struct lro_ctrl lc;
187 mxge_dma_t fw_stats_dma;
188 struct sysctl_oid *sysctl_tree;
189 struct sysctl_ctx_list sysctl_ctx;
190 char scratch[256];
191 };
192
193 struct mxge_softc {
194 if_t ifp;
195 struct mxge_slice_state *ss;
196 int tx_boundary; /* boundary transmits cannot cross*/
197 int lro_cnt;
198 bus_dma_tag_t parent_dmat;
199 volatile uint8_t *sram;
200 int sram_size;
201 volatile uint32_t *irq_deassert;
202 mcp_cmd_response_t *cmd;
203 mxge_dma_t cmd_dma;
204 mxge_dma_t zeropad_dma;
205 struct pci_dev *pdev;
206 int legacy_irq;
207 int link_state;
208 unsigned int rdma_tags_available;
209 int intr_coal_delay;
210 volatile uint32_t *intr_coal_delay_ptr;
211 int wc;
212 struct mtx cmd_mtx;
213 struct mtx driver_mtx;
214 int wake_queue;
215 int stop_queue;
216 int down_cnt;
217 int watchdog_resets;
218 int watchdog_countdown;
219 int pause;
220 struct resource *mem_res;
221 struct resource *irq_res;
222 struct resource **msix_irq_res;
223 struct resource *msix_table_res;
224 struct resource *msix_pba_res;
225 void *ih;
226 void **msix_ih;
227 char *fw_name;
228 char eeprom_strings[MXGE_EEPROM_STRINGS_SIZE];
229 char fw_version[128];
230 int fw_ver_major;
231 int fw_ver_minor;
232 int fw_ver_tiny;
233 int adopted_rx_filter_bug;
234 device_t dev;
235 struct ifmedia media;
236 int read_dma;
237 int write_dma;
238 int read_write_dma;
239 int fw_multicast_support;
240 int link_width;
241 int max_mtu;
242 int throttle;
243 int tx_defrag;
244 int media_flags;
245 int need_media_probe;
246 int num_slices;
247 int rx_ring_size;
248 int dying;
249 int connector;
250 int current_media;
251 int max_tso6_hlen;
252 mxge_dma_t dmabench_dma;
253 struct callout co_hdl;
254 struct taskqueue *tq;
255 struct task watchdog_task;
256 struct sysctl_oid *slice_sysctl_tree;
257 struct sysctl_ctx_list slice_sysctl_ctx;
258 char *mac_addr_string;
259 uint8_t mac_addr[6]; /* eeprom mac address */
260 uint16_t pectl; /* save PCIe CTL state */
261 char product_code_string[64];
262 char serial_number_string[64];
263 char cmd_mtx_name[16];
264 char driver_mtx_name[16];
265 };
266
267 #define MXGE_PCI_VENDOR_MYRICOM 0x14c1
268 #define MXGE_PCI_DEVICE_Z8E 0x0008
269 #define MXGE_PCI_DEVICE_Z8E_9 0x0009
270 #define MXGE_PCI_REV_Z8E 0
271 #define MXGE_PCI_REV_Z8ES 1
272 #define MXGE_XFP_COMPLIANCE_BYTE 131
273 #define MXGE_SFP_COMPLIANCE_BYTE 3
274 #define MXGE_MIN_THROTTLE 416
275 #define MXGE_MAX_THROTTLE 4096
276
277 /* Types of connectors on NICs supported by this driver */
278 #define MXGE_CX4 0
279 #define MXGE_XFP 1
280 #define MXGE_SFP 2
281 #define MXGE_QRF 3
282
283 #define MXGE_HIGHPART_TO_U32(X) \
284 (sizeof (X) == 8) ? ((uint32_t)((uint64_t)(X) >> 32)) : (0)
285 #define MXGE_LOWPART_TO_U32(X) ((uint32_t)(X))
286
287 struct mxge_media_type
288 {
289 int flag;
290 uint8_t bitmask;
291 char *name;
292 };
293
294 struct mxge_pkt_info {
295 int ip_off;
296 int ip_hlen;
297 struct ip *ip;
298 struct ip6_hdr *ip6;
299 struct tcphdr *tcp;
300 };
301
302 static inline void
mxge_pio_copy(volatile void * to_v,void * from_v,size_t size)303 mxge_pio_copy(volatile void *to_v, void *from_v, size_t size)
304 {
305 register volatile uintptr_t *to;
306 volatile uintptr_t *from;
307 size_t i;
308
309 to = (volatile uintptr_t *) to_v;
310 from = from_v;
311 for (i = (size / sizeof (uintptr_t)); i; i--) {
312 *to = *from;
313 to++;
314 from++;
315 }
316
317 }
318
319 void mxge_lro_flush(struct mxge_slice_state *ss, struct lro_entry *lro);
320 int mxge_lro_rx(struct mxge_slice_state *ss, struct mbuf *m_head,
321 uint32_t csum);
322
323
324 /*
325 This file uses Myri10GE driver indentation.
326
327 Local Variables:
328 c-file-style:"linux"
329 tab-width:8
330 End:
331 */
332