1 /* $OpenBSD: pciide_nforce_reg.h,v 1.3 2004/09/24 07:38:38 grange Exp $ */ 2 3 /* 4 * Copyright (c) 2003 Alexander Yurchenko <grange@openbsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #ifndef _DEV_PCI_PCIIDE_NFORCE_REG_H_ 29 #define _DEV_PCI_PCIIDE_NFORCE_REG_H_ 30 31 /* Configuration register */ 32 #define NFORCE_CONF 0x50 33 #define NFORCE_CHAN_EN(chan) \ 34 (0x00000001 << (1 - (chan))) 35 36 /* PIO and multiword DMA timing register */ 37 #define NFORCE_PIODMATIM 0x58 38 #define NFORCE_PIODMATIM_MASK(chan) \ 39 (0xffff << ((1 - (chan)) * 16)) 40 #define NFORCE_PIODMATIM_SET(chan, drive, x) \ 41 ((x) << ((3 - ((chan) * 2 + (drive))) * 8)) 42 43 /* PIO timing register */ 44 #define NFORCE_PIOTIM 0x5c 45 46 /* UDMA timing register */ 47 #define NFORCE_UDMATIM 0x60 48 #define NFORCE_UDMATIM_MASK(chan) \ 49 (0xffff << ((1 - (chan)) * 16)) 50 #define NFORCE_UDMATIM_SET(chan, drive, x) \ 51 ((x) << ((3 - ((chan) * 2 + (drive))) * 8)) 52 #define NFORCE_UDMA_EN(chan, drive) \ 53 (0x40 << ((3 - ((chan) * 2 + (drive))) * 8)) 54 #define NFORCE_UDMA_ENM(chan, drive) \ 55 (0x80 << ((3 - ((chan) * 2 + (drive))) * 8)) 56 57 /* Timing values */ 58 static u_int8_t nforce_pio[] = { 0xa8, 0x65, 0x42, 0x22, 0x20 }; 59 static u_int8_t nforce_udma[] = { 0x02, 0x01, 0x00, 0x04, 0x05, 0x06, 0x07 }; 60 61 #endif /* !_DEV_PCI_PCIIDE_NFORCE_REG_H_ */ 62