1 /* $OpenBSD: nsgphyreg.h,v 1.5 2005/05/27 09:24:01 brad Exp $ */ 2 /* 3 * Copyright (c) 2001 Wind River Systems 4 * Copyright (c) 2001 5 * Bill Paul <wpaul@bsdi.com>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: /usr/local/www/cvsroot/FreeBSD/src/sys/dev/mii/nsgphyreg.h,v 1.3 2002/04/29 11:57:28 phk Exp $ 35 */ 36 37 #ifndef _DEV_MII_NSGPHYREG_H_ 38 #define _DEV_MII_NSGPHYREG_H_ 39 40 /* 41 * NatSemi DP83891 registers 42 */ 43 44 #define NSGPHY_MII_STRAPOPT 0x10 /* Strap options */ 45 #define NSGPHY_STRAPOPT_PHYADDR 0xF800 /* PHY address */ 46 #define NSGPHY_STRAPOPT_COMPAT 0x0400 /* Broadcom compat mode */ 47 #define NSGPHY_STRAPOPT_MMSE 0x0200 /* Manual master/slave enable */ 48 #define NSGPHY_STRAPOPT_ANEG 0x0100 /* Autoneg enable */ 49 #define NSGPHY_STRAPOPT_MMSV 0x0080 /* Manual master/slave setting */ 50 #define NSGPHY_STRAPOPT_1000HDX 0x0010 /* Advertise 1000 half-duplex */ 51 #define NSGPHY_STRAPOPT_1000FDX 0x0008 /* Advertise 1000 full-duplex */ 52 #define NSGPHY_STRAPOPT_100_ADV 0x0004 /* Advertise 100 full/half-duplex */ 53 #define NSGPHY_STRAPOPT_SPEED1 0x0002 /* speed selection */ 54 #define NSGPHY_STRAPOPT_SPEED0 0x0001 /* speed selection */ 55 #define NSGPHY_STRAPOPT_SPDSEL (NSGPHY_STRAPOPT_SPEED1|NSGPHY_STRAPOPT_SPEED0) 56 57 #define NSGPHY_MII_PHYSUP 0x11 /* PHY support/current status */ 58 #define PHY_SUP_SPEED1 0x0010 /* speed bit 1 */ 59 #define PHY_SUP_SPEED0 0x0008 /* speed bit 1 */ 60 #define NSGPHY_PHYSUP_SPEED1 0x0010 /* speed status */ 61 #define NSGPHY_PHYSUP_SPEED0 0x0008 /* speed status */ 62 #define NSGPHY_PHYSUP_SPDSTS (NSGPHY_PHYSUP_SPEED1|NSGPHY_PHYSUP_SPEED0) 63 #define NSGPHY_PHYSUP_LNKSTS 0x0004 /* link status */ 64 #define PHY_SUP_LINK 0x0004 /* link status */ 65 #define PHY_SUP_DUPLEX 0x0002 /* 1 == full-duplex */ 66 #define NSGPHY_PHYSUP_DUPSTS 0x0002 /* duplex status 1 == full */ 67 #define NSGPHY_PHYSUP_10BT 0x0001 /* 10baseT resolved */ 68 69 #define NSGPHY_SPDSTS_1000 0x0010 70 #define NSGPHY_SPDSTS_100 0x0008 71 #define NSGPHY_SPDSTS_10 0x0000 72 73 #endif /* _DEV_NSGPHY_MIIREG_H_ */ 74