1 /* 2 * SPDX-FileCopyrightText: Copyright (c) 2007-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 3 * SPDX-License-Identifier: MIT 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #pragma once 25 26 #include <nvtypes.h> 27 28 // 29 // This file was generated with FINN, an NVIDIA coding tool. 30 // Source file: ctrl/ctrla0bc.finn 31 // 32 33 #include "ctrl/ctrlxxxx.h" 34 /* NVENC_SW_SESSION control commands and parameters */ 35 #define NVA0BC_CTRL_CMD(cat,idx) NVXXXX_CTRL_CMD(0xA0BC, NVA0BC_CTRL_##cat, idx) 36 37 /* Command categories (6bits) */ 38 #define NVA0BC_CTRL_RESERVED (0x00) 39 #define NVA0BC_CTRL_NVENC_SW_SESSION (0x01) 40 41 #define NVA0BC_CTRL_CMD_NVENC_MAX_BUFFER_ENTRIES 60 42 43 /* 44 * NVA0BC_CTRL_CMD_NVENC_SW_SESSION_UPDATE_INFO 45 * 46 * This command is used to let RM know about runtime information about 47 * running NVENC session on given GPU. 48 * * 49 * hResolution 50 * This parameter specifies the current horizontal resolution of NVENC session. 51 * vResolution 52 * This parameter specifies the current vertical resolution of NVENC session. 53 * averageEncodeLatency 54 * This field specifies the average encode latency over last 1 second. 55 * averageEncodeFps 56 * This field specifies the average encode FPS over last 1 second. 57 * timestampBufferSize 58 * This field specifies the number of entries in the caller's timestampBuffer. 59 * It should not be greater than NVA0BC_CTRL_CMD_NVENC_MAX_BUFFER_ENTRIES. 60 * When this field is zero, RM will assume that client has calculated averageEncodeFps 61 * and averageEncodeLatency, thus ignore timestampBuffer. 62 * timestampBuffer 63 * This field specifies a pointer in the caller's address space 64 * to the buffer holding encode timestamps in microseconds. 65 * This buffer must be at least as big as timestampBufferSize multiplied 66 * by the size of the NVA0BC_CTRL_NVENC_TIMESTAMP structure. 67 * e.g. if there are 10 fps, buffer will contain only 10 entries and rest of 68 * entries should be 0x00. However if there are more than 60 fps, buffer will 69 * contain last/latest 60 entries of frame encoding start-end timestamps. Caller 70 * should make sure timestamps won't wrap around. RM assume that for each 71 * frame timestamp value endTime would be greater than startTime. 72 * 73 * Possible status values returned are: 74 * NV_OK 75 * NV_ERR_INVALID_ARGUMENT 76 */ 77 78 #define NVA0BC_CTRL_CMD_NVENC_SW_SESSION_UPDATE_INFO (0xa0bc0101) /* finn: Evaluated from "(FINN_NVENC_SW_SESSION_NVENC_SW_SESSION_INTERFACE_ID << 8) | NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_PARAMS_MESSAGE_ID" */ 79 80 typedef struct NVA0BC_CTRL_NVENC_TIMESTAMP { 81 NV_DECLARE_ALIGNED(NvU64 startTime, 8); 82 NV_DECLARE_ALIGNED(NvU64 endTime, 8); 83 } NVA0BC_CTRL_NVENC_TIMESTAMP; 84 85 #define NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_PARAMS_MESSAGE_ID (0x1U) 86 87 typedef struct NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_PARAMS { 88 NvU32 hResolution; 89 NvU32 vResolution; 90 NvU32 averageEncodeLatency; 91 NvU32 averageEncodeFps; 92 NvU32 timestampBufferSize; 93 NV_DECLARE_ALIGNED(NvP64 timestampBuffer, 8); 94 } NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_PARAMS; 95 96 /* 97 * NVA0BC_CTRL_CMD_NVENC_SW_SESSION_UPDATE_INFO_V2 98 * 99 * This command updates the NVENC software sessions information for the associate GPU. 100 * This command is similar to NVA0BC_CTRL_CMD_NVENC_SW_SESSION_UPDATE_INFO but doesn't have 101 * embedded pointers. 102 * 103 * Check NVA0BC_CTRL_CMD_NVENC_SW_SESSION_UPDATE_INFO for detailed information. 104 */ 105 106 #define NVA0BC_CTRL_CMD_NVENC_SW_SESSION_UPDATE_INFO_V2 (0xa0bc0102) /* finn: Evaluated from "(FINN_NVENC_SW_SESSION_NVENC_SW_SESSION_INTERFACE_ID << 8) | NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_V2_PARAMS_MESSAGE_ID" */ 107 108 #define NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_V2_PARAMS_MESSAGE_ID (0x2U) 109 110 typedef struct NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_V2_PARAMS { 111 NvU32 hResolution; 112 NvU32 vResolution; 113 NvU32 averageEncodeLatency; 114 NvU32 averageEncodeFps; 115 NvU32 timestampBufferSize; 116 NV_DECLARE_ALIGNED(NVA0BC_CTRL_NVENC_TIMESTAMP timestampBuffer[NVA0BC_CTRL_CMD_NVENC_MAX_BUFFER_ENTRIES], 8); 117 } NVA0BC_CTRL_NVENC_SW_SESSION_UPDATE_INFO_V2_PARAMS; 118 119 /* _ctrla0bc_h_ */ 120