1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (c) 2011-2014, Intel Corporation.
4 */
5
6 #ifndef _NVME_H
7 #define _NVME_H
8
9 #include <linux/nvme.h>
10 #include <linux/cdev.h>
11 #include <linux/pci.h>
12 #include <linux/kref.h>
13 #include <linux/blk-mq.h>
14 #include <linux/sed-opal.h>
15 #include <linux/fault-inject.h>
16 #include <linux/rcupdate.h>
17 #include <linux/wait.h>
18 #include <linux/t10-pi.h>
19 #include <linux/ratelimit_types.h>
20
21 #include <trace/events/block.h>
22
23 extern const struct pr_ops nvme_pr_ops;
24
25 extern unsigned int nvme_io_timeout;
26 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
27
28 extern unsigned int admin_timeout;
29 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ)
30
31 #define NVME_DEFAULT_KATO 5
32
33 #ifdef CONFIG_ARCH_NO_SG_CHAIN
34 #define NVME_INLINE_SG_CNT 0
35 #define NVME_INLINE_METADATA_SG_CNT 0
36 #else
37 #define NVME_INLINE_SG_CNT 2
38 #define NVME_INLINE_METADATA_SG_CNT 1
39 #endif
40
41 /*
42 * Default to a 4K page size, with the intention to update this
43 * path in the future to accommodate architectures with differing
44 * kernel and IO page sizes.
45 */
46 #define NVME_CTRL_PAGE_SHIFT 12
47 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT)
48
49 extern struct workqueue_struct *nvme_wq;
50 extern struct workqueue_struct *nvme_reset_wq;
51 extern struct workqueue_struct *nvme_delete_wq;
52
53 /*
54 * List of workarounds for devices that required behavior not specified in
55 * the standard.
56 */
57 enum nvme_quirks {
58 /*
59 * Prefers I/O aligned to a stripe size specified in a vendor
60 * specific Identify field.
61 */
62 NVME_QUIRK_STRIPE_SIZE = (1 << 0),
63
64 /*
65 * The controller doesn't handle Identify value others than 0 or 1
66 * correctly.
67 */
68 NVME_QUIRK_IDENTIFY_CNS = (1 << 1),
69
70 /*
71 * The controller deterministically returns O's on reads to
72 * logical blocks that deallocate was called on.
73 */
74 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2),
75
76 /*
77 * The controller needs a delay before starts checking the device
78 * readiness, which is done by reading the NVME_CSTS_RDY bit.
79 */
80 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3),
81
82 /*
83 * APST should not be used.
84 */
85 NVME_QUIRK_NO_APST = (1 << 4),
86
87 /*
88 * The deepest sleep state should not be used.
89 */
90 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5),
91
92 /*
93 * Set MEDIUM priority on SQ creation
94 */
95 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7),
96
97 /*
98 * Ignore device provided subnqn.
99 */
100 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8),
101
102 /*
103 * Broken Write Zeroes.
104 */
105 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9),
106
107 /*
108 * Force simple suspend/resume path.
109 */
110 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10),
111
112 /*
113 * Use only one interrupt vector for all queues
114 */
115 NVME_QUIRK_SINGLE_VECTOR = (1 << 11),
116
117 /*
118 * Use non-standard 128 bytes SQEs.
119 */
120 NVME_QUIRK_128_BYTES_SQES = (1 << 12),
121
122 /*
123 * Prevent tag overlap between queues
124 */
125 NVME_QUIRK_SHARED_TAGS = (1 << 13),
126
127 /*
128 * Don't change the value of the temperature threshold feature
129 */
130 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14),
131
132 /*
133 * The controller doesn't handle the Identify Namespace
134 * Identification Descriptor list subcommand despite claiming
135 * NVMe 1.3 compliance.
136 */
137 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15),
138
139 /*
140 * The controller does not properly handle DMA addresses over
141 * 48 bits.
142 */
143 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16),
144
145 /*
146 * The controller requires the command_id value be limited, so skip
147 * encoding the generation sequence number.
148 */
149 NVME_QUIRK_SKIP_CID_GEN = (1 << 17),
150
151 /*
152 * Reports garbage in the namespace identifiers (eui64, nguid, uuid).
153 */
154 NVME_QUIRK_BOGUS_NID = (1 << 18),
155
156 /*
157 * No temperature thresholds for channels other than 0 (Composite).
158 */
159 NVME_QUIRK_NO_SECONDARY_TEMP_THRESH = (1 << 19),
160
161 /*
162 * Disables simple suspend/resume path.
163 */
164 NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND = (1 << 20),
165
166 /*
167 * MSI (but not MSI-X) interrupts are broken and never fire.
168 */
169 NVME_QUIRK_BROKEN_MSI = (1 << 21),
170 };
171
172 /*
173 * Common request structure for NVMe passthrough. All drivers must have
174 * this structure as the first member of their request-private data.
175 */
176 struct nvme_request {
177 struct nvme_command *cmd;
178 union nvme_result result;
179 u8 genctr;
180 u8 retries;
181 u8 flags;
182 u16 status;
183 #ifdef CONFIG_NVME_MULTIPATH
184 unsigned long start_time;
185 #endif
186 struct nvme_ctrl *ctrl;
187 };
188
189 /*
190 * Mark a bio as coming in through the mpath node.
191 */
192 #define REQ_NVME_MPATH REQ_DRV
193
194 enum {
195 NVME_REQ_CANCELLED = (1 << 0),
196 NVME_REQ_USERCMD = (1 << 1),
197 NVME_MPATH_IO_STATS = (1 << 2),
198 };
199
nvme_req(struct request * req)200 static inline struct nvme_request *nvme_req(struct request *req)
201 {
202 return blk_mq_rq_to_pdu(req);
203 }
204
nvme_req_qid(struct request * req)205 static inline u16 nvme_req_qid(struct request *req)
206 {
207 if (!req->q->queuedata)
208 return 0;
209
210 return req->mq_hctx->queue_num + 1;
211 }
212
213 /* The below value is the specific amount of delay needed before checking
214 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
215 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
216 * found empirically.
217 */
218 #define NVME_QUIRK_DELAY_AMOUNT 2300
219
220 /*
221 * enum nvme_ctrl_state: Controller state
222 *
223 * @NVME_CTRL_NEW: New controller just allocated, initial state
224 * @NVME_CTRL_LIVE: Controller is connected and I/O capable
225 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset)
226 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the
227 * transport
228 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion)
229 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not
230 * disabled/failed immediately. This state comes
231 * after all async event processing took place and
232 * before ns removal and the controller deletion
233 * progress
234 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during
235 * shutdown or removal. In this case we forcibly
236 * kill all inflight I/O as they have no chance to
237 * complete
238 */
239 enum nvme_ctrl_state {
240 NVME_CTRL_NEW,
241 NVME_CTRL_LIVE,
242 NVME_CTRL_RESETTING,
243 NVME_CTRL_CONNECTING,
244 NVME_CTRL_DELETING,
245 NVME_CTRL_DELETING_NOIO,
246 NVME_CTRL_DEAD,
247 };
248
249 struct nvme_fault_inject {
250 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
251 struct fault_attr attr;
252 struct dentry *parent;
253 bool dont_retry; /* DNR, do not retry */
254 u16 status; /* status code */
255 #endif
256 };
257
258 enum nvme_ctrl_flags {
259 NVME_CTRL_FAILFAST_EXPIRED = 0,
260 NVME_CTRL_ADMIN_Q_STOPPED = 1,
261 NVME_CTRL_STARTED_ONCE = 2,
262 NVME_CTRL_STOPPED = 3,
263 NVME_CTRL_SKIP_ID_CNS_CS = 4,
264 NVME_CTRL_DIRTY_CAPABILITY = 5,
265 NVME_CTRL_FROZEN = 6,
266 };
267
268 struct nvme_ctrl {
269 bool comp_seen;
270 bool identified;
271 bool passthru_err_log_enabled;
272 enum nvme_ctrl_state state;
273 spinlock_t lock;
274 struct mutex scan_lock;
275 const struct nvme_ctrl_ops *ops;
276 struct request_queue *admin_q;
277 struct request_queue *connect_q;
278 struct request_queue *fabrics_q;
279 struct device *dev;
280 int instance;
281 int numa_node;
282 struct blk_mq_tag_set *tagset;
283 struct blk_mq_tag_set *admin_tagset;
284 struct list_head namespaces;
285 struct mutex namespaces_lock;
286 struct srcu_struct srcu;
287 struct device ctrl_device;
288 struct device *device; /* char device */
289 #ifdef CONFIG_NVME_HWMON
290 struct device *hwmon_device;
291 #endif
292 struct cdev cdev;
293 struct work_struct reset_work;
294 struct work_struct delete_work;
295 wait_queue_head_t state_wq;
296
297 struct nvme_subsystem *subsys;
298 struct list_head subsys_entry;
299
300 struct opal_dev *opal_dev;
301
302 char name[12];
303 u16 cntlid;
304
305 u16 mtfa;
306 u32 ctrl_config;
307 u32 queue_count;
308
309 u64 cap;
310 u32 max_hw_sectors;
311 u32 max_segments;
312 u32 max_integrity_segments;
313 u32 max_zeroes_sectors;
314 #ifdef CONFIG_BLK_DEV_ZONED
315 u32 max_zone_append;
316 #endif
317 u16 crdt[3];
318 u16 oncs;
319 u8 dmrl;
320 u32 dmrsl;
321 u16 oacs;
322 u16 sqsize;
323 u32 max_namespaces;
324 atomic_t abort_limit;
325 u8 vwc;
326 u32 vs;
327 u32 sgls;
328 u16 kas;
329 u8 npss;
330 u8 apsta;
331 u16 wctemp;
332 u16 cctemp;
333 u32 oaes;
334 u32 aen_result;
335 u32 ctratt;
336 unsigned int shutdown_timeout;
337 unsigned int kato;
338 bool subsystem;
339 unsigned long quirks;
340 struct nvme_id_power_state psd[32];
341 struct nvme_effects_log *effects;
342 struct xarray cels;
343 struct work_struct scan_work;
344 struct work_struct async_event_work;
345 struct delayed_work ka_work;
346 struct delayed_work failfast_work;
347 struct nvme_command ka_cmd;
348 unsigned long ka_last_check_time;
349 struct work_struct fw_act_work;
350 unsigned long events;
351
352 #ifdef CONFIG_NVME_MULTIPATH
353 /* asymmetric namespace access: */
354 u8 anacap;
355 u8 anatt;
356 u32 anagrpmax;
357 u32 nanagrpid;
358 struct mutex ana_lock;
359 struct nvme_ana_rsp_hdr *ana_log_buf;
360 size_t ana_log_size;
361 struct timer_list anatt_timer;
362 struct work_struct ana_work;
363 #endif
364
365 #ifdef CONFIG_NVME_HOST_AUTH
366 struct work_struct dhchap_auth_work;
367 struct mutex dhchap_auth_mutex;
368 struct nvme_dhchap_queue_context *dhchap_ctxs;
369 struct nvme_dhchap_key *host_key;
370 struct nvme_dhchap_key *ctrl_key;
371 u16 transaction;
372 #endif
373 struct key *tls_key;
374
375 /* Power saving configuration */
376 u64 ps_max_latency_us;
377 bool apst_enabled;
378
379 /* PCIe only: */
380 u16 hmmaxd;
381 u32 hmpre;
382 u32 hmmin;
383 u32 hmminds;
384
385 /* Fabrics only */
386 u32 ioccsz;
387 u32 iorcsz;
388 u16 icdoff;
389 u16 maxcmd;
390 int nr_reconnects;
391 unsigned long flags;
392 struct nvmf_ctrl_options *opts;
393
394 struct page *discard_page;
395 unsigned long discard_page_busy;
396
397 struct nvme_fault_inject fault_inject;
398
399 enum nvme_ctrl_type cntrltype;
400 enum nvme_dctype dctype;
401 };
402
nvme_ctrl_state(struct nvme_ctrl * ctrl)403 static inline enum nvme_ctrl_state nvme_ctrl_state(struct nvme_ctrl *ctrl)
404 {
405 return READ_ONCE(ctrl->state);
406 }
407
408 enum nvme_iopolicy {
409 NVME_IOPOLICY_NUMA,
410 NVME_IOPOLICY_RR,
411 };
412
413 struct nvme_subsystem {
414 int instance;
415 struct device dev;
416 /*
417 * Because we unregister the device on the last put we need
418 * a separate refcount.
419 */
420 struct kref ref;
421 struct list_head entry;
422 struct mutex lock;
423 struct list_head ctrls;
424 struct list_head nsheads;
425 char subnqn[NVMF_NQN_SIZE];
426 char serial[20];
427 char model[40];
428 char firmware_rev[8];
429 u8 cmic;
430 enum nvme_subsys_type subtype;
431 u16 vendor_id;
432 u16 awupf; /* 0's based awupf value. */
433 struct ida ns_ida;
434 #ifdef CONFIG_NVME_MULTIPATH
435 enum nvme_iopolicy iopolicy;
436 #endif
437 };
438
439 /*
440 * Container structure for uniqueue namespace identifiers.
441 */
442 struct nvme_ns_ids {
443 u8 eui64[8];
444 u8 nguid[16];
445 uuid_t uuid;
446 u8 csi;
447 };
448
449 /*
450 * Anchor structure for namespaces. There is one for each namespace in a
451 * NVMe subsystem that any of our controllers can see, and the namespace
452 * structure for each controller is chained of it. For private namespaces
453 * there is a 1:1 relation to our namespace structures, that is ->list
454 * only ever has a single entry for private namespaces.
455 */
456 struct nvme_ns_head {
457 struct list_head list;
458 struct srcu_struct srcu;
459 struct nvme_subsystem *subsys;
460 struct nvme_ns_ids ids;
461 struct list_head entry;
462 struct kref ref;
463 bool shared;
464 bool passthru_err_log_enabled;
465 int instance;
466 struct nvme_effects_log *effects;
467 u64 nuse;
468 unsigned ns_id;
469 int lba_shift;
470 u16 ms;
471 u16 pi_size;
472 u8 pi_type;
473 u8 pi_offset;
474 u8 guard_type;
475 #ifdef CONFIG_BLK_DEV_ZONED
476 u64 zsze;
477 #endif
478 unsigned long features;
479
480 struct ratelimit_state rs_nuse;
481
482 struct cdev cdev;
483 struct device cdev_device;
484
485 struct gendisk *disk;
486 #ifdef CONFIG_NVME_MULTIPATH
487 struct bio_list requeue_list;
488 spinlock_t requeue_lock;
489 struct work_struct requeue_work;
490 struct mutex lock;
491 unsigned long flags;
492 #define NVME_NSHEAD_DISK_LIVE 0
493 struct nvme_ns __rcu *current_path[];
494 #endif
495 };
496
nvme_ns_head_multipath(struct nvme_ns_head * head)497 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head)
498 {
499 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk;
500 }
501
502 enum nvme_ns_features {
503 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */
504 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */
505 NVME_NS_DEAC, /* DEAC bit in Write Zeores supported */
506 };
507
508 struct nvme_ns {
509 struct list_head list;
510
511 struct nvme_ctrl *ctrl;
512 struct request_queue *queue;
513 struct gendisk *disk;
514 #ifdef CONFIG_NVME_MULTIPATH
515 enum nvme_ana_state ana_state;
516 u32 ana_grpid;
517 #endif
518 struct list_head siblings;
519 struct kref kref;
520 struct nvme_ns_head *head;
521
522 unsigned long flags;
523 #define NVME_NS_REMOVING 0
524 #define NVME_NS_ANA_PENDING 2
525 #define NVME_NS_FORCE_RO 3
526 #define NVME_NS_READY 4
527
528 struct cdev cdev;
529 struct device cdev_device;
530
531 struct nvme_fault_inject fault_inject;
532 };
533
534 /* NVMe ns supports metadata actions by the controller (generate/strip) */
nvme_ns_has_pi(struct nvme_ns_head * head)535 static inline bool nvme_ns_has_pi(struct nvme_ns_head *head)
536 {
537 return head->pi_type && head->ms == head->pi_size;
538 }
539
540 struct nvme_ctrl_ops {
541 const char *name;
542 struct module *module;
543 unsigned int flags;
544 #define NVME_F_FABRICS (1 << 0)
545 #define NVME_F_METADATA_SUPPORTED (1 << 1)
546 #define NVME_F_BLOCKING (1 << 2)
547
548 const struct attribute_group **dev_attr_groups;
549 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
550 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
551 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
552 void (*free_ctrl)(struct nvme_ctrl *ctrl);
553 void (*submit_async_event)(struct nvme_ctrl *ctrl);
554 void (*delete_ctrl)(struct nvme_ctrl *ctrl);
555 void (*stop_ctrl)(struct nvme_ctrl *ctrl);
556 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
557 void (*print_device_info)(struct nvme_ctrl *ctrl);
558 bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl);
559 };
560
561 /*
562 * nvme command_id is constructed as such:
563 * | xxxx | xxxxxxxxxxxx |
564 * gen request tag
565 */
566 #define nvme_genctr_mask(gen) (gen & 0xf)
567 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12)
568 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12)
569 #define nvme_tag_from_cid(cid) (cid & 0xfff)
570
nvme_cid(struct request * rq)571 static inline u16 nvme_cid(struct request *rq)
572 {
573 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag;
574 }
575
nvme_find_rq(struct blk_mq_tags * tags,u16 command_id)576 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags,
577 u16 command_id)
578 {
579 u8 genctr = nvme_genctr_from_cid(command_id);
580 u16 tag = nvme_tag_from_cid(command_id);
581 struct request *rq;
582
583 rq = blk_mq_tag_to_rq(tags, tag);
584 if (unlikely(!rq)) {
585 pr_err("could not locate request for tag %#x\n",
586 tag);
587 return NULL;
588 }
589 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) {
590 dev_err(nvme_req(rq)->ctrl->device,
591 "request %#x genctr mismatch (got %#x expected %#x)\n",
592 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr));
593 return NULL;
594 }
595 return rq;
596 }
597
nvme_cid_to_rq(struct blk_mq_tags * tags,u16 command_id)598 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags,
599 u16 command_id)
600 {
601 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id));
602 }
603
604 /*
605 * Return the length of the string without the space padding
606 */
nvme_strlen(char * s,int len)607 static inline int nvme_strlen(char *s, int len)
608 {
609 while (s[len - 1] == ' ')
610 len--;
611 return len;
612 }
613
nvme_print_device_info(struct nvme_ctrl * ctrl)614 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl)
615 {
616 struct nvme_subsystem *subsys = ctrl->subsys;
617
618 if (ctrl->ops->print_device_info) {
619 ctrl->ops->print_device_info(ctrl);
620 return;
621 }
622
623 dev_err(ctrl->device,
624 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id,
625 nvme_strlen(subsys->model, sizeof(subsys->model)),
626 subsys->model, nvme_strlen(subsys->firmware_rev,
627 sizeof(subsys->firmware_rev)),
628 subsys->firmware_rev);
629 }
630
631 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
632 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
633 const char *dev_name);
634 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject);
635 void nvme_should_fail(struct request *req);
636 #else
nvme_fault_inject_init(struct nvme_fault_inject * fault_inj,const char * dev_name)637 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
638 const char *dev_name)
639 {
640 }
nvme_fault_inject_fini(struct nvme_fault_inject * fault_inj)641 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj)
642 {
643 }
nvme_should_fail(struct request * req)644 static inline void nvme_should_fail(struct request *req) {}
645 #endif
646
647 bool nvme_wait_reset(struct nvme_ctrl *ctrl);
648 int nvme_try_sched_reset(struct nvme_ctrl *ctrl);
649
nvme_reset_subsystem(struct nvme_ctrl * ctrl)650 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
651 {
652 int ret;
653
654 if (!ctrl->subsystem)
655 return -ENOTTY;
656 if (!nvme_wait_reset(ctrl))
657 return -EBUSY;
658
659 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
660 if (ret)
661 return ret;
662
663 return nvme_try_sched_reset(ctrl);
664 }
665
666 /*
667 * Convert a 512B sector number to a device logical block number.
668 */
nvme_sect_to_lba(struct nvme_ns_head * head,sector_t sector)669 static inline u64 nvme_sect_to_lba(struct nvme_ns_head *head, sector_t sector)
670 {
671 return sector >> (head->lba_shift - SECTOR_SHIFT);
672 }
673
674 /*
675 * Convert a device logical block number to a 512B sector number.
676 */
nvme_lba_to_sect(struct nvme_ns_head * head,u64 lba)677 static inline sector_t nvme_lba_to_sect(struct nvme_ns_head *head, u64 lba)
678 {
679 return lba << (head->lba_shift - SECTOR_SHIFT);
680 }
681
682 /*
683 * Convert byte length to nvme's 0-based num dwords
684 */
nvme_bytes_to_numd(size_t len)685 static inline u32 nvme_bytes_to_numd(size_t len)
686 {
687 return (len >> 2) - 1;
688 }
689
nvme_is_ana_error(u16 status)690 static inline bool nvme_is_ana_error(u16 status)
691 {
692 switch (status & 0x7ff) {
693 case NVME_SC_ANA_TRANSITION:
694 case NVME_SC_ANA_INACCESSIBLE:
695 case NVME_SC_ANA_PERSISTENT_LOSS:
696 return true;
697 default:
698 return false;
699 }
700 }
701
nvme_is_path_error(u16 status)702 static inline bool nvme_is_path_error(u16 status)
703 {
704 /* check for a status code type of 'path related status' */
705 return (status & 0x700) == 0x300;
706 }
707
708 /*
709 * Fill in the status and result information from the CQE, and then figure out
710 * if blk-mq will need to use IPI magic to complete the request, and if yes do
711 * so. If not let the caller complete the request without an indirect function
712 * call.
713 */
nvme_try_complete_req(struct request * req,__le16 status,union nvme_result result)714 static inline bool nvme_try_complete_req(struct request *req, __le16 status,
715 union nvme_result result)
716 {
717 struct nvme_request *rq = nvme_req(req);
718 struct nvme_ctrl *ctrl = rq->ctrl;
719
720 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN))
721 rq->genctr++;
722
723 rq->status = le16_to_cpu(status) >> 1;
724 rq->result = result;
725 /* inject error when permitted by fault injection framework */
726 nvme_should_fail(req);
727 if (unlikely(blk_should_fake_timeout(req->q)))
728 return true;
729 return blk_mq_complete_request_remote(req);
730 }
731
nvme_get_ctrl(struct nvme_ctrl * ctrl)732 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
733 {
734 get_device(ctrl->device);
735 }
736
nvme_put_ctrl(struct nvme_ctrl * ctrl)737 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
738 {
739 put_device(ctrl->device);
740 }
741
nvme_is_aen_req(u16 qid,__u16 command_id)742 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id)
743 {
744 return !qid &&
745 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH;
746 }
747
748 /*
749 * Returns true for sink states that can't ever transition back to live.
750 */
nvme_state_terminal(struct nvme_ctrl * ctrl)751 static inline bool nvme_state_terminal(struct nvme_ctrl *ctrl)
752 {
753 switch (nvme_ctrl_state(ctrl)) {
754 case NVME_CTRL_NEW:
755 case NVME_CTRL_LIVE:
756 case NVME_CTRL_RESETTING:
757 case NVME_CTRL_CONNECTING:
758 return false;
759 case NVME_CTRL_DELETING:
760 case NVME_CTRL_DELETING_NOIO:
761 case NVME_CTRL_DEAD:
762 return true;
763 default:
764 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state);
765 return true;
766 }
767 }
768
769 void nvme_end_req(struct request *req);
770 void nvme_complete_rq(struct request *req);
771 void nvme_complete_batch_req(struct request *req);
772
nvme_complete_batch(struct io_comp_batch * iob,void (* fn)(struct request * rq))773 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob,
774 void (*fn)(struct request *rq))
775 {
776 struct request *req;
777
778 rq_list_for_each(&iob->req_list, req) {
779 fn(req);
780 nvme_complete_batch_req(req);
781 }
782 blk_mq_end_request_batch(iob);
783 }
784
785 blk_status_t nvme_host_path_error(struct request *req);
786 bool nvme_cancel_request(struct request *req, void *data);
787 void nvme_cancel_tagset(struct nvme_ctrl *ctrl);
788 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl);
789 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
790 enum nvme_ctrl_state new_state);
791 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown);
792 int nvme_enable_ctrl(struct nvme_ctrl *ctrl);
793 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
794 const struct nvme_ctrl_ops *ops, unsigned long quirks);
795 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
796 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
797 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
798 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended);
799 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
800 const struct blk_mq_ops *ops, unsigned int cmd_size);
801 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl);
802 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
803 const struct blk_mq_ops *ops, unsigned int nr_maps,
804 unsigned int cmd_size);
805 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl);
806
807 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
808
809 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
810 volatile union nvme_result *res);
811
812 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl);
813 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl);
814 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl);
815 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl);
816 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl);
817 void nvme_sync_queues(struct nvme_ctrl *ctrl);
818 void nvme_sync_io_queues(struct nvme_ctrl *ctrl);
819 void nvme_unfreeze(struct nvme_ctrl *ctrl);
820 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
821 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
822 void nvme_start_freeze(struct nvme_ctrl *ctrl);
823
nvme_req_op(struct nvme_command * cmd)824 static inline enum req_op nvme_req_op(struct nvme_command *cmd)
825 {
826 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
827 }
828
829 #define NVME_QID_ANY -1
830 void nvme_init_request(struct request *req, struct nvme_command *cmd);
831 void nvme_cleanup_cmd(struct request *req);
832 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req);
833 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
834 struct request *req);
835 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
836 bool queue_live, enum nvme_ctrl_state state);
837
nvme_check_ready(struct nvme_ctrl * ctrl,struct request * rq,bool queue_live)838 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
839 bool queue_live)
840 {
841 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
842
843 if (likely(state == NVME_CTRL_LIVE))
844 return true;
845 if (ctrl->ops->flags & NVME_F_FABRICS && state == NVME_CTRL_DELETING)
846 return queue_live;
847 return __nvme_check_ready(ctrl, rq, queue_live, state);
848 }
849
850 /*
851 * NSID shall be unique for all shared namespaces, or if at least one of the
852 * following conditions is met:
853 * 1. Namespace Management is supported by the controller
854 * 2. ANA is supported by the controller
855 * 3. NVM Set are supported by the controller
856 *
857 * In other case, private namespace are not required to report a unique NSID.
858 */
nvme_is_unique_nsid(struct nvme_ctrl * ctrl,struct nvme_ns_head * head)859 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl,
860 struct nvme_ns_head *head)
861 {
862 return head->shared ||
863 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) ||
864 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) ||
865 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS);
866 }
867
868 /*
869 * Flags for __nvme_submit_sync_cmd()
870 */
871 typedef __u32 __bitwise nvme_submit_flags_t;
872
873 enum {
874 /* Insert request at the head of the queue */
875 NVME_SUBMIT_AT_HEAD = (__force nvme_submit_flags_t)(1 << 0),
876 /* Set BLK_MQ_REQ_NOWAIT when allocating request */
877 NVME_SUBMIT_NOWAIT = (__force nvme_submit_flags_t)(1 << 1),
878 /* Set BLK_MQ_REQ_RESERVED when allocating request */
879 NVME_SUBMIT_RESERVED = (__force nvme_submit_flags_t)(1 << 2),
880 /* Retry command when NVME_SC_DNR is not set in the result */
881 NVME_SUBMIT_RETRY = (__force nvme_submit_flags_t)(1 << 3),
882 };
883
884 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
885 void *buf, unsigned bufflen);
886 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
887 union nvme_result *result, void *buffer, unsigned bufflen,
888 int qid, nvme_submit_flags_t flags);
889 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
890 unsigned int dword11, void *buffer, size_t buflen,
891 u32 *result);
892 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
893 unsigned int dword11, void *buffer, size_t buflen,
894 u32 *result);
895 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
896 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
897 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
898 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
899 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
900 void nvme_queue_scan(struct nvme_ctrl *ctrl);
901 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
902 void *log, size_t size, u64 offset);
903 bool nvme_tryget_ns_head(struct nvme_ns_head *head);
904 void nvme_put_ns_head(struct nvme_ns_head *head);
905 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
906 const struct file_operations *fops, struct module *owner);
907 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device);
908 int nvme_ioctl(struct block_device *bdev, blk_mode_t mode,
909 unsigned int cmd, unsigned long arg);
910 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
911 int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode,
912 unsigned int cmd, unsigned long arg);
913 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd,
914 unsigned long arg);
915 long nvme_dev_ioctl(struct file *file, unsigned int cmd,
916 unsigned long arg);
917 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd,
918 struct io_comp_batch *iob, unsigned int poll_flags);
919 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd,
920 unsigned int issue_flags);
921 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd,
922 unsigned int issue_flags);
923 int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid,
924 struct nvme_id_ns **id);
925 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo);
926 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags);
927
928 extern const struct attribute_group *nvme_ns_attr_groups[];
929 extern const struct pr_ops nvme_pr_ops;
930 extern const struct block_device_operations nvme_ns_head_ops;
931 extern const struct attribute_group nvme_dev_attrs_group;
932 extern const struct attribute_group *nvme_subsys_attrs_groups[];
933 extern const struct attribute_group *nvme_dev_attr_groups[];
934 extern const struct block_device_operations nvme_bdev_ops;
935
936 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl);
937 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
938 #ifdef CONFIG_NVME_MULTIPATH
nvme_ctrl_use_ana(struct nvme_ctrl * ctrl)939 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
940 {
941 return ctrl->ana_log_buf != NULL;
942 }
943
944 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys);
945 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys);
946 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys);
947 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys);
948 void nvme_failover_req(struct request *req);
949 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
950 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
951 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid);
952 void nvme_mpath_remove_disk(struct nvme_ns_head *head);
953 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id);
954 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl);
955 void nvme_mpath_update(struct nvme_ctrl *ctrl);
956 void nvme_mpath_uninit(struct nvme_ctrl *ctrl);
957 void nvme_mpath_stop(struct nvme_ctrl *ctrl);
958 bool nvme_mpath_clear_current_path(struct nvme_ns *ns);
959 void nvme_mpath_revalidate_paths(struct nvme_ns *ns);
960 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl);
961 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head);
962 void nvme_mpath_start_request(struct request *rq);
963 void nvme_mpath_end_request(struct request *rq);
964
nvme_trace_bio_complete(struct request * req)965 static inline void nvme_trace_bio_complete(struct request *req)
966 {
967 struct nvme_ns *ns = req->q->queuedata;
968
969 if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio)
970 trace_block_bio_complete(ns->head->disk->queue, req->bio);
971 }
972
973 extern bool multipath;
974 extern struct device_attribute dev_attr_ana_grpid;
975 extern struct device_attribute dev_attr_ana_state;
976 extern struct device_attribute subsys_attr_iopolicy;
977
nvme_disk_is_ns_head(struct gendisk * disk)978 static inline bool nvme_disk_is_ns_head(struct gendisk *disk)
979 {
980 return disk->fops == &nvme_ns_head_ops;
981 }
982 #else
983 #define multipath false
nvme_ctrl_use_ana(struct nvme_ctrl * ctrl)984 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
985 {
986 return false;
987 }
nvme_failover_req(struct request * req)988 static inline void nvme_failover_req(struct request *req)
989 {
990 }
nvme_kick_requeue_lists(struct nvme_ctrl * ctrl)991 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
992 {
993 }
nvme_mpath_alloc_disk(struct nvme_ctrl * ctrl,struct nvme_ns_head * head)994 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
995 struct nvme_ns_head *head)
996 {
997 return 0;
998 }
nvme_mpath_add_disk(struct nvme_ns * ns,__le32 anagrpid)999 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid)
1000 {
1001 }
nvme_mpath_remove_disk(struct nvme_ns_head * head)1002 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
1003 {
1004 }
nvme_mpath_clear_current_path(struct nvme_ns * ns)1005 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns)
1006 {
1007 return false;
1008 }
nvme_mpath_revalidate_paths(struct nvme_ns * ns)1009 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns)
1010 {
1011 }
nvme_mpath_clear_ctrl_paths(struct nvme_ctrl * ctrl)1012 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl)
1013 {
1014 }
nvme_mpath_shutdown_disk(struct nvme_ns_head * head)1015 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head)
1016 {
1017 }
nvme_trace_bio_complete(struct request * req)1018 static inline void nvme_trace_bio_complete(struct request *req)
1019 {
1020 }
nvme_mpath_init_ctrl(struct nvme_ctrl * ctrl)1021 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl)
1022 {
1023 }
nvme_mpath_init_identify(struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)1024 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl,
1025 struct nvme_id_ctrl *id)
1026 {
1027 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA)
1028 dev_warn(ctrl->device,
1029 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n");
1030 return 0;
1031 }
nvme_mpath_update(struct nvme_ctrl * ctrl)1032 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl)
1033 {
1034 }
nvme_mpath_uninit(struct nvme_ctrl * ctrl)1035 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl)
1036 {
1037 }
nvme_mpath_stop(struct nvme_ctrl * ctrl)1038 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl)
1039 {
1040 }
nvme_mpath_unfreeze(struct nvme_subsystem * subsys)1041 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys)
1042 {
1043 }
nvme_mpath_wait_freeze(struct nvme_subsystem * subsys)1044 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys)
1045 {
1046 }
nvme_mpath_start_freeze(struct nvme_subsystem * subsys)1047 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys)
1048 {
1049 }
nvme_mpath_default_iopolicy(struct nvme_subsystem * subsys)1050 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys)
1051 {
1052 }
nvme_mpath_start_request(struct request * rq)1053 static inline void nvme_mpath_start_request(struct request *rq)
1054 {
1055 }
nvme_mpath_end_request(struct request * rq)1056 static inline void nvme_mpath_end_request(struct request *rq)
1057 {
1058 }
nvme_disk_is_ns_head(struct gendisk * disk)1059 static inline bool nvme_disk_is_ns_head(struct gendisk *disk)
1060 {
1061 return false;
1062 }
1063 #endif /* CONFIG_NVME_MULTIPATH */
1064
1065 struct nvme_zone_info {
1066 u64 zone_size;
1067 unsigned int max_open_zones;
1068 unsigned int max_active_zones;
1069 };
1070
1071 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector,
1072 unsigned int nr_zones, report_zones_cb cb, void *data);
1073 int nvme_query_zone_info(struct nvme_ns *ns, unsigned lbaf,
1074 struct nvme_zone_info *zi);
1075 void nvme_update_zone_info(struct nvme_ns *ns, struct queue_limits *lim,
1076 struct nvme_zone_info *zi);
1077 #ifdef CONFIG_BLK_DEV_ZONED
1078 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req,
1079 struct nvme_command *cmnd,
1080 enum nvme_zone_mgmt_action action);
1081 #else
nvme_setup_zone_mgmt_send(struct nvme_ns * ns,struct request * req,struct nvme_command * cmnd,enum nvme_zone_mgmt_action action)1082 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns,
1083 struct request *req, struct nvme_command *cmnd,
1084 enum nvme_zone_mgmt_action action)
1085 {
1086 return BLK_STS_NOTSUPP;
1087 }
1088 #endif
1089
nvme_get_ns_from_dev(struct device * dev)1090 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
1091 {
1092 struct gendisk *disk = dev_to_disk(dev);
1093
1094 WARN_ON(nvme_disk_is_ns_head(disk));
1095 return disk->private_data;
1096 }
1097
1098 #ifdef CONFIG_NVME_HWMON
1099 int nvme_hwmon_init(struct nvme_ctrl *ctrl);
1100 void nvme_hwmon_exit(struct nvme_ctrl *ctrl);
1101 #else
nvme_hwmon_init(struct nvme_ctrl * ctrl)1102 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl)
1103 {
1104 return 0;
1105 }
1106
nvme_hwmon_exit(struct nvme_ctrl * ctrl)1107 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl)
1108 {
1109 }
1110 #endif
1111
nvme_start_request(struct request * rq)1112 static inline void nvme_start_request(struct request *rq)
1113 {
1114 if (rq->cmd_flags & REQ_NVME_MPATH)
1115 nvme_mpath_start_request(rq);
1116 blk_mq_start_request(rq);
1117 }
1118
nvme_ctrl_sgl_supported(struct nvme_ctrl * ctrl)1119 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl)
1120 {
1121 return ctrl->sgls & ((1 << 0) | (1 << 1));
1122 }
1123
1124 #ifdef CONFIG_NVME_HOST_AUTH
1125 int __init nvme_init_auth(void);
1126 void __exit nvme_exit_auth(void);
1127 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl);
1128 void nvme_auth_stop(struct nvme_ctrl *ctrl);
1129 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid);
1130 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid);
1131 void nvme_auth_free(struct nvme_ctrl *ctrl);
1132 #else
nvme_auth_init_ctrl(struct nvme_ctrl * ctrl)1133 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl)
1134 {
1135 return 0;
1136 }
nvme_init_auth(void)1137 static inline int __init nvme_init_auth(void)
1138 {
1139 return 0;
1140 }
nvme_exit_auth(void)1141 static inline void __exit nvme_exit_auth(void)
1142 {
1143 }
nvme_auth_stop(struct nvme_ctrl * ctrl)1144 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {};
nvme_auth_negotiate(struct nvme_ctrl * ctrl,int qid)1145 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid)
1146 {
1147 return -EPROTONOSUPPORT;
1148 }
nvme_auth_wait(struct nvme_ctrl * ctrl,int qid)1149 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid)
1150 {
1151 return -EPROTONOSUPPORT;
1152 }
nvme_auth_free(struct nvme_ctrl * ctrl)1153 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {};
1154 #endif
1155
1156 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
1157 u8 opcode);
1158 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode);
1159 int nvme_execute_rq(struct request *rq, bool at_head);
1160 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects,
1161 struct nvme_command *cmd, int status);
1162 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file);
1163 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid);
1164 bool nvme_get_ns(struct nvme_ns *ns);
1165 void nvme_put_ns(struct nvme_ns *ns);
1166
nvme_multi_css(struct nvme_ctrl * ctrl)1167 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl)
1168 {
1169 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI;
1170 }
1171
1172 #ifdef CONFIG_NVME_VERBOSE_ERRORS
1173 const char *nvme_get_error_status_str(u16 status);
1174 const char *nvme_get_opcode_str(u8 opcode);
1175 const char *nvme_get_admin_opcode_str(u8 opcode);
1176 const char *nvme_get_fabrics_opcode_str(u8 opcode);
1177 #else /* CONFIG_NVME_VERBOSE_ERRORS */
nvme_get_error_status_str(u16 status)1178 static inline const char *nvme_get_error_status_str(u16 status)
1179 {
1180 return "I/O Error";
1181 }
nvme_get_opcode_str(u8 opcode)1182 static inline const char *nvme_get_opcode_str(u8 opcode)
1183 {
1184 return "I/O Cmd";
1185 }
nvme_get_admin_opcode_str(u8 opcode)1186 static inline const char *nvme_get_admin_opcode_str(u8 opcode)
1187 {
1188 return "Admin Cmd";
1189 }
1190
nvme_get_fabrics_opcode_str(u8 opcode)1191 static inline const char *nvme_get_fabrics_opcode_str(u8 opcode)
1192 {
1193 return "Fabrics Cmd";
1194 }
1195 #endif /* CONFIG_NVME_VERBOSE_ERRORS */
1196
nvme_opcode_str(int qid,u8 opcode)1197 static inline const char *nvme_opcode_str(int qid, u8 opcode)
1198 {
1199 return qid ? nvme_get_opcode_str(opcode) :
1200 nvme_get_admin_opcode_str(opcode);
1201 }
1202
nvme_fabrics_opcode_str(int qid,const struct nvme_command * cmd)1203 static inline const char *nvme_fabrics_opcode_str(
1204 int qid, const struct nvme_command *cmd)
1205 {
1206 if (nvme_is_fabrics(cmd))
1207 return nvme_get_fabrics_opcode_str(cmd->fabrics.fctype);
1208
1209 return nvme_opcode_str(qid, cmd->common.opcode);
1210 }
1211 #endif /* _NVME_H */
1212