1 /*
2 * Copyright (c) 2017-2018 Cavium, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
26 */
27
28 #ifndef __BCM_OSAL_ECORE_PACKAGE
29 #define __BCM_OSAL_ECORE_PACKAGE
30
31 #include "qlnx_os.h"
32 #include "ecore_status.h"
33 #include <sys/bitstring.h>
34
35 #include <linux/types.h>
36 #include <linux/bitmap.h>
37
38 #define OSAL_NUM_CPUS() mp_ncpus
39 /*
40 * prototypes of freebsd specific functions required by ecore
41 */
42 extern uint32_t qlnx_pci_bus_get_bar_size(void *ecore_dev, uint8_t bar_id);
43 extern uint32_t qlnx_pci_read_config_byte(void *ecore_dev, uint32_t pci_reg,
44 uint8_t *reg_value);
45 extern uint32_t qlnx_pci_read_config_word(void *ecore_dev, uint32_t pci_reg,
46 uint16_t *reg_value);
47 extern uint32_t qlnx_pci_read_config_dword(void *ecore_dev, uint32_t pci_reg,
48 uint32_t *reg_value);
49 extern void qlnx_pci_write_config_byte(void *ecore_dev, uint32_t pci_reg,
50 uint8_t reg_value);
51 extern void qlnx_pci_write_config_word(void *ecore_dev, uint32_t pci_reg,
52 uint16_t reg_value);
53 extern void qlnx_pci_write_config_dword(void *ecore_dev, uint32_t pci_reg,
54 uint32_t reg_value);
55 extern int qlnx_pci_find_capability(void *ecore_dev, int cap);
56 extern int qlnx_pci_find_ext_capability(void *ecore_dev, int ext_cap);
57
58 extern uint32_t qlnx_direct_reg_rd32(void *p_hwfn, uint32_t *reg_addr);
59 extern void qlnx_direct_reg_wr32(void *p_hwfn, void *reg_addr, uint32_t value);
60 extern void qlnx_direct_reg_wr64(void *p_hwfn, void *reg_addr, uint64_t value);
61
62 extern uint32_t qlnx_reg_rd32(void *p_hwfn, uint32_t reg_addr);
63 extern void qlnx_reg_wr32(void *p_hwfn, uint32_t reg_addr, uint32_t value);
64 extern void qlnx_reg_wr16(void *p_hwfn, uint32_t reg_addr, uint16_t value);
65
66 extern void qlnx_dbell_wr32(void *p_hwfn, uint32_t reg_addr, uint32_t value);
67 extern void qlnx_dbell_wr32_db(void *p_hwfn, void *reg_addr, uint32_t value);
68
69 extern void *qlnx_dma_alloc_coherent(void *ecore_dev, bus_addr_t *phys,
70 uint32_t size);
71 extern void qlnx_dma_free_coherent(void *ecore_dev, void *v_addr,
72 bus_addr_t phys, uint32_t size);
73
74 extern void qlnx_link_update(void *p_hwfn);
75 extern void qlnx_barrier(void *p_hwfn);
76
77 extern void *qlnx_zalloc(uint32_t size);
78
79 extern void qlnx_get_protocol_stats(void *cdev, int proto_type,
80 void *proto_stats);
81
82 extern void qlnx_sp_isr(void *arg);
83
84 extern void qlnx_osal_vf_fill_acquire_resc_req(void *p_hwfn, void *p_resc_req,
85 void *p_sw_info);
86 extern void qlnx_osal_iov_vf_cleanup(void *p_hwfn, uint8_t relative_vf_id);
87 extern int qlnx_iov_chk_ucast(void *p_hwfn, int vfid, void *params);
88 extern int qlnx_iov_update_vport(void *p_hwfn, uint8_t vfid, void *params,
89 uint16_t *tlvs);
90 extern int qlnx_pf_vf_msg(void *p_hwfn, uint16_t relative_vf_id);
91 extern void qlnx_vf_flr_update(void *p_hwfn);
92
93 #define nothing do {} while(0)
94
95 /* Memory Types */
96 #define u8 uint8_t
97 #define u16 uint16_t
98 #define u32 uint32_t
99 #define u64 uint64_t
100 #define s16 uint16_t
101 #define s32 uint32_t
102
103 #ifndef QLNX_RDMA
104
105 static __inline unsigned long
roundup_pow_of_two(unsigned long x)106 roundup_pow_of_two(unsigned long x)
107 {
108 return (1UL << flsl(x - 1));
109 }
110
111 static __inline int
is_power_of_2(unsigned long n)112 is_power_of_2(unsigned long n)
113 {
114 return (n == roundup_pow_of_two(n));
115 }
116
117 static __inline unsigned long
rounddown_pow_of_two(unsigned long x)118 rounddown_pow_of_two(unsigned long x)
119 {
120 return (1UL << (flsl(x) - 1));
121 }
122
123 #define max_t(type, val1, val2) \
124 ((type)(val1) > (type)(val2) ? (type)(val1) : (val2))
125 #define min_t(type, val1, val2) \
126 ((type)(val1) < (type)(val2) ? (type)(val1) : (val2))
127
128 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0]))
129 #define BUILD_BUG_ON(cond) nothing
130
131 #endif /* #ifndef QLNX_RDMA */
132
133 #define OSAL_UNUSED
134
135 #define OSAL_CPU_TO_BE64(val) htobe64(val)
136 #define OSAL_BE64_TO_CPU(val) be64toh(val)
137
138 #define OSAL_CPU_TO_BE32(val) htobe32(val)
139 #define OSAL_BE32_TO_CPU(val) be32toh(val)
140
141 #define OSAL_CPU_TO_LE32(val) htole32(val)
142 #define OSAL_LE32_TO_CPU(val) le32toh(val)
143
144 #define OSAL_CPU_TO_BE16(val) htobe16(val)
145 #define OSAL_BE16_TO_CPU(val) be16toh(val)
146
147 #define OSAL_CPU_TO_LE16(val) htole16(val)
148 #define OSAL_LE16_TO_CPU(val) le16toh(val)
149
150 static __inline uint32_t
qlnx_get_cache_line_size(void)151 qlnx_get_cache_line_size(void)
152 {
153 return (CACHE_LINE_SIZE);
154 }
155
156 #define OSAL_CACHE_LINE_SIZE qlnx_get_cache_line_size()
157
158 #define OSAL_BE32 uint32_t
159 #define dma_addr_t bus_addr_t
160 #define osal_size_t size_t
161
162 typedef struct mtx osal_spinlock_t;
163 typedef struct mtx osal_mutex_t;
164
165 typedef void * osal_dpc_t;
166
167 typedef struct _osal_list_entry_t
168 {
169 struct _osal_list_entry_t *next, *prev;
170 } osal_list_entry_t;
171
172 typedef struct osal_list_t
173 {
174 osal_list_entry_t *head, *tail;
175 unsigned long cnt;
176 } osal_list_t;
177
178 /* OSAL functions */
179
180 #define OSAL_UDELAY(time) DELAY(time)
181 #define OSAL_MSLEEP(time) qlnx_mdelay(__func__, time)
182
183 #define OSAL_ALLOC(dev, GFP, size) qlnx_zalloc(size)
184 #define OSAL_ZALLOC(dev, GFP, size) qlnx_zalloc(size)
185 #define OSAL_VALLOC(dev, size) qlnx_zalloc(size)
186 #define OSAL_VZALLOC(dev, size) qlnx_zalloc(size)
187
188 #define OSAL_FREE(dev, memory) free(memory, M_QLNXBUF)
189 #define OSAL_VFREE(dev, memory) free(memory, M_QLNXBUF)
190
191 #define OSAL_MEM_ZERO(mem, size) bzero(mem, size)
192
193 #define OSAL_MEMCPY(dst, src, size) memcpy(dst, src, size)
194
195 #define OSAL_DMA_ALLOC_COHERENT(dev, phys, size) \
196 qlnx_dma_alloc_coherent(dev, phys, size)
197
198 #define OSAL_DMA_FREE_COHERENT(dev, virt, phys, size) \
199 qlnx_dma_free_coherent(dev, virt, phys, size)
200 #define OSAL_VF_CQE_COMPLETION(_dev_p, _cqe, _protocol) (0)
201
202 #define REG_WR(hwfn, addr, val) qlnx_reg_wr32(hwfn, addr, val)
203 #define REG_WR16(hwfn, addr, val) qlnx_reg_wr16(hwfn, addr, val)
204 #define DIRECT_REG_WR(p_hwfn, addr, value) qlnx_direct_reg_wr32(p_hwfn, addr, value)
205 #define DIRECT_REG_WR64(p_hwfn, addr, value) \
206 qlnx_direct_reg_wr64(p_hwfn, addr, value)
207 #define DIRECT_REG_WR_DB(p_hwfn, addr, value) qlnx_dbell_wr32_db(p_hwfn, addr, value)
208 #define DIRECT_REG_RD(p_hwfn, addr) qlnx_direct_reg_rd32(p_hwfn, addr)
209 #define REG_RD(hwfn, addr) qlnx_reg_rd32(hwfn, addr)
210 #define DOORBELL(hwfn, addr, value) \
211 qlnx_dbell_wr32(hwfn, addr, value)
212
213 #define OSAL_SPIN_LOCK_ALLOC(p_hwfn, mutex)
214 #define OSAL_SPIN_LOCK_DEALLOC(mutex) mtx_destroy(mutex)
215 #define OSAL_SPIN_LOCK_INIT(lock) {\
216 mtx_init(lock, __func__, MTX_NETWORK_LOCK, MTX_SPIN); \
217 }
218
219 #define OSAL_SPIN_UNLOCK(lock) {\
220 mtx_unlock(lock); \
221 }
222 #define OSAL_SPIN_LOCK(lock) {\
223 mtx_lock(lock); \
224 }
225
226 #define OSAL_MUTEX_ALLOC(p_hwfn, mutex)
227 #define OSAL_MUTEX_DEALLOC(mutex) mtx_destroy(mutex)
228 #define OSAL_MUTEX_INIT(lock) {\
229 mtx_init(lock, __func__, MTX_NETWORK_LOCK, MTX_DEF);\
230 }
231
232 #define OSAL_MUTEX_ACQUIRE(lock) mtx_lock(lock)
233 #define OSAL_MUTEX_RELEASE(lock) mtx_unlock(lock)
234
235 #define OSAL_DPC_ALLOC(hwfn) malloc(PAGE_SIZE, M_QLNXBUF, M_NOWAIT)
236 #define OSAL_DPC_INIT(dpc, hwfn) nothing
237 extern void qlnx_schedule_recovery(void *p_hwfn);
238 #define OSAL_SCHEDULE_RECOVERY_HANDLER(x) do {qlnx_schedule_recovery(x);} while(0)
239 #define OSAL_HW_ERROR_OCCURRED(hwfn, err_type) nothing
240 #define OSAL_DPC_SYNC(hwfn) nothing
241
OSAL_DCBX_AEN(void * p_hwfn,u32 mib_type)242 static inline void OSAL_DCBX_AEN(void *p_hwfn, u32 mib_type)
243 {
244 return;
245 }
246
OSAL_NVM_IS_ACCESS_ENABLED(void * p_hwfn)247 static inline bool OSAL_NVM_IS_ACCESS_ENABLED(void *p_hwfn)
248 {
249 return 1;
250 }
251
252 #define OSAL_LIST_INIT(list) \
253 do { \
254 (list)->head = NULL; \
255 (list)->tail = NULL; \
256 (list)->cnt = 0; \
257 } while (0)
258
259 #define OSAL_LIST_INSERT_ENTRY_AFTER(entry, entry_prev, list) \
260 do { \
261 (entry)->prev = (entry_prev); \
262 (entry)->next = (entry_prev)->next; \
263 (entry)->next->prev = (entry); \
264 (entry_prev)->next = (entry); \
265 (list)->cnt++; \
266 } while (0);
267
268 #define OSAL_LIST_SPLICE_TAIL_INIT(new_list, list) \
269 do { \
270 ((new_list)->tail)->next = ((list)->head); \
271 ((list)->head)->prev = ((new_list)->tail); \
272 (list)->head = (new_list)->head; \
273 (list)->cnt = (list)->cnt + (new_list)->cnt; \
274 OSAL_LIST_INIT(new_list); \
275 } while (0);
276
277 #define OSAL_LIST_PUSH_HEAD(entry, list) \
278 do { \
279 (entry)->prev = (osal_list_entry_t *)0; \
280 (entry)->next = (list)->head; \
281 if ((list)->tail == (osal_list_entry_t *)0) { \
282 (list)->tail = (entry); \
283 } else { \
284 (list)->head->prev = (entry); \
285 } \
286 (list)->head = (entry); \
287 (list)->cnt++; \
288 } while (0)
289
290 #define OSAL_LIST_PUSH_TAIL(entry, list) \
291 do { \
292 (entry)->next = (osal_list_entry_t *)0; \
293 (entry)->prev = (list)->tail; \
294 if ((list)->tail) { \
295 (list)->tail->next = (entry); \
296 } else { \
297 (list)->head = (entry); \
298 } \
299 (list)->tail = (entry); \
300 (list)->cnt++; \
301 } while (0)
302
303 #define OSAL_LIST_FIRST_ENTRY(list, type, field) \
304 (type *)((list)->head)
305
306 #define OSAL_LIST_REMOVE_ENTRY(entry, list) \
307 do { \
308 if ((list)->head == (entry)) { \
309 if ((list)->head) { \
310 (list)->head = (list)->head->next; \
311 if ((list)->head) { \
312 (list)->head->prev = (osal_list_entry_t *)0; \
313 } else { \
314 (list)->tail = (osal_list_entry_t *)0; \
315 } \
316 (list)->cnt--; \
317 } \
318 } else if ((list)->tail == (entry)) { \
319 if ((list)->tail) { \
320 (list)->tail = (list)->tail->prev; \
321 if ((list)->tail) { \
322 (list)->tail->next = (osal_list_entry_t *)0; \
323 } else { \
324 (list)->head = (osal_list_entry_t *)0; \
325 } \
326 (list)->cnt--; \
327 } \
328 } else { \
329 (entry)->prev->next = (entry)->next; \
330 (entry)->next->prev = (entry)->prev; \
331 (list)->cnt--; \
332 } \
333 } while (0)
334
335 #define OSAL_LIST_IS_EMPTY(list) \
336 ((list)->cnt == 0)
337
338 #define OSAL_LIST_NEXT(entry, field, type) \
339 (type *)((&((entry)->field))->next)
340
341 #define OSAL_LIST_FOR_EACH_ENTRY(entry, list, field, type) \
342 for (entry = OSAL_LIST_FIRST_ENTRY(list, type, field); \
343 entry; \
344 entry = OSAL_LIST_NEXT(entry, field, type))
345
346 #define OSAL_LIST_FOR_EACH_ENTRY_SAFE(entry, tmp_entry, list, field, type) \
347 for (entry = OSAL_LIST_FIRST_ENTRY(list, type, field), \
348 tmp_entry = (entry) ? OSAL_LIST_NEXT(entry, field, type) : NULL; \
349 entry != NULL; \
350 entry = (type *)tmp_entry, \
351 tmp_entry = (entry) ? OSAL_LIST_NEXT(entry, field, type) : NULL)
352
353 #define OSAL_BAR_SIZE(dev, bar_id) qlnx_pci_bus_get_bar_size(dev, bar_id)
354
355 #define OSAL_PCI_READ_CONFIG_BYTE(dev, reg, value) \
356 qlnx_pci_read_config_byte(dev, reg, value);
357 #define OSAL_PCI_READ_CONFIG_WORD(dev, reg, value) \
358 qlnx_pci_read_config_word(dev, reg, value);
359 #define OSAL_PCI_READ_CONFIG_DWORD(dev, reg, value) \
360 qlnx_pci_read_config_dword(dev, reg, value);
361
362 #define OSAL_PCI_WRITE_CONFIG_BYTE(dev, reg, value) \
363 qlnx_pci_write_config_byte(dev, reg, value);
364 #define OSAL_PCI_WRITE_CONFIG_WORD(dev, reg, value) \
365 qlnx_pci_write_config_word(dev, reg, value);
366 #define OSAL_PCI_WRITE_CONFIG_DWORD(dev, reg, value) \
367 qlnx_pci_write_config_dword(dev, reg, value);
368
369 #define OSAL_PCI_FIND_CAPABILITY(dev, cap) qlnx_pci_find_capability(dev, cap)
370 #define OSAL_PCI_FIND_EXT_CAPABILITY(dev, ext_cap) \
371 qlnx_pci_find_ext_capability(dev, ext_cap)
372
373 #define OSAL_MMIOWB(dev) qlnx_barrier(dev)
374 #define OSAL_BARRIER(dev) qlnx_barrier(dev)
375
376 #define OSAL_SMP_MB(dev) mb()
377 #define OSAL_SMP_RMB(dev) rmb()
378 #define OSAL_SMP_WMB(dev) wmb()
379 #define OSAL_RMB(dev) rmb()
380 #define OSAL_WMB(dev) wmb()
381 #define OSAL_DMA_SYNC(dev, addr, length, is_post)
382
383 #define OSAL_FIND_FIRST_BIT find_first_bit
384 #define OSAL_SET_BIT(bit, bitmap) bit_set((bitstr_t *)bitmap, bit)
385 #define OSAL_CLEAR_BIT(bit, bitmap) bit_clear((bitstr_t *)bitmap, bit)
386 #define OSAL_TEST_BIT(bit, bitmap) bit_test((bitstr_t *)bitmap, bit)
387 #define OSAL_FIND_FIRST_ZERO_BIT(bitmap, length) \
388 find_first_zero_bit(bitmap, length)
389
390 #define OSAL_LINK_UPDATE(hwfn, ptt) qlnx_link_update(hwfn)
391
392 #define QLNX_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
393 #define QLNX_ROUNDUP(x, y) ((((x) + ((y) - 1)) / (y)) * (y))
394
395 #define OSAL_NUM_ACTIVE_CPU() mp_ncpus
396
397 #ifndef DIV_ROUND_UP
398 #define DIV_ROUND_UP(size, to_what) QLNX_DIV_ROUND_UP((size), (to_what))
399 #endif
400
401 #define ROUNDUP(value, to_what) QLNX_ROUNDUP((value), (to_what))
402
403 #define OSAL_ROUNDUP_POW_OF_TWO(val) roundup_pow_of_two((val))
404
405 static __inline uint32_t
qlnx_log2(uint32_t x)406 qlnx_log2(uint32_t x)
407 {
408 uint32_t log = 0;
409
410 while (x >>= 1) log++;
411
412 return (log);
413 }
414
415 #define OSAL_LOG2(val) qlnx_log2(val)
416 #define OFFSETOF(str, field) offsetof(str, field)
417 #define PRINT device_printf
418 #define PRINT_ERR device_printf
419 #define OSAL_ASSERT(is_assert) nothing
420 #define OSAL_BEFORE_PF_START(cdev, my_id) {};
421 #define OSAL_AFTER_PF_STOP(cdev, my_id) {};
422
423 #define INLINE __inline
424 #define OSAL_INLINE __inline
425 #define OSAL_UNLIKELY
426 #define OSAL_NULL NULL
427
428 #define OSAL_MAX_T(type, __max1, __max2) max_t(type, __max1, __max2)
429 #define OSAL_MIN_T(type, __max1, __max2) min_t(type, __max1, __max2)
430
431 #define __iomem
432 #define OSAL_IOMEM
433
434 #define int_ptr_t void *
435 #define osal_int_ptr_t void *
436 #define OSAL_BUILD_BUG_ON(cond) nothing
437 #define REG_ADDR(hwfn, offset) (void *)((u8 *)(hwfn->regview) + (offset))
438 #define OSAL_REG_ADDR(hwfn, offset) (void *)((u8 *)(hwfn->regview) + (offset))
439
440 #define OSAL_PAGE_SIZE PAGE_SIZE
441
442 #define OSAL_STRCPY(dst, src) strcpy(dst, src)
443 #define OSAL_STRNCPY(dst, src, bytes) strncpy(dst, src, bytes)
444 #define OSAL_STRLEN(src) strlen(src)
445 #define OSAL_SPRINTF sprintf
446 #define OSAL_SNPRINTF snprintf
447 #define OSAL_MEMSET memset
448 #define OSAL_ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0]))
449 #define osal_uintptr_t u64
450
451 #define OSAL_SLOWPATH_IRQ_REQ(p_hwfn) (0)
452 #define OSAL_GET_PROTOCOL_STATS(p_hwfn, type, stats) \
453 qlnx_get_protocol_stats(p_hwfn, type, stats);
454 #define OSAL_POLL_MODE_DPC(hwfn) {if (cold) qlnx_sp_isr(hwfn);}
455 #define OSAL_WARN(cond, fmt, args...) \
456 if (cond) printf("%s: WARNING: " fmt, __func__, ## args);
457
458 #define OSAL_BITMAP_WEIGHT(bitmap, nbits) bitmap_weight(bitmap, nbits)
459 #define OSAL_GET_RDMA_SB_ID(p_hwfn, cnq_id) ecore_rdma_get_sb_id(p_hwfn, cnq_id)
460
461 static inline int
qlnx_test_and_change_bit(long bit,volatile unsigned long * var)462 qlnx_test_and_change_bit(long bit, volatile unsigned long *var)
463 {
464 long val;
465
466 var += BIT_WORD(bit);
467 bit %= BITS_PER_LONG;
468 bit = (1UL << bit);
469
470 val = *var;
471
472 if (val & bit)
473 return (test_and_clear_bit(bit, var));
474
475 return (test_and_set_bit(bit, var));
476 }
477
478 #define OSAL_TEST_AND_FLIP_BIT qlnx_test_and_change_bit
479 #define OSAL_TEST_AND_CLEAR_BIT test_and_clear_bit
480 #define OSAL_MEMCMP memcmp
481 #define OSAL_SPIN_LOCK_IRQSAVE(x, y) { (void)y; mtx_lock(x); }
482 #define OSAL_SPIN_UNLOCK_IRQSAVE(x, y) { (void)y; mtx_unlock(x); }
483
484 static inline u32
OSAL_CRC32(u32 crc,u8 * ptr,u32 length)485 OSAL_CRC32(u32 crc, u8 *ptr, u32 length)
486 {
487 int i;
488
489 while (length--) {
490 crc ^= *ptr++;
491 for (i = 0; i < 8; i++)
492 crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0);
493 }
494 return crc;
495 }
496
497 static inline void
OSAL_CRC8_POPULATE(u8 * cdu_crc8_table,u8 polynomial)498 OSAL_CRC8_POPULATE(u8 * cdu_crc8_table, u8 polynomial)
499 {
500 return;
501 }
502
503 static inline u8
OSAL_CRC8(u8 * cdu_crc8_table,u8 * data_to_crc,int data_to_crc_len,u8 init_value)504 OSAL_CRC8(u8 * cdu_crc8_table, u8 * data_to_crc, int data_to_crc_len, u8 init_value)
505 {
506 return ECORE_NOTIMPL;
507 }
508
509 #define OSAL_HW_INFO_CHANGE(p_hwfn, offset)
510 #define OSAL_MFW_TLV_REQ(p_hwfn)
511 #define OSAL_LLDP_RX_TLVS(p_hwfn, buffer, len)
512 #define OSAL_MFW_CMD_PREEMPT(p_hwfn)
513 #define OSAL_TRANSCEIVER_UPDATE(p_hwfn)
514 #define OSAL_MFW_FILL_TLV_DATA(p_hwfn, group, data) (0)
515
516 #define OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, res) (0)
517
518 #define OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, req, vf_sw_info) \
519 qlnx_osal_vf_fill_acquire_resc_req(p_hwfn, req, vf_sw_info)
520
521 #define OSAL_IOV_PF_RESP_TYPE(p_hwfn, relative_vf_id, status)
522 #define OSAL_IOV_VF_CLEANUP(p_hwfn, relative_vf_id) \
523 qlnx_osal_iov_vf_cleanup(p_hwfn, relative_vf_id)
524
525 #define OSAL_IOV_VF_ACQUIRE(p_hwfn, relative_vf_id) ECORE_SUCCESS
526 #define OSAL_IOV_GET_OS_TYPE() VFPF_ACQUIRE_OS_FREEBSD
527 #define OSAL_IOV_PRE_START_VPORT(p_hwfn, relative_vf_id, params) ECORE_SUCCESS
528 #define OSAL_IOV_POST_START_VPORT(p_hwfn, relative_vf_id, vport_id, opaque_fid)
529 #define OSAL_PF_VALIDATE_MODIFY_TUNN_CONFIG(p_hwfn, x, y, z) ECORE_SUCCESS
530 #define OSAL_IOV_CHK_UCAST(p_hwfn, vfid, params) \
531 qlnx_iov_chk_ucast(p_hwfn, vfid, params);
532 #define OSAL_PF_VF_MALICIOUS(p_hwfn, relative_vf_id)
533 #define OSAL_IOV_VF_MSG_TYPE(p_hwfn, relative_vf_id, type)
534 #define OSAL_IOV_VF_VPORT_UPDATE(p_hwfn, vfid, params, tlvs) \
535 qlnx_iov_update_vport(p_hwfn, vfid, params, tlvs)
536 #define OSAL_PF_VF_MSG(p_hwfn, relative_vf_id) \
537 qlnx_pf_vf_msg(p_hwfn, relative_vf_id)
538
539 #define OSAL_VF_FLR_UPDATE(p_hwfn) qlnx_vf_flr_update(p_hwfn)
540 #define OSAL_IOV_VF_VPORT_STOP(p_hwfn, vf)
541
542 #endif /* #ifdef __BCM_OSAL_ECORE_PACKAGE */
543