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Searched defs:PB0_GLB_SCI_STAT_OVRD_REG3__FREQDIV_9__SHIFT (Results 1 – 3 of 3) sorted by path

/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h737 #define PB0_GLB_SCI_STAT_OVRD_REG3__FREQDIV_9__SHIFT 0x00000016 macro
H A Dbif_4_1_sh_mask.h3674 #define PB0_GLB_SCI_STAT_OVRD_REG3__FREQDIV_9__SHIFT 0x16 macro
H A Dbif_5_0_sh_mask.h4124 #define PB0_GLB_SCI_STAT_OVRD_REG3__FREQDIV_9__SHIFT 0x16 macro