PB0_PIF_SC_CTL__SC_ENTER_L1_FROM_L0S_MASK (definition) in projects: dragonfly

Searched defs:PB0_PIF_SC_CTL__SC_ENTER_L1_FROM_L0S_MASK (Results 1 – 2 of 2) sorted by path

/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A D	bif_3_0_sh_mask.h	`1384 #define PB0_PIF_SC_CTL__SC_ENTER_L1_FROM_L0S_MASK 0x00000010L macro`
H A D	bif_4_1_sh_mask.h	`8307 #define PB0_PIF_SC_CTL__SC_ENTER_L1_FROM_L0S_MASK 0x10 macro`