Home
last modified time | relevance | path

Searched defs:PB0_PLL_RO_GLB_CTRL_REG0__PLL_RO_PWRON_LUT_ENTRY_LS2_MASK (Results 1 – 3 of 3) sorted by last modified time

/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_5_0_sh_mask.h4443 #define PB0_PLL_RO_GLB_CTRL_REG0__PLL_RO_PWRON_LUT_ENTRY_LS2_MASK 0x80 macro
H A Dbif_3_0_sh_mask.h1944 #define PB0_PLL_RO_GLB_CTRL_REG0__PLL_RO_PWRON_LUT_ENTRY_LS2_MASK 0x00000080L macro
H A Dbif_4_1_sh_mask.h3953 #define PB0_PLL_RO_GLB_CTRL_REG0__PLL_RO_PWRON_LUT_ENTRY_LS2_MASK 0x80 macro