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Searched defs:PB0_TX_LANE2_SCI_STAT_OVRD_REG0__TXPWR_2__SHIFT (Results 1 – 3 of 3) sorted by last modified time

/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_5_0_sh_mask.h5822 #define PB0_TX_LANE2_SCI_STAT_OVRD_REG0__TXPWR_2__SHIFT 0x0 macro
H A Dbif_3_0_sh_mask.h3301 #define PB0_TX_LANE2_SCI_STAT_OVRD_REG0__TXPWR_2__SHIFT 0x00000000 macro
H A Dbif_4_1_sh_mask.h5288 #define PB0_TX_LANE2_SCI_STAT_OVRD_REG0__TXPWR_2__SHIFT 0x0 macro