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Searched defs:PB1_GLB_OVRD_REG1__TXPUTERM_VAL_OVRD_EN__SHIFT (Results 1 – 3 of 3) sorted by path

/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h3687 #define PB1_GLB_OVRD_REG1__TXPUTERM_VAL_OVRD_EN__SHIFT 0x00000001 macro
H A Dbif_4_1_sh_mask.h6008 #define PB1_GLB_OVRD_REG1__TXPUTERM_VAL_OVRD_EN__SHIFT 0x1 macro
H A Dbif_5_0_sh_mask.h6514 #define PB1_GLB_OVRD_REG1__TXPUTERM_VAL_OVRD_EN__SHIFT 0x1 macro