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Searched defs:PB1_PIF_CNTL__PHY_CR_EN_MODE_MASK (Results 1 – 2 of 2) sorted by path

/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h3956 #define PB1_PIF_CNTL__PHY_CR_EN_MODE_MASK 0x00000004L macro
H A Dbif_4_1_sh_mask.h9059 #define PB1_PIF_CNTL__PHY_CR_EN_MODE_MASK 0x4 macro