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Searched defs:PCIE_CNTL2__TX_NP_MEM_WRITE_SWP_ENCODING__SHIFT (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_5_0_sh_mask.h2624 #define PCIE_CNTL2__TX_NP_MEM_WRITE_SWP_ENCODING__SHIFT 0xc macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_sh_mask.h74145 #define PCIE_CNTL2__TX_NP_MEM_WRITE_SWP_ENCODING__SHIFT … macro
H A Dnbio_6_1_sh_mask.h38768 #define PCIE_CNTL2__TX_NP_MEM_WRITE_SWP_ENCODING__SHIFT … macro