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Searched defs:PCIE_CONFIG_CNTL__CI_PRIV_MAX_READ_REQUEST_SIZE_MASK (Results 1 – 6 of 6) sorted by last modified time

/dragonfly/sys/dev/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_sh_mask.h74114 #define PCIE_CONFIG_CNTL__CI_PRIV_MAX_READ_REQUEST_SIZE_MASK … macro
H A Dnbio_6_1_sh_mask.h38737 #define PCIE_CONFIG_CNTL__CI_PRIV_MAX_READ_REQUEST_SIZE_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_5_1_sh_mask.h2961 #define PCIE_CONFIG_CNTL__CI_PRIV_MAX_READ_REQUEST_SIZE_MASK 0xe00000 macro
H A Dbif_5_0_sh_mask.h2571 #define PCIE_CONFIG_CNTL__CI_PRIV_MAX_READ_REQUEST_SIZE_MASK 0xe00000 macro
H A Dbif_3_0_sh_mask.h6700 #define PCIE_CONFIG_CNTL__CI_PRIV_MAX_READ_REQUEST_SIZE_MASK 0x00e00000L macro
H A Dbif_4_1_sh_mask.h2005 #define PCIE_CONFIG_CNTL__CI_PRIV_MAX_READ_REQUEST_SIZE_MASK 0xe00000 macro