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Searched defs:PCIE_PERF_CNTL_SLV_R_CLK__EVENT0_SEL__SHIFT (Results 1 – 6 of 6) sorted by path

/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h7437 #define PCIE_PERF_CNTL_SLV_R_CLK__EVENT0_SEL__SHIFT 0x00000000 macro
H A Dbif_4_1_sh_mask.h2382 #define PCIE_PERF_CNTL_SLV_R_CLK__EVENT0_SEL__SHIFT 0x0 macro
H A Dbif_5_0_sh_mask.h2994 #define PCIE_PERF_CNTL_SLV_R_CLK__EVENT0_SEL__SHIFT 0x0 macro
H A Dbif_5_1_sh_mask.h3338 #define PCIE_PERF_CNTL_SLV_R_CLK__EVENT0_SEL__SHIFT 0x0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/nbio/
H A Dnbio_6_1_sh_mask.h39214 #define PCIE_PERF_CNTL_SLV_R_CLK__EVENT0_SEL__SHIFT … macro
H A Dnbio_7_0_sh_mask.h74623 #define PCIE_PERF_CNTL_SLV_R_CLK__EVENT0_SEL__SHIFT … macro