1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Lennart Augustsson (augustss@carlstedt.se) at
9 * Carlstedt Research & Technology.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #include <sys/cdefs.h>
34 /*
35 * USB Open Host Controller driver.
36 *
37 * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf
38 */
39
40 /* The low level controller code for OHCI has been split into
41 * PCI probes and OHCI specific code. This was done to facilitate the
42 * sharing of code between *BSD's
43 */
44
45 #include <sys/stdint.h>
46 #include <sys/stddef.h>
47 #include <sys/param.h>
48 #include <sys/queue.h>
49 #include <sys/types.h>
50 #include <sys/systm.h>
51 #include <sys/kernel.h>
52 #include <sys/bus.h>
53 #include <sys/module.h>
54 #include <sys/lock.h>
55 #include <sys/mutex.h>
56 #include <sys/condvar.h>
57 #include <sys/sysctl.h>
58 #include <sys/sx.h>
59 #include <sys/unistd.h>
60 #include <sys/callout.h>
61 #include <sys/malloc.h>
62 #include <sys/priv.h>
63
64 #include <dev/usb/usb.h>
65 #include <dev/usb/usbdi.h>
66
67 #include <dev/usb/usb_core.h>
68 #include <dev/usb/usb_busdma.h>
69 #include <dev/usb/usb_process.h>
70 #include <dev/usb/usb_util.h>
71
72 #include <dev/usb/usb_controller.h>
73 #include <dev/usb/usb_bus.h>
74 #include <dev/usb/usb_pci.h>
75 #include <dev/usb/controller/ohci.h>
76 #include <dev/usb/controller/ohcireg.h>
77 #include "usb_if.h"
78
79 #define PCI_OHCI_VENDORID_ACERLABS 0x10b9
80 #define PCI_OHCI_VENDORID_AMD 0x1022
81 #define PCI_OHCI_VENDORID_APPLE 0x106b
82 #define PCI_OHCI_VENDORID_ATI 0x1002
83 #define PCI_OHCI_VENDORID_CMDTECH 0x1095
84 #define PCI_OHCI_VENDORID_HYGON 0x1d94
85 #define PCI_OHCI_VENDORID_NEC 0x1033
86 #define PCI_OHCI_VENDORID_NVIDIA 0x12D2
87 #define PCI_OHCI_VENDORID_NVIDIA2 0x10DE
88 #define PCI_OHCI_VENDORID_OPTI 0x1045
89 #define PCI_OHCI_VENDORID_SIS 0x1039
90
91 #define PCI_OHCI_BASE_REG 0x10
92
93 static device_probe_t ohci_pci_probe;
94 static device_attach_t ohci_pci_attach;
95 static device_detach_t ohci_pci_detach;
96 static usb_take_controller_t ohci_pci_take_controller;
97
98 static int
ohci_pci_take_controller(device_t self)99 ohci_pci_take_controller(device_t self)
100 {
101 uint32_t reg;
102 uint32_t int_line;
103
104 if (pci_get_powerstate(self) != PCI_POWERSTATE_D0) {
105 device_printf(self, "chip is in D%d mode "
106 "-- setting to D0\n", pci_get_powerstate(self));
107 reg = pci_read_config(self, PCI_CBMEM, 4);
108 int_line = pci_read_config(self, PCIR_INTLINE, 4);
109 pci_set_powerstate(self, PCI_POWERSTATE_D0);
110 pci_write_config(self, PCI_CBMEM, reg, 4);
111 pci_write_config(self, PCIR_INTLINE, int_line, 4);
112 }
113 return (0);
114 }
115
116 static const char *
ohci_pci_match(device_t self)117 ohci_pci_match(device_t self)
118 {
119 uint32_t device_id = pci_get_devid(self);
120
121 switch (device_id) {
122 case 0x523710b9:
123 return ("AcerLabs M5237 (Aladdin-V) USB controller");
124
125 case 0x740c1022:
126 return ("AMD-756 USB Controller");
127 case 0x74141022:
128 return ("AMD-766 USB Controller");
129 case 0x78071022:
130 return ("AMD FCH USB Controller");
131
132 case 0x43741002:
133 return "ATI SB400 USB Controller";
134 case 0x43751002:
135 return "ATI SB400 USB Controller";
136 case 0x43971002:
137 return ("AMD SB7x0/SB8x0/SB9x0 USB controller");
138 case 0x43981002:
139 return ("AMD SB7x0/SB8x0/SB9x0 USB controller");
140 case 0x43991002:
141 return ("AMD SB7x0/SB8x0/SB9x0 USB controller");
142
143 case 0x06701095:
144 return ("CMD Tech 670 (USB0670) USB controller");
145
146 case 0x06731095:
147 return ("CMD Tech 673 (USB0673) USB controller");
148
149 case 0xc8611045:
150 return ("OPTi 82C861 (FireLink) USB controller");
151
152 case 0x00351033:
153 return ("NEC uPD 9210 USB controller");
154
155 case 0x00d710de:
156 return ("nVidia nForce3 USB Controller");
157
158 case 0x005a10de:
159 return ("nVidia nForce CK804 USB Controller");
160 case 0x036c10de:
161 return ("nVidia nForce MCP55 USB Controller");
162 case 0x03f110de:
163 return ("nVidia nForce MCP61 USB Controller");
164 case 0x0aa510de:
165 return ("nVidia nForce MCP79 USB Controller");
166 case 0x0aa710de:
167 return ("nVidia nForce MCP79 USB Controller");
168 case 0x0aa810de:
169 return ("nVidia nForce MCP79 USB Controller");
170
171 case 0x70011039:
172 return ("SiS 5571 USB controller");
173
174 case 0x0019106b:
175 return ("Apple KeyLargo USB controller");
176 case 0x003f106b:
177 return ("Apple KeyLargo/Intrepid USB controller");
178
179 default:
180 break;
181 }
182 if ((pci_get_class(self) == PCIC_SERIALBUS) &&
183 (pci_get_subclass(self) == PCIS_SERIALBUS_USB) &&
184 (pci_get_progif(self) == PCI_INTERFACE_OHCI)) {
185 return ("OHCI (generic) USB controller");
186 }
187 return (NULL);
188 }
189
190 static int
ohci_pci_probe(device_t self)191 ohci_pci_probe(device_t self)
192 {
193 const char *desc = ohci_pci_match(self);
194
195 if (desc) {
196 device_set_desc(self, desc);
197 return (0);
198 } else {
199 return (ENXIO);
200 }
201 }
202
203 static int
ohci_pci_attach(device_t self)204 ohci_pci_attach(device_t self)
205 {
206 ohci_softc_t *sc = device_get_softc(self);
207 int rid;
208 int err;
209
210 /* initialise some bus fields */
211 sc->sc_bus.parent = self;
212 sc->sc_bus.devices = sc->sc_devices;
213 sc->sc_bus.devices_max = OHCI_MAX_DEVICES;
214 sc->sc_bus.dma_bits = 32;
215
216 /* get all DMA memory */
217 if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(self),
218 &ohci_iterate_hw_softc)) {
219 return (ENOMEM);
220 }
221 sc->sc_dev = self;
222
223 pci_enable_busmaster(self);
224
225 rid = PCI_CBMEM;
226 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
227 RF_ACTIVE);
228 if (!sc->sc_io_res) {
229 device_printf(self, "Could not map memory\n");
230 goto error;
231 }
232 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
233 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
234 sc->sc_io_size = rman_get_size(sc->sc_io_res);
235
236 rid = 0;
237 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
238 RF_SHAREABLE | RF_ACTIVE);
239 if (sc->sc_irq_res == NULL) {
240 device_printf(self, "Could not allocate irq\n");
241 goto error;
242 }
243 sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
244 if (!sc->sc_bus.bdev) {
245 device_printf(self, "Could not add USB device\n");
246 goto error;
247 }
248 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
249
250 /*
251 * ohci_pci_match will never return NULL if ohci_pci_probe
252 * succeeded
253 */
254 device_set_desc(sc->sc_bus.bdev, ohci_pci_match(self));
255 switch (pci_get_vendor(self)) {
256 case PCI_OHCI_VENDORID_ACERLABS:
257 sprintf(sc->sc_vendor, "AcerLabs");
258 break;
259 case PCI_OHCI_VENDORID_AMD:
260 sprintf(sc->sc_vendor, "AMD");
261 break;
262 case PCI_OHCI_VENDORID_APPLE:
263 sprintf(sc->sc_vendor, "Apple");
264 break;
265 case PCI_OHCI_VENDORID_ATI:
266 sprintf(sc->sc_vendor, "ATI");
267 break;
268 case PCI_OHCI_VENDORID_CMDTECH:
269 sprintf(sc->sc_vendor, "CMDTECH");
270 break;
271 case PCI_OHCI_VENDORID_HYGON:
272 sprintf(sc->sc_vendor, "Hygon");
273 break;
274 case PCI_OHCI_VENDORID_NEC:
275 sprintf(sc->sc_vendor, "NEC");
276 break;
277 case PCI_OHCI_VENDORID_NVIDIA:
278 case PCI_OHCI_VENDORID_NVIDIA2:
279 sprintf(sc->sc_vendor, "nVidia");
280 break;
281 case PCI_OHCI_VENDORID_OPTI:
282 sprintf(sc->sc_vendor, "OPTi");
283 break;
284 case PCI_OHCI_VENDORID_SIS:
285 sprintf(sc->sc_vendor, "SiS");
286 break;
287 default:
288 if (bootverbose) {
289 device_printf(self, "(New OHCI DeviceId=0x%08x)\n",
290 pci_get_devid(self));
291 }
292 sprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
293 }
294
295 /* sc->sc_bus.usbrev; set by ohci_init() */
296
297 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
298 NULL, (driver_intr_t *)ohci_interrupt, sc, &sc->sc_intr_hdl);
299 if (err) {
300 device_printf(self, "Could not setup irq, %d\n", err);
301 sc->sc_intr_hdl = NULL;
302 goto error;
303 }
304 err = ohci_init(sc);
305 if (!err) {
306 err = device_probe_and_attach(sc->sc_bus.bdev);
307 }
308 if (err) {
309 device_printf(self, "USB init failed\n");
310 goto error;
311 }
312 return (0);
313
314 error:
315 ohci_pci_detach(self);
316 return (ENXIO);
317 }
318
319 static int
ohci_pci_detach(device_t self)320 ohci_pci_detach(device_t self)
321 {
322 ohci_softc_t *sc = device_get_softc(self);
323
324 /* during module unload there are lots of children leftover */
325 device_delete_children(self);
326
327 pci_disable_busmaster(self);
328
329 if (sc->sc_irq_res && sc->sc_intr_hdl) {
330 /*
331 * only call ohci_detach() after ohci_init()
332 */
333 ohci_detach(sc);
334
335 int err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
336
337 if (err) {
338 /* XXX or should we panic? */
339 device_printf(self, "Could not tear down irq, %d\n",
340 err);
341 }
342 sc->sc_intr_hdl = NULL;
343 }
344 if (sc->sc_irq_res) {
345 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
346 sc->sc_irq_res = NULL;
347 }
348 if (sc->sc_io_res) {
349 bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM,
350 sc->sc_io_res);
351 sc->sc_io_res = NULL;
352 }
353 usb_bus_mem_free_all(&sc->sc_bus, &ohci_iterate_hw_softc);
354
355 return (0);
356 }
357
358 static device_method_t ohci_pci_methods[] = {
359 /* Device interface */
360 DEVMETHOD(device_probe, ohci_pci_probe),
361 DEVMETHOD(device_attach, ohci_pci_attach),
362 DEVMETHOD(device_detach, ohci_pci_detach),
363 DEVMETHOD(device_suspend, bus_generic_suspend),
364 DEVMETHOD(device_resume, bus_generic_resume),
365 DEVMETHOD(device_shutdown, bus_generic_shutdown),
366 DEVMETHOD(usb_take_controller, ohci_pci_take_controller),
367
368 DEVMETHOD_END
369 };
370
371 static driver_t ohci_driver = {
372 .name = "ohci",
373 .methods = ohci_pci_methods,
374 .size = sizeof(struct ohci_softc),
375 };
376
377 DRIVER_MODULE(ohci, pci, ohci_driver, 0, 0);
378 MODULE_DEPEND(ohci, usb, 1, 1, 1);
379