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Searched defs:PCI_SUBCLASS_SD_HOST_CONTROLLER (Results 1 – 15 of 15) sorted by relevance

/dports/emulators/qemu60/qemu-6.0.0/roms/edk2/MdePkg/Include/IndustryStandard/
H A DPciCodeId.h61 #define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05 macro
/dports/emulators/qemu42/qemu-4.2.1/roms/edk2/MdePkg/Include/IndustryStandard/
H A DPciCodeId.h61 #define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05 macro
/dports/emulators/qemu/qemu-6.2.0/roms/edk2/MdePkg/Include/IndustryStandard/
H A DPciCodeId.h61 #define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/edk2/MdePkg/Include/IndustryStandard/
H A DPciCodeId.h61 #define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05 macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/edk2/MdePkg/Include/IndustryStandard/
H A DPciCodeId.h61 #define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05 macro
/dports/sysutils/uefi-edk2-qemu/edk2-edk2-stable201911/MdePkg/Include/IndustryStandard/
H A DPciCodeId.h61 #define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05 macro
/dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/MdePkg/Include/IndustryStandard/
H A DPciCodeId.h67 #define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05 macro
/dports/sysutils/uefi-edk2-bhyve/edk2-edk2-stable202102/MdePkg/Include/IndustryStandard/
H A DPciCodeId.h61 #define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/edk2/MdePkg/Include/IndustryStandard/
H A DPciCodeId.h61 #define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05 macro
/dports/sysutils/edk2/edk2-edk2-stable202102/MdePkg/Include/IndustryStandard/
H A DPciCodeId.h61 #define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05 macro
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/QuarkSocPkg/QuarkSouthCluster/Include/
H A DSDHostIo.h57 #define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05 macro
/dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/Ppi/
H A DSdhc.h91 #define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05 macro
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/Ppi/
H A DSdhc.h85 #define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05 macro
/dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/Protocol/
H A DSdHostIo.h43 #define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05 macro
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/Protocol/
H A DSdHostIo.h37 #define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05 macro