1 /*	$NetBSD: pmap.h,v 1.68 2016/07/11 16:15:35 matt Exp $	*/
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * Ralph Campbell.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. Neither the name of the University nor the names of its contributors
19  *    may be used to endorse or promote products derived from this software
20  *    without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  *	@(#)pmap.h	8.1 (Berkeley) 6/10/93
35  */
36 
37 /*
38  * Copyright (c) 1987 Carnegie-Mellon University
39  *
40  * This code is derived from software contributed to Berkeley by
41  * Ralph Campbell.
42  *
43  * Redistribution and use in source and binary forms, with or without
44  * modification, are permitted provided that the following conditions
45  * are met:
46  * 1. Redistributions of source code must retain the above copyright
47  *    notice, this list of conditions and the following disclaimer.
48  * 2. Redistributions in binary form must reproduce the above copyright
49  *    notice, this list of conditions and the following disclaimer in the
50  *    documentation and/or other materials provided with the distribution.
51  * 3. All advertising materials mentioning features or use of this software
52  *    must display the following acknowledgement:
53  *	This product includes software developed by the University of
54  *	California, Berkeley and its contributors.
55  * 4. Neither the name of the University nor the names of its contributors
56  *    may be used to endorse or promote products derived from this software
57  *    without specific prior written permission.
58  *
59  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
60  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
61  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
62  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
63  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
64  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
65  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69  * SUCH DAMAGE.
70  *
71  *	@(#)pmap.h	8.1 (Berkeley) 6/10/93
72  */
73 
74 #ifndef	_MIPS_PMAP_H_
75 #define	_MIPS_PMAP_H_
76 
77 #ifdef _KERNEL_OPT
78 #include "opt_multiprocessor.h"
79 #include "opt_uvmhist.h"
80 #endif
81 
82 #include <sys/evcnt.h>
83 #include <sys/kcpuset.h>
84 #include <sys/kernhist.h>
85 
86 #ifndef __BSD_PTENTRY_T__
87 #define __BSD_PTENTRY_T__
88 typedef uint32_t pt_entry_t;
89 #define PRIxPTE		PRIx32
90 #endif /* __BSD_PTENTRY_T__ */
91 
92 #define KERNEL_PID			0
93 
94 #if defined(__PMAP_PRIVATE)
95 
96 #include <mips/locore.h>
97 #include <mips/cache.h>
98 
99 #define PMAP_VIRTUAL_CACHE_ALIASES
100 #define PMAP_INVALID_SEGTAB_ADDRESS	((pmap_segtab_t *)NULL)
101 #define	PMAP_TLB_NEED_SHOOTDOWN
102 #define PMAP_TLB_FLUSH_ASID_ON_RESET	false
103 #if UPAGES > 1
104 #define PMAP_TLB_WIRED_UPAGES		MIPS3_TLB_WIRED_UPAGES
105 #endif
106 #define pmap_md_tlb_asid_max()		(MIPS_TLB_NUM_PIDS - 1)
107 #ifdef MULTIPROCESSOR
108 #define PMAP_NO_PV_UNCACHED
109 #endif
110 
111 /*
112  * We need the pmap_segtab's to be aligned on MIPS*R2 so we can use the
113  * EXT/INS instructions on their addresses.
114  */
115 #if (MIPS32R2 + MIPS64R2 + MIPS64R2_RMIXL) > 0
116 #define PMAP_SEGTAB_ALIGN __aligned(sizeof(void *)*NSEGPG) __section(".data1")
117 #endif
118 
119 struct vm_physseg;
120 
121 void	pmap_md_init(void);
122 void	pmap_md_icache_sync_all(void);
123 void	pmap_md_icache_sync_range_index(vaddr_t, vsize_t);
124 void	pmap_md_page_syncicache(struct vm_page *, const kcpuset_t *);
125 bool	pmap_md_vca_add(struct vm_page *, vaddr_t, pt_entry_t *);
126 void	pmap_md_vca_clean(struct vm_page *, int);
127 void	pmap_md_vca_remove(struct vm_page *, vaddr_t, bool, bool);
128 bool	pmap_md_ok_to_steal_p(const struct vm_physseg *, size_t);
129 bool	pmap_md_tlb_check_entry(void *, vaddr_t, tlb_asid_t, pt_entry_t);
130 
131 static inline bool
pmap_md_virtual_cache_aliasing_p(void)132 pmap_md_virtual_cache_aliasing_p(void)
133 {
134 	return MIPS_CACHE_VIRTUAL_ALIAS;
135 }
136 
137 static inline vsize_t
pmap_md_cache_prefer_mask(void)138 pmap_md_cache_prefer_mask(void)
139 {
140 	return MIPS_HAS_R4K_MMU ? mips_cache_info.mci_cache_prefer_mask : 0;
141 }
142 #endif /* __PMAP_PRIVATE */
143 
144 struct tlbmask {
145 	vaddr_t	tlb_hi;
146 #ifdef __mips_o32
147 	uint32_t tlb_lo0;
148 	uint32_t tlb_lo1;
149 #else
150 	uint64_t tlb_lo0;
151 	uint64_t tlb_lo1;
152 #endif
153 	uint32_t tlb_mask;
154 };
155 
156 #ifdef _LP64
157 #define PMAP_SEGTABSIZE		NSEGPG
158 #else
159 #define PMAP_SEGTABSIZE		(1 << (31 - SEGSHIFT))
160 #endif
161 
162 #include <uvm/pmap/vmpagemd.h>
163 #include <uvm/pmap/pmap.h>
164 #include <uvm/pmap/pmap_tlb.h>
165 #include <uvm/pmap/pmap_synci.h>
166 
167 #ifdef _KERNEL
168 /*
169  * Select CCA to use for unmanaged pages.
170  */
171 #define	PMAP_CCA_FOR_PA(pa)	CCA_UNCACHED		/* uncached */
172 
173 #if defined(_MIPS_PADDR_T_64BIT) || defined(_LP64)
174 #define PGC_NOCACHE	0x4000000000000000ULL
175 #define PGC_PREFETCH	0x2000000000000000ULL
176 #endif
177 
178 #if defined(__PMAP_PRIVATE)
179 #include <mips/pte.h>
180 #endif
181 
182 /*
183  * The user address space is 2Gb (0x0 - 0x80000000).
184  * User programs are laid out in memory as follows:
185  *			address
186  *	USRTEXT		0x00001000
187  *	USRDATA		USRTEXT + text_size
188  *	USRSTACK	0x7FFFFFFF
189  *
190  * The user address space is mapped using a two level structure where
191  * virtual address bits 30..22 are used to index into a segment table which
192  * points to a page worth of PTEs (4096 page can hold 1024 PTEs).
193  * Bits 21..12 are then used to index a PTE which describes a page within
194  * a segment.
195  *
196  * The wired entries in the TLB will contain the following:
197  *	0-1	(UPAGES)	for curproc user struct and kernel stack.
198  *
199  * Note: The kernel doesn't use the same data structures as user programs.
200  * All the PTE entries are stored in a single array in Sysmap which is
201  * dynamically allocated at boot time.
202  */
203 
204 #define pmap_phys_address(x)	mips_ptob(x)
205 
206 /*
207  *	Bootstrap the system enough to run with virtual memory.
208  */
209 void	pmap_bootstrap(void);
210 void	pmap_md_alloc_ephemeral_address_space(struct cpu_info *);
211 void	pmap_procwr(struct proc *, vaddr_t, size_t);
212 #define	PMAP_NEED_PROCWR
213 
214 /*
215  * pmap_prefer() helps reduce virtual-coherency exceptions in
216  * the virtually-indexed cache on mips3 CPUs.
217  */
218 #ifdef MIPS3_PLUS
219 #define PMAP_PREFER(pa, va, sz, td)	pmap_prefer((pa), (va), (sz), (td))
220 void	pmap_prefer(vaddr_t, vaddr_t *, vsize_t, int);
221 #endif /* MIPS3_PLUS */
222 
223 #define	PMAP_ENABLE_PMAP_KMPAGE	/* enable the PMAP_KMPAGE flag */
224 
225 // these use register_t so we can pass XKPHYS adddresses to them on N32
226 bool	pmap_md_direct_mapped_vaddr_p(register_t);
227 paddr_t	pmap_md_direct_mapped_vaddr_to_paddr(register_t);
228 bool	pmap_md_io_vaddr_p(vaddr_t);
229 
230 /*
231  * Alternate mapping hooks for pool pages.  Avoids thrashing the TLB.
232  */
233 vaddr_t pmap_md_map_poolpage(paddr_t, size_t);
234 paddr_t pmap_md_unmap_poolpage(vaddr_t, size_t);
235 struct vm_page *pmap_md_alloc_poolpage(int);
236 
237 /*
238  * Other hooks for the pool allocator.
239  */
240 paddr_t	pmap_md_pool_vtophys(vaddr_t);
241 vaddr_t	pmap_md_pool_phystov(paddr_t);
242 #define	POOL_VTOPHYS(va)	pmap_md_pool_vtophys((vaddr_t)va)
243 #define	POOL_PHYSTOV(pa)	pmap_md_pool_phystov((paddr_t)pa)
244 
245 #endif	/* _KERNEL */
246 #endif	/* _MIPS_PMAP_H_ */
247