1 /* 2 * THIS FILE IS AUTOMATICALLY GENERATED 3 * DONT EDIT THIS FILE 4 */ 5 6 /* $OpenBSD: cn30xxpowreg.h,v 1.4 2022/12/28 01:39:21 yasuoka Exp $ */ 7 8 /* 9 * Copyright (c) 2007 Internet Initiative Japan, Inc. 10 * All rights reserved. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 /* 35 * Cavium Networks OCTEON CN30XX Hardware Reference Manual 36 * CN30XX-HM-1.0 37 * 5.12 POW Registers 38 */ 39 40 #ifndef _CN30XXPOWREG_H_ 41 #define _CN30XXPOWREG_H_ 42 43 /* ---- register addresses */ 44 45 #define POW_PP_GRP_MSK0 0x0001670000000000ULL 46 #define POW_PP_GRP_MSK1 0x0001670000000008ULL 47 #define POW_WQ_INT_THR0 0x0001670000000080ULL 48 #define POW_WQ_INT_THR1 0x0001670000000088ULL 49 #define POW_WQ_INT_THR2 0x0001670000000090ULL 50 #define POW_WQ_INT_THR3 0x0001670000000098ULL 51 #define POW_WQ_INT_THR4 0x00016700000000a0ULL 52 #define POW_WQ_INT_THR5 0x00016700000000a8ULL 53 #define POW_WQ_INT_THR6 0x00016700000000b0ULL 54 #define POW_WQ_INT_THR7 0x00016700000000b8ULL 55 #define POW_WQ_INT_THR8 0x00016700000000c0ULL 56 #define POW_WQ_INT_THR9 0x00016700000000c8ULL 57 #define POW_WQ_INT_THR10 0x00016700000000d0ULL 58 #define POW_WQ_INT_THR11 0x00016700000000d8ULL 59 #define POW_WQ_INT_THR12 0x00016700000000e0ULL 60 #define POW_WQ_INT_THR13 0x00016700000000e8ULL 61 #define POW_WQ_INT_THR14 0x00016700000000f0ULL 62 #define POW_WQ_INT_THR15 0x00016700000000f8ULL 63 #define POW_WQ_INT_CNT0 0x0001670000000100ULL 64 #define POW_WQ_INT_CNT1 0x0001670000000108ULL 65 #define POW_WQ_INT_CNT2 0x0001670000000110ULL 66 #define POW_WQ_INT_CNT3 0x0001670000000118ULL 67 #define POW_WQ_INT_CNT4 0x0001670000000120ULL 68 #define POW_WQ_INT_CNT5 0x0001670000000128ULL 69 #define POW_WQ_INT_CNT6 0x0001670000000130ULL 70 #define POW_WQ_INT_CNT7 0x0001670000000138ULL 71 #define POW_WQ_INT_CNT8 0x0001670000000140ULL 72 #define POW_WQ_INT_CNT9 0x0001670000000148ULL 73 #define POW_WQ_INT_CNT10 0x0001670000000150ULL 74 #define POW_WQ_INT_CNT11 0x0001670000000158ULL 75 #define POW_WQ_INT_CNT12 0x0001670000000160ULL 76 #define POW_WQ_INT_CNT13 0x0001670000000168ULL 77 #define POW_WQ_INT_CNT14 0x0001670000000170ULL 78 #define POW_WQ_INT_CNT15 0x0001670000000178ULL 79 #define POW_QOS_THR0 0x0001670000000180ULL 80 #define POW_QOS_THR1 0x0001670000000188ULL 81 #define POW_QOS_THR2 0x0001670000000190ULL 82 #define POW_QOS_THR3 0x0001670000000198ULL 83 #define POW_QOS_THR4 0x00016700000001a0ULL 84 #define POW_QOS_THR5 0x00016700000001a8ULL 85 #define POW_QOS_THR6 0x00016700000001b0ULL 86 #define POW_QOS_THR7 0x00016700000001b8ULL 87 #define POW_QOS_RND0 0x00016700000001c0ULL 88 #define POW_QOS_RND1 0x00016700000001c8ULL 89 #define POW_QOS_RND2 0x00016700000001d0ULL 90 #define POW_QOS_RND3 0x00016700000001d8ULL 91 #define POW_QOS_RND4 0x00016700000001e0ULL 92 #define POW_QOS_RND5 0x00016700000001e8ULL 93 #define POW_QOS_RND6 0x00016700000001f0ULL 94 #define POW_QOS_RND7 0x00016700000001f8ULL 95 #define POW_WQ_INT 0x0001670000000200ULL 96 #define POW_WQ_INT_PC 0x0001670000000208ULL 97 #define POW_NW_TIM 0x0001670000000210ULL 98 #define POW_ECC_ERR 0x0001670000000218ULL 99 #define POW_NOS_CNT 0x0001670000000220ULL 100 #define POW_WS_PC0 0x0001670000000280ULL 101 #define POW_WS_PC1 0x0001670000000288ULL 102 #define POW_WS_PC2 0x0001670000000290ULL 103 #define POW_WS_PC3 0x0001670000000298ULL 104 #define POW_WS_PC4 0x00016700000002a0ULL 105 #define POW_WS_PC5 0x00016700000002a8ULL 106 #define POW_WS_PC6 0x00016700000002b0ULL 107 #define POW_WS_PC7 0x00016700000002b8ULL 108 #define POW_WS_PC8 0x00016700000002c0ULL 109 #define POW_WS_PC9 0x00016700000002c8ULL 110 #define POW_WS_PC10 0x00016700000002d0ULL 111 #define POW_WS_PC11 0x00016700000002d8ULL 112 #define POW_WS_PC12 0x00016700000002e0ULL 113 #define POW_WS_PC13 0x00016700000002e8ULL 114 #define POW_WS_PC14 0x00016700000002f0ULL 115 #define POW_WS_PC15 0x00016700000002f8ULL 116 #define POW_WA_PC0 0x0001670000000300ULL 117 #define POW_WA_PC1 0x0001670000000308ULL 118 #define POW_WA_PC2 0x0001670000000310ULL 119 #define POW_WA_PC3 0x0001670000000318ULL 120 #define POW_WA_PC4 0x0001670000000320ULL 121 #define POW_WA_PC5 0x0001670000000328ULL 122 #define POW_WA_PC6 0x0001670000000330ULL 123 #define POW_WA_PC7 0x0001670000000338ULL 124 #define POW_IQ_CNT0 0x0001670000000340ULL 125 #define POW_IQ_CNT1 0x0001670000000348ULL 126 #define POW_IQ_CNT2 0x0001670000000350ULL 127 #define POW_IQ_CNT3 0x0001670000000358ULL 128 #define POW_IQ_CNT4 0x0001670000000360ULL 129 #define POW_IQ_CNT5 0x0001670000000368ULL 130 #define POW_IQ_CNT6 0x0001670000000370ULL 131 #define POW_IQ_CNT7 0x0001670000000378ULL 132 #define POW_WA_COM_PC 0x0001670000000380ULL 133 #define POW_IQ_COM_CNT 0x0001670000000388ULL 134 #define POW_TS_PC 0x0001670000000390ULL 135 #define POW_DS_PC 0x0001670000000398ULL 136 #define POW_BIST_STAT 0x00016700000003f8ULL 137 138 #define POW_BASE 0x0001670000000000ULL 139 #define POW_SIZE 0x400ULL 140 141 #define POW_PP_GRP_MSK_OFFSET(core) (0x0ULL + (core) * 8) 142 #define POW_WQ_INT_THR0_OFFSET 0x80ULL 143 #define POW_WQ_INT_THR1_OFFSET 0x88ULL 144 #define POW_WQ_INT_THR2_OFFSET 0x90ULL 145 #define POW_WQ_INT_THR3_OFFSET 0x98ULL 146 #define POW_WQ_INT_THR4_OFFSET 0xa0ULL 147 #define POW_WQ_INT_THR5_OFFSET 0xa8ULL 148 #define POW_WQ_INT_THR6_OFFSET 0xb0ULL 149 #define POW_WQ_INT_THR7_OFFSET 0xb8ULL 150 #define POW_WQ_INT_THR8_OFFSET 0xc0ULL 151 #define POW_WQ_INT_THR9_OFFSET 0xc8ULL 152 #define POW_WQ_INT_THR10_OFFSET 0xd0ULL 153 #define POW_WQ_INT_THR11_OFFSET 0xd8ULL 154 #define POW_WQ_INT_THR12_OFFSET 0xe0ULL 155 #define POW_WQ_INT_THR13_OFFSET 0xe8ULL 156 #define POW_WQ_INT_THR14_OFFSET 0xf0ULL 157 #define POW_WQ_INT_THR15_OFFSET 0xf8ULL 158 #define POW_WQ_INT_CNT0_OFFSET 0x100ULL 159 #define POW_WQ_INT_CNT1_OFFSET 0x108ULL 160 #define POW_WQ_INT_CNT2_OFFSET 0x110ULL 161 #define POW_WQ_INT_CNT3_OFFSET 0x118ULL 162 #define POW_WQ_INT_CNT4_OFFSET 0x120ULL 163 #define POW_WQ_INT_CNT5_OFFSET 0x128ULL 164 #define POW_WQ_INT_CNT6_OFFSET 0x130ULL 165 #define POW_WQ_INT_CNT7_OFFSET 0x138ULL 166 #define POW_WQ_INT_CNT8_OFFSET 0x140ULL 167 #define POW_WQ_INT_CNT9_OFFSET 0x148ULL 168 #define POW_WQ_INT_CNT10_OFFSET 0x150ULL 169 #define POW_WQ_INT_CNT11_OFFSET 0x158ULL 170 #define POW_WQ_INT_CNT12_OFFSET 0x160ULL 171 #define POW_WQ_INT_CNT13_OFFSET 0x168ULL 172 #define POW_WQ_INT_CNT14_OFFSET 0x170ULL 173 #define POW_WQ_INT_CNT15_OFFSET 0x178ULL 174 #define POW_QOS_THR0_OFFSET 0x180ULL 175 #define POW_QOS_THR1_OFFSET 0x188ULL 176 #define POW_QOS_THR2_OFFSET 0x190ULL 177 #define POW_QOS_THR3_OFFSET 0x198ULL 178 #define POW_QOS_THR4_OFFSET 0x1a0ULL 179 #define POW_QOS_THR5_OFFSET 0x1a8ULL 180 #define POW_QOS_THR6_OFFSET 0x1b0ULL 181 #define POW_QOS_THR7_OFFSET 0x1b8ULL 182 #define POW_QOS_RND0_OFFSET 0x1c0ULL 183 #define POW_QOS_RND1_OFFSET 0x1c8ULL 184 #define POW_QOS_RND2_OFFSET 0x1d0ULL 185 #define POW_QOS_RND3_OFFSET 0x1d8ULL 186 #define POW_QOS_RND4_OFFSET 0x1e0ULL 187 #define POW_QOS_RND5_OFFSET 0x1e8ULL 188 #define POW_QOS_RND6_OFFSET 0x1f0ULL 189 #define POW_QOS_RND7_OFFSET 0x1f8ULL 190 #define POW_WQ_INT_OFFSET 0x200ULL 191 #define POW_WQ_INT_PC_OFFSET 0x208ULL 192 #define POW_NW_TIM_OFFSET 0x210ULL 193 #define POW_ECC_ERR_OFFSET 0x218ULL 194 #define POW_NOS_CNT_OFFSET 0x220ULL 195 #define POW_WS_PC0_OFFSET 0x280ULL 196 #define POW_WS_PC1_OFFSET 0x288ULL 197 #define POW_WS_PC2_OFFSET 0x290ULL 198 #define POW_WS_PC3_OFFSET 0x298ULL 199 #define POW_WS_PC4_OFFSET 0x2a0ULL 200 #define POW_WS_PC5_OFFSET 0x2a8ULL 201 #define POW_WS_PC6_OFFSET 0x2b0ULL 202 #define POW_WS_PC7_OFFSET 0x2b8ULL 203 #define POW_WS_PC8_OFFSET 0x2c0ULL 204 #define POW_WS_PC9_OFFSET 0x2c8ULL 205 #define POW_WS_PC10_OFFSET 0x2d0ULL 206 #define POW_WS_PC11_OFFSET 0x2d8ULL 207 #define POW_WS_PC12_OFFSET 0x2e0ULL 208 #define POW_WS_PC13_OFFSET 0x2e8ULL 209 #define POW_WS_PC14_OFFSET 0x2f0ULL 210 #define POW_WS_PC15_OFFSET 0x2f8ULL 211 #define POW_WA_PC0_OFFSET 0x300ULL 212 #define POW_WA_PC1_OFFSET 0x308ULL 213 #define POW_WA_PC2_OFFSET 0x310ULL 214 #define POW_WA_PC3_OFFSET 0x318ULL 215 #define POW_WA_PC4_OFFSET 0x320ULL 216 #define POW_WA_PC5_OFFSET 0x328ULL 217 #define POW_WA_PC6_OFFSET 0x330ULL 218 #define POW_WA_PC7_OFFSET 0x338ULL 219 #define POW_IQ_CNT0_OFFSET 0x340ULL 220 #define POW_IQ_CNT1_OFFSET 0x348ULL 221 #define POW_IQ_CNT2_OFFSET 0x350ULL 222 #define POW_IQ_CNT3_OFFSET 0x358ULL 223 #define POW_IQ_CNT4_OFFSET 0x360ULL 224 #define POW_IQ_CNT5_OFFSET 0x368ULL 225 #define POW_IQ_CNT6_OFFSET 0x370ULL 226 #define POW_IQ_CNT7_OFFSET 0x378ULL 227 #define POW_WA_COM_PC_OFFSET 0x380ULL 228 #define POW_IQ_COM_CNT_OFFSET 0x388ULL 229 #define POW_TS_PC_OFFSET 0x390ULL 230 #define POW_DS_PC_OFFSET 0x398ULL 231 #define POW_BIST_STAT_OFFSET 0x3f8ULL 232 233 /* ---- register bits */ 234 235 #define POW_PP_GRP_MSKX_XXX_63_16 0xffffffffffff0000ULL 236 #define POW_PP_GRP_MSKX_GRP_MSK 0x000000000000ffffULL 237 #define POW_PP_GRP_MSKX_GRP_MSK_SHIFT 0 238 239 #define POW_WQ_INT_THRX_XXX_63_29 0xffffffffe0000000ULL 240 #define POW_WQ_INT_THRX_TC_EN 0x0000000010000000ULL 241 #define POW_WQ_INT_THRX_TC_THR 0x000000000f000000ULL 242 #define POW_WQ_INT_THRX_TC_THR_SHIFT 24 243 #define POW_WQ_INT_THRX_XXX_23_18 0x0000000000fc0000ULL 244 #define POW_WQ_INT_THRX_DS_THR 0x000000000003f000ULL 245 #define POW_WQ_INT_THRX_DS_THR_SHIFT 12 246 #define POW_WQ_INT_THRX_XXX_11_6 0x0000000000000fc0ULL 247 #define POW_WQ_INT_THRX_IQ_THR 0x000000000000003fULL 248 #define POW_WQ_INT_THRX_IQ_THR_SHIFT 0 249 250 #define POW_WQ_INT_CNTX_XXX_63_28 0xfffffffff0000000ULL 251 #define POW_WQ_INT_CNTX_TC_CNT 0x000000000f000000ULL 252 #define POW_WQ_INT_CNTX_TC_CNT_SHIFT 24 253 #define POW_WQ_INT_CNTX_XXX_23_18 0x0000000000fc0000ULL 254 #define POW_WQ_INT_CNTX_DS_CNT 0x000000000003f000ULL 255 #define POW_WQ_INT_CNTX_DS_CNT_SHIFT 12 256 #define POW_WQ_INT_CNTX_XXX_11_6 0x0000000000000fc0ULL 257 #define POW_WQ_INT_CNTX_IQ_CNT 0x000000000000003fULL 258 #define POW_WQ_INT_CNTX_IQ_CNT_SHIFT 0 259 260 #define POW_QOS_THRX_XXX_63_55 0xff80000000000000ULL 261 #define POW_QOS_THRX_DES_CNT 0x007f000000000000ULL 262 #define POW_QOS_THRX_DES_CNT_SHIFT 48 263 #define POW_QOS_THRX_XXX_47_43 0x0000f80000000000ULL 264 #define POW_QOS_THRX_BUF_CNT 0x000007f000000000ULL 265 #define POW_QOS_THRX_BUF_CNT_SHIFT 36 266 #define POW_QOS_THRX_XXX_35_31 0x0000000f80000000ULL 267 #define POW_QOS_THRX_FREE_CNT 0x000000007f000000ULL 268 #define POW_QOS_THRX_FREE_CNT_SHIFT 24 269 #define POW_QOS_THRX_XXX_23_18 0x0000000000fc0000ULL 270 #define POW_QOS_THRX_MAX_THR 0x000000000003f000ULL 271 #define POW_QOS_THRX_MAX_THR_SHIFT 12 272 #define POW_QOS_THRX_XXX_11_6 0x0000000000000fc0ULL 273 #define POW_QOS_THRX_MIN_THR 0x000000000000003fULL 274 #define POW_QOS_THRX_MIN_THR_SHIFT 0 275 276 #define POW_QOS_RNDX_XXX_63_32 0xffffffff00000000ULL 277 #define POW_QOS_RNDX_RND_P3 0x00000000ff000000ULL 278 #define POW_QOS_RNDX_RND_P3_SHIFT 24 279 #define POW_QOS_RNDX_RND_P2 0x0000000000ff0000ULL 280 #define POW_QOS_RNDX_RND_P2_SHIFT 16 281 #define POW_QOS_RNDX_RND_P1 0x000000000000ff00ULL 282 #define POW_QOS_RNDX_RND_P1_SHIFT 8 283 #define POW_QOS_RNDX_RND 0x00000000000000ffULL 284 #define POW_QOS_RNDX_RND_SHIFT 0 285 286 #define POW_WQ_INT_XXX_63_32 0xffffffff00000000ULL 287 #define POW_WQ_INT_IQ_DIS 0x00000000ffff0000ULL 288 #define POW_WQ_INT_IQ_DIS_SHIFT 16 289 #define POW_WQ_INT_WQ_INT 0x000000000000ffffULL 290 #define POW_WQ_INT_WQ_INT_SHIFT 0 291 292 #define POW_WQ_INT_PC_XXX_63_60 0xf000000000000000ULL 293 #define POW_WQ_INT_PC_PC 0x0fffffff00000000ULL 294 #define POW_WQ_INT_PC_PC_SHIFT 32 295 #define POW_WQ_INT_PC_XXX_31_28 0x00000000f0000000ULL 296 #define POW_WQ_INT_PC_PC_THR 0x000000000fffff00ULL 297 #define POW_WQ_INT_PC_PC_THR_SHIFT 8 298 #define POW_WQ_INT_PC_XXX_7_0 0x00000000000000ffULL 299 300 #define POW_NW_TIM_XXX_63_10 0xfffffffffffffc00ULL 301 #define POW_NW_TIM_NW_TIM 0x00000000000003ffULL 302 #define POW_NW_TIM_NW_TIM_SHIFT 0 303 304 #define POW_ECC_ERR_XXX_63_45 0xffffe00000000000ULL 305 #define POW_ECC_ERR_IOP_IE 0x00001fff00000000ULL 306 #define POW_ECC_ERR_IOP_IE_SHIFT 32 307 #define POW_ECC_ERR_XXX_31_29 0x00000000e0000000ULL 308 #define POW_ECC_ERR_IOP 0x000000001fff0000ULL 309 #define POW_ECC_ERR_IOP_SHIFT 16 310 #define POW_ECC_ERR_IOP_CSRPEND (28) << POW_ECC_ERR_IOP_SHIFTULL 311 #define POW_ECC_ERR_IOP_DBGPEND (27) << POW_ECC_ERR_IOP_SHIFTULL 312 #define POW_ECC_ERR_IOP_ADDWORK (26) << POW_ECC_ERR_IOP_SHIFTULL 313 #define POW_ECC_ERR_IOP_ILLOP (25) << POW_ECC_ERR_IOP_SHIFTULL 314 #define POW_ECC_ERR_IOP_PEND24 (24) << POW_ECC_ERR_IOP_SHIFTULL 315 #define POW_ECC_ERR_IOP_PEND23 (23) << POW_ECC_ERR_IOP_SHIFTULL 316 #define POW_ECC_ERR_IOP_PEND22 (22) << POW_ECC_ERR_IOP_SHIFTULL 317 #define POW_ECC_ERR_IOP_PEND21 (21) << POW_ECC_ERR_IOP_SHIFTULL 318 #define POW_ECC_ERR_IOP_TAGNULL (20) << POW_ECC_ERR_IOP_SHIFTULL 319 #define POW_ECC_ERR_IOP_TAGNULLNULL (19) << POW_ECC_ERR_IOP_SHIFTULL 320 #define POW_ECC_ERR_IOP_ORDATOM (18) << POW_ECC_ERR_IOP_SHIFTULL 321 #define POW_ECC_ERR_IOP_NULL (17) << POW_ECC_ERR_IOP_SHIFTULL 322 #define POW_ECC_ERR_IOP_NULLNULL (16) << POW_ECC_ERR_IOP_SHIFTULL 323 #define POW_ECC_ERR_XXX_15_14 0x000000000000c000ULL 324 #define POW_ECC_ERR_RPE_IE 0x0000000000002000ULL 325 #define POW_ECC_ERR_RPE 0x0000000000001000ULL 326 #define POW_ECC_ERR_XXX_11_9 0x0000000000000e00ULL 327 #define POW_ECC_ERR_SYN 0x00000000000001f0ULL 328 #define POW_ECC_ERR_SYN_SHIFT 4 329 #define POW_ECC_ERR_DBE_IE 0x0000000000000008ULL 330 #define POW_ECC_ERR_SBE_IE 0x0000000000000004ULL 331 #define POW_ECC_ERR_DBE 0x0000000000000002ULL 332 #define POW_ECC_ERR_SBE 0x0000000000000001ULL 333 334 #define POW_NOS_CNT_XXX_63_7 0xffffffffffffff80ULL 335 #define POW_NOS_CNT_NOS_CNT 0x000000000000007fULL 336 #define POW_NOS_CNT_NOS_CNT_SHIFT 0 337 338 #define POW_WS_PC0_XXX_63_32 0xffffffff00000000ULL 339 #define POW_WS_PC0_WS_PC 0x00000000ffffffffULL 340 #define POW_WS_PC0_WS_PC_SHIFT 0 341 342 #define POW_WA_PC0_XXX_63_32 0xffffffff00000000ULL 343 #define POW_WA_PC0_WA_PC 0x00000000ffffffffULL 344 #define POW_WA_PC0_WA_PC_SHIFT 0 345 346 #define POW_IQ_CNT0_XXX_63_32 0xffffffff00000000ULL 347 #define POW_IQ_CNT0_IQ_CNT 0x00000000ffffffffULL 348 #define POW_IQ_CNT0_IQ_CNT_SHIFT 0 349 350 #define POW_WA_COM_PC_XXX_63_32 0xffffffff00000000ULL 351 #define POW_WA_COM_PC_WA_PC 0x00000000ffffffffULL 352 #define POW_WA_COM_PC_WA_PC_SHIFT 0 353 354 #define POW_WQ_COM_CNT_XXX_63_32 0xffffffff00000000ULL 355 #define POW_WQ_COM_CNT_IQ_CNT 0x00000000ffffffffULL 356 #define POW_WQ_COM_CNT_IQ_CNT_SHIFT 0 357 358 #define POW_TS_PC_XXX_63_32 0xffffffff00000000ULL 359 #define POW_TS_PC_TS_PC 0x00000000ffffffffULL 360 #define POW_TS_PC_TS_PC_SHIFT 0 361 362 #define POW_DS_PC_XXX_63_32 0xffffffff00000000ULL 363 #define POW_DS_PC_DS_PC 0x00000000ffffffffULL 364 #define POW_DS_PC_DS_PC_SHIFT 0 365 366 #define POW_BIST_STAT_XXX_63_7 0xfffffffffffe0000ULL 367 #define POW_BIST_STAT_PP 0x0000000000010000ULL 368 #define POW_BIST_STAT_XXX_15_9 0x000000000000fe00ULL 369 #define POW_BIST_STAT_CAM 0x0000000000000100ULL 370 #define POW_BIST_STAT_NBT1 0x0000000000000080ULL 371 #define POW_BIST_STAT_NBT0 0x0000000000000040ULL 372 #define POW_BIST_STAT_IDX 0x0000000000000020ULL 373 #define POW_BIST_STAT_FIDX 0x0000000000000010ULL 374 #define POW_BIST_STAT_NBR1 0x0000000000000008ULL 375 #define POW_BIST_STAT_NBR0 0x0000000000000004ULL 376 #define POW_BIST_STAT_PEND 0x0000000000000002ULL 377 #define POW_BIST_STAT_ADR 0x0000000000000001ULL 378 379 /* ---- pow operations */ 380 381 /* pow operations base */ 382 #define POW_OPERATION_BASE_IO_BIT 0x0001000000000000ULL 383 #define POW_OPERATION_BASE_MAJOR_DID 0x0000f80000000000ULL 384 #define POW_OPERATION_BASE_SUB_DID 0x0000070000000000ULL 385 #define POW_OPERATION_BASE_IO_BIT_SHIFT 48 386 #define POW_OPERATION_BASE_MAJOR_DID_SHIFT 43 387 #define POW_OPERATION_BASE_SUB_DID_SHIFT 40 388 389 /* get work load (subid = 0) */ 390 #define POW_GET_WORK_LOAD_WAIT 0x0000000000000008ULL 391 #define POW_GET_WORK_LOAD_2_0 0x0000000000000007ULL 392 #define POW_GET_WORK_LOAD_WAIT_SHIFT 3 393 #define POW_GET_WORK_LOAD_2_0_SHIFT 0 394 395 #define POW_GET_WORK_LOAD_RESULT_NO_WORK 0x8000000000000000ULL 396 #define POW_GET_WORK_LOAD_RESULT_62_40 0x7fffff0000000000ULL 397 #define POW_GET_WORK_LOAD_RESULT_ADDR 0x000000ffffffffffULL 398 399 /* pow status load (subid = 1) */ 400 #define POW_STATUS_LOAD_COREID 0x00000000000003c0ULL 401 #define POW_STATUS_LOAD_GET_REV 0x0000000000000020ULL 402 #define POW_STATUS_LOAD_GET_CUR 0x0000000000000010ULL 403 #define POW_STATUS_LOAD_GET_WQP 0x0000000000000008ULL 404 #define POW_STATUS_LOAD_GET_2_0 0x0000000000000007ULL 405 #define POW_STATUS_LOAD_COREID_SHIFT 6 406 #define POW_STATUS_LOAD_GET_REV_SHIFT 5 407 #define POW_STATUS_LOAD_GET_CUR_SHIFT 4 408 #define POW_STATUS_LOAD_GET_WQP_SHIFT 3 409 #define POW_STATUS_LOAD_GET_2_0_SHIFT 0 410 411 /* get_cur = 0 and get_wqp = 0 ("pend_tag") */ 412 #define POW_STATUS_LOAD_RESULT_PEND_TAG_XXX_63_62 0xc000000000000000ULL 413 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_SWITCH 0x2000000000000000ULL 414 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_SWITCH_FULL 0x1000000000000000ULL 415 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_SWITCH_NULL 0x0800000000000000ULL 416 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_DESCHED 0x0400000000000000ULL 417 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_DESCHED_SWITCH 0x0200000000000000ULL 418 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_NOSCHED 0x0100000000000000ULL 419 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_NEW_WORK 0x0080000000000000ULL 420 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_NEW_WORK_WAIT 0x0040000000000000ULL 421 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_NULL_RD 0x0020000000000000ULL 422 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_NOSCHED_CLR 0x0010000000000000ULL 423 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_XXX_51 0x0008000000000000ULL 424 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_INDEX 0x0007ff0000000000ULL 425 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_GRP 0x000000f000000000ULL 426 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_XXX_35_34 0x0000000c00000000ULL 427 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_TYPE 0x0000000300000000ULL 428 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_TAG 0x00000000ffffffffULL 429 430 /* get_cur = 0 and get_wqp = 1 ("pend_wqp") */ 431 #define POW_STATUS_LOAD_RESULT_PEND_WQP_XXX_63_62 0xc000000000000000ULL 432 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_SWITCH 0x2000000000000000ULL 433 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_SWITCH_FULL 0x1000000000000000ULL 434 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_SWITCH_NULL 0x0800000000000000ULL 435 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_DESCHED 0x0400000000000000ULL 436 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_DESCHED_SWITCH 0x0200000000000000ULL 437 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_NOSCHED 0x0100000000000000ULL 438 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_NEW_WORK 0x0080000000000000ULL 439 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_NEW_WORK_WAIT 0x0040000000000000ULL 440 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_NULL_RD 0x0020000000000000ULL 441 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_NOSCHED_CLR 0x0010000000000000ULL 442 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_XXX_51 0x0008000000000000ULL 443 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_INDEX 0x0007ff0000000000ULL 444 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_WQP 0x0000000fffffffffULL 445 446 /* get_cur = 1 and get_wqp = 0 and get_rev = 0 ("cur_tag_next") */ 447 #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_XXX_63_62 0xc000000000000000ULL 448 #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_LINK_INDEX 0x3ff8000000000000ULL 449 #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_INDEX 0x0007ff0000000000ULL 450 #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_GRP 0x000000f000000000ULL 451 #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_HEAD 0x0000000800000000ULL 452 #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_TAIL 0x0000000400000000ULL 453 #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_TAG_TYPE 0x0000000300000000ULL 454 #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_TAG 0x00000000ffffffffULL 455 456 /* get_cur = 1 and get_wqp = 0 and get_rev = 1 ("cur_tag_prev") */ 457 #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_XXX_63_62 0xc000000000000000ULL 458 #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_REVLINK_INDEX 0x3ff8000000000000ULL 459 #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_INDEX 0x0007ff0000000000ULL 460 #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_GRP 0x000000f000000000ULL 461 #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_HEAD 0x0000000800000000ULL 462 #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_TAIL 0x0000000400000000ULL 463 #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_TAG_TYPE 0x0000000300000000ULL 464 #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_TAG 0x00000000ffffffffULL 465 466 /* get_cur = 1 and get_wqp = 1 and get_rev = 0 ("cur_wqp_next") */ 467 #define POW_STATUS_LOAD_RESULT_CUR_WQP_NEXT_XXX_63_62 0xc000000000000000ULL 468 #define POW_STATUS_LOAD_RESULT_CUR_WQP_NEXT_LINK_INDEX 0x3ff8000000000000ULL 469 #define POW_STATUS_LOAD_RESULT_CUR_WQP_NEXT_INDEX 0x0007ff0000000000ULL 470 #define POW_STATUS_LOAD_RESULT_CUR_WQP_NEXT_GRP 0x000000f000000000ULL 471 #define POW_STATUS_LOAD_RESULT_CUR_WQP_NEXT_WQP 0x0000000fffffffffULL 472 473 /* get_cur = 1 and get_wqp = 1 and get_rev = 1 ("cur_wqp_prev") */ 474 #define POW_STATUS_LOAD_RESULT_CUR_WQP_PREV_XXX_63_62 0xc000000000000000ULL 475 #define POW_STATUS_LOAD_RESULT_CUR_WQP_PREV_REVLINK_INDEX 0x3ff8000000000000ULL 476 #define POW_STATUS_LOAD_RESULT_CUR_WQP_PREV_INDEX 0x0007ff0000000000ULL 477 #define POW_STATUS_LOAD_RESULT_CUR_WQP_PREV_GRP 0x000000f000000000ULL 478 #define POW_STATUS_LOAD_RESULT_CUR_WQP_PREV_WQP 0x0000000fffffffffULL 479 480 /* pow memory load (subid = 2) */ 481 #define POW_MEMORY_LOAD_INDEX 0x000000000000ffe0ULL 482 #define POW_MEMORY_LOAD_GET_DES 0x0000000000000010ULL 483 #define POW_MEMORY_LOAD_GET_WQP 0x0000000000000008ULL 484 #define POW_MEMORY_LOAD_2_0 0x0000000000000007ULL 485 #define POW_MEMORY_LOAD_GET_DES_SHIFT 4 486 #define POW_MEMORY_LOAD_INDEX_SHIFT 5 487 #define POW_MEMORY_LOAD_2_0_SHIFT 0 488 #define POW_MEMORY_LOAD_GET_WQP_SHIFT 3 489 490 /* get_des = 0 and get_wqp = 0 ("tag") */ 491 #define POW_MEMORY_LOAD_RESULT_TAG_XXX_63_51 0xfff8000000000000ULL 492 #define POW_MEMORY_LOAD_RESULT_TAG_NEXT_INDEX 0x0007ff0000000000ULL 493 #define POW_MEMORY_LOAD_RESULT_TAG_GRP 0x000000f000000000ULL 494 #define POW_MEMORY_LOAD_RESULT_TAG_XXX_35 0x0000000800000000ULL 495 #define POW_MEMORY_LOAD_RESULT_TAG_TAIL 0x0000000400000000ULL 496 #define POW_MEMORY_LOAD_RESULT_TAG_TAG_TYPE 0x0000000300000000ULL 497 #define POW_MEMORY_LOAD_RESULT_TAG_TAG 0x00000000ffffffffULL 498 499 /* get_des = 0 and get_wqp = 1 ("wqp") */ 500 #define POW_MEMORY_LOAD_RESULT_WQP_XXX_63_51 0xfff8000000000000ULL 501 #define POW_MEMORY_LOAD_RESULT_WQP_NEXT_INDEX 0x0007ff0000000000ULL 502 #define POW_MEMORY_LOAD_RESULT_WQP_GRP 0x000000f000000000ULL 503 #define POW_MEMORY_LOAD_RESULT_WQP_WQP 0x0000000fffffffffULL 504 505 /* get_des = 1 ("desched") */ 506 #define POW_MEMORY_LOAD_RESULT_DESCHED_XXX_63_51 0xfff8000000000000ULL 507 #define POW_MEMORY_LOAD_RESULT_DESCHED_FWD_INDEX 0x0007ff0000000000ULL 508 #define POW_MEMORY_LOAD_RESULT_DESCHED_GRP 0x000000f000000000ULL 509 #define POW_MEMORY_LOAD_RESULT_DESCHED_NOSCHED 0x0000000800000000ULL 510 #define POW_MEMORY_LOAD_RESULT_DESCHED_PEND_SWITCH 0x0000000400000000ULL 511 #define POW_MEMORY_LOAD_RESULT_DESCHED_PEND_TYPE 0x0000000300000000ULL 512 #define POW_MEMORY_LOAD_RESULT_DESCHED_PEND_TAG 0x00000000ffffffffULL 513 514 /* pow index/pointer load (subid = 3) */ 515 #define POW_IDXPTR_LOAD_QOSGRP 0x00000000000001e0ULL 516 #define POW_IDXPTR_LOAD_GET_DES_GET_TAIL 0x0000000000000010ULL 517 #define POW_IDXPTR_LOAD_GET_RMT 0x0000000000000008ULL 518 #define POW_IDXPTR_LOAD_2_0 0x0000000000000007ULL 519 #define POW_IDXPTR_LOAD_GET_DES_GET_TAIL_SHIFT 4 520 #define POW_IDXPTR_LOAD_QOSGRP_SHIFT 5 521 #define POW_IDXPTR_LOAD_2_0_SHIFT 0 522 #define POW_IDXPTR_LOAD_GET_RMT_SHIFT 3 523 524 /* get_rmt = 0 and get_des_get_tail = 0 ("qos") */ 525 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_XXX_63_52 0xfff0000000000000ULL 526 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_FREE_VAL 0x0008000000000000ULL 527 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_FREE_ONE 0x0004000000000000ULL 528 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_XXX_49 0x0002000000000000ULL 529 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_FREE_HEAD 0x0001ffc000000000ULL 530 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_XXX_37 0x0000002000000000ULL 531 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_FREE_TAIL 0x0000001ffc000000ULL 532 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_LOC_VAL 0x0000000002000000ULL 533 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_LOC_ONE 0x0000000001000000ULL 534 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_XXX_23 0x0000000000800000ULL 535 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_LOC_HEAD 0x00000000007ff000ULL 536 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_XXX_11 0x0000000000000800ULL 537 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_LOC_TAIL 0x00000000000007ffULL 538 539 /* get_rmt = 0 and get_des_get_tail = 1 ("desched") */ 540 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_XXX_63_52 0xfff0000000000000ULL 541 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_NOSCHED_VAL 0x0008000000000000ULL 542 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_NOSCHED_ONE 0x0004000000000000ULL 543 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_XXX_49 0x0002000000000000ULL 544 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_NOSCHED_HEAD 0x0001ffc000000000ULL 545 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_XXX_37 0x0000002000000000ULL 546 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_NOSCHED_TAIL 0x0000001ffc000000ULL 547 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_DES_VAL 0x0000000002000000ULL 548 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_DES_ONE 0x0000000001000000ULL 549 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_XXX_23 0x0000000000800000ULL 550 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_DES_HEAD 0x00000000007ff000ULL 551 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_XXX_11 0x0000000000000800ULL 552 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_DES_TAIL 0x00000000000007ffULL 553 554 /* get_rmt = 1 and get_des_get_tail = 0 ("remote_head") */ 555 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_HEAD_XXX_63_39 0xffffff8000000000ULL 556 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_HEAD_RMT_IS_HEAD 0x0000004000000000ULL 557 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_HEAD_RMT_VAL 0x0000002000000000ULL 558 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_HEAD_RMT_ONE 0x0000001000000000ULL 559 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_HEAD_RMT_HEAD 0x0000000fffffffffULL 560 561 /* get_rmt = 1 and get_des_get_tail = 1 ("remote_tail") */ 562 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_TAIL_XXX_63_39 0xffffff8000000000ULL 563 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_TAIL_RMT_IS_HEAD 0x0000004000000000ULL 564 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_TAIL_RMT_VAL 0x0000002000000000ULL 565 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_TAIL_RMT_ONE 0x0000001000000000ULL 566 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_TAIL_RMT_TAIL 0x0000000fffffffffULL 567 568 /* pow index/pointer load (subid = 2) */ 569 #define POW_NULL_RD_LOAD_39_3 0x000000fffffffff8ULL 570 #define POW_NULL_RD_LOAD_2_0 0x0000000000000007ULL 571 #define POW_NULL_RD_LOAD_2_0_SHIFT 0 572 #define POW_NULL_RD_LOAD_39_3_SHIFT 3 573 574 #define POW_NULL_RD_LOAD_RESULT_63_2 0xfffffffffffffffcULL 575 #define POW_NULL_RD_LOAD_RESULT_STATUS 0x0000000000000003ULL 576 577 /* pow store operations */ 578 579 #define POW_PHY_ADDR_STORE_ADDR 0x0000000fffffffffULL 580 #define POW_PHY_ADDR_STORE_ADDR_SHIFT 0 581 582 #define POW_STORE_DATA_NO_SCHED 0x8000000000000000ULL 583 #define POW_STORE_DATA_62_61 0x6000000000000000ULL 584 #define POW_STORE_DATA_INDEX 0x1fff000000000000ULL 585 #define POW_STORE_DATA_OP 0x0000f00000000000ULL 586 #define POW_STORE_DATA_43_42 0x00000c0000000000ULL 587 #define POW_STORE_DATA_QOS 0x0000038000000000ULL 588 #define POW_STORE_DATA_GRP 0x0000007800000000ULL 589 #define POW_STORE_DATA_TYPE 0x0000000700000000ULL 590 #define POW_STORE_DATA_TAG 0x00000000ffffffffULL 591 #define POW_STORE_DATA_NO_SCHED_SHIFT 63 592 #define POW_STORE_DATA_62_61_SHIFT 61 593 #define POW_STORE_DATA_INDEX_SHIFT 48 594 #define POW_STORE_DATA_OP_SHIFT 44 595 #define POW_STORE_DATA_43_42_SHIFT 42 596 #define POW_STORE_DATA_QOS_SHIFT 39 597 #define POW_STORE_DATA_GRP_SHIFT 35 598 #define POW_STORE_DATA_TYPE_SHIFT 32 599 #define POW_STORE_DATA_TAG_SHIFT 0 600 601 /* pow iobdma operations */ 602 603 /* pow iobdma operations base*/ 604 #define POW_IOBDMA_BASE_SCRADDR 0xff00000000000000ULL 605 #define POW_IOBDMA_BASE_LEN 0x00ff000000000000ULL 606 #define POW_IOBDMA_BASE_MAJOR_DID 0x0000f80000000000ULL 607 #define POW_IOBDMA_BASE_SUB_DID 0x0000070000000000ULL 608 #define POW_IOBDMA_BASE_39_0 0x000000ffffffffffULL 609 #define POW_IOBDMA_BASE_SCRADDR_SHIFT 56 610 #define POW_IOBDMA_BASE_SUB_DID_SHIFT 40 611 #define POW_IOBDMA_BASE_39_0_SHIFT 0 612 #define POW_IOBDMA_BASE_LEN_SHIFT 48 613 #define POW_IOBDMA_BASE_MAJOR_DID_SHIFT 43 614 615 /* pow iobdma get work (subid = 0) */ 616 #define POW_IOBDMA_GET_WORK_39_4 0x000000ffffffffffULL 617 #define POW_IOBDMA_GET_WORK_WAIT 0x0000000000000008ULL 618 #define POW_IOBDMA_GET_WORK_2_0 0x0000000000000007ULL 619 #define POW_IOBDMA_GET_WORK_39_4_SHIFT 0 620 #define POW_IOBDMA_GET_WORK_2_0_SHIFT 0 621 #define POW_IOBDMA_GET_WORK_WAIT_SHIFT 3 622 623 #define POW_IOBDMA_GET_WORK_RESULT_NO_WORK 0x8000000000000000ULL 624 #define POW_IOBDMA_GET_WORK_RESULT_62_40 0x7fffff0000000000ULL 625 #define POW_IOBDMA_GET_WORK_RESULT_ADDR 0x000000ffffffffffULL 626 627 /* pow iobdma null rd (subid = 4) */ 628 #define POW_IOBDMA_NULL_RD_39_0 0x000000ffffffffffULL 629 #define POW_IOBDMA_NULL_RD_39_0_SHIFT 0 630 631 #define POW_IOBDMA_NULL_RD_RESULT_63_2 0xfffffffffffffffcULL 632 #define POW_IOBDMA_NULL_RD_RESULT_STATUS 0x0000000000000003ULL 633 634 /* ------------------------------------------------------------------------- */ 635 636 /* Work Queue Entry */ 637 638 #define POW_WQE_WORD0_XXX_63_40 0xffffff0000000000ULL 639 #define POW_WQE_WORD0_NEXT 0x000000ffffffffffULL 640 #define POW_WQE_WORD0_NEXT_SHIFT 0 641 642 #define POW_WQE_WORD1_XXX_63_42 0xfffffc0000000000ULL 643 #define POW_WQE_WORD1_QOS 0x0000038000000000ULL 644 #define POW_WQE_WORD1_GRP 0x0000007800000000ULL 645 #define POW_WQE_WORD1_TT 0x0000000700000000ULL 646 #define POW_WQE_WORD1_TAG 0x00000000ffffffffULL 647 #define POW_WQE_WORD1_GRP_SHIFT 35 648 #define POW_WQE_WORD1_QOS_SHIFT 39 649 #define POW_WQE_WORD1_TT_SHIFT 32 650 #define POW_WQE_WORD1_TAG_SHIFT 0 651 652 #endif /* _CN30XXPOWREG_H_ */ 653