1 /* $NetBSD: if_rayreg.h,v 1.11 2015/09/06 06:01:00 dholland Exp $ */ 2 /* 3 * Copyright (c) 2000 Christian E. Hopps 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. Neither the name of the author nor the names of any co-contributors 15 * may be used to endorse or promote products derived from this software 16 * without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 #include <sys/ioccom.h> 32 33 #define RAY_MAXSSIDLEN 32 34 35 /* 36 * CCR registers 37 */ 38 #define RAY_COR 0 /* config option register */ 39 #define RAY_CCSR 1 /* card config and status register */ 40 #define RAY_PIN 2 /* not in hw */ 41 #define RAY_SOCKETCOPY 3 /* not used by hw */ 42 #define RAY_HCSIR 5 /* HCS intr register */ 43 #define RAY_ECFIR 6 /* ECF intr register */ 44 #define RAY_AR0 8 /* authorization register 0 (unused) */ 45 #define RAY_AR1 9 /* authorization register 1 (unused) */ 46 #define RAY_PMR 10 /* program mode register (unused) */ 47 #define RAY_TMR 11 /* pc test mode register (unused) */ 48 #define RAY_FCWR 16 /* frequency control word register */ 49 50 /* 51 * XXX these registers cannot be accessed with pcmcia.c's 0x14 byte mapping 52 * of the CCR for us 53 */ 54 #if 0 55 #define RAY_TMC1 0x014 /* test mode control 1 (unused) */ 56 #define RAY_TMC2 0x015 /* test mode control 1 (unused) */ 57 #define RAY_TMC3 0x016 /* test mode control 1 (unused) */ 58 #define RAY_TMC4 0x017 /* test mode control 1 (unused) */ 59 #endif 60 61 /* 62 * COR register bits 63 */ 64 #define RAY_COR_CFG_NUM 0x01 /* currently ignored and set */ 65 #define RAY_COR_CFG_MASK 0x3f /* mask for function */ 66 #define RAY_COR_LEVEL_IRQ 0x40 /* currently ignored and set */ 67 #define RAY_COR_RESET 0x80 /* soft-reset the card */ 68 69 /* 70 * CCS register bits 71 */ 72 /* XXX the linux driver indicates bit 0 is the irq bit */ 73 #define RAY_CCS_IRQ 0x02 /* interrupt pending */ 74 #define RAY_CCS_POWER_DOWN 0x04 75 76 /* 77 * HCSI register bits 78 * 79 * the host can only clear this bit. 80 */ 81 #define RAY_HCSIR_IRQ 0x01 /* indicates an interrupt */ 82 83 /* 84 * ECFI register values 85 */ 86 #define RAY_ECSIR_IRQ 0x01 /* interrupt the card */ 87 88 /* 89 * authorization register 0 values 90 * -- used for testing/programming the card (unused) 91 */ 92 #define RAY_AR0_ON 0x57 93 94 /* 95 * authorization register 1 values 96 * -- used for testing/programming the card (unused) 97 */ 98 #define RAY_AR1_ON 0x82 99 100 /* 101 * PMR bits -- these are used to program the card (unused) 102 */ 103 #define RAY_PMR_PC2PM 0x02 /* grant access to firmware flash */ 104 #define RAY_PMR_PC2CAL 0x10 /* read access to the A/D modem inp */ 105 #define RAY_PMR_MLSE 0x20 /* read access to the MSLE prom */ 106 107 /* 108 * TMR bits -- get access to test modes (unused) 109 */ 110 #define RAY_TMR_TEST 0x08 /* test mode */ 111 112 /* 113 * FCWR -- frequency control word, values from [0x02,0xA6] map to 114 * RF frequency values. 115 */ 116 117 /* 118 * 48k of memory -- would like to map this into smaller isa windows 119 * but doesn't seem currently possible with the pcmcia code 120 */ 121 #define RAY_SRAM_MEM_BASE 0 122 #define RAY_SRAM_MEM_SIZE 0xc000 123 124 /* 125 * offsets into shared ram 126 */ 127 #define RAY_SCB_BASE 0x0 /* cfg/status/ctl area */ 128 #define RAY_STATUS_BASE 0x0100 129 #define RAY_HOST_TO_ECF_BASE 0x0200 130 #define RAY_ECF_TO_HOST_BASE 0x0300 131 #define RAY_CCS_BASE 0x0400 132 #define RAY_RCS_BASE 0x0800 133 #define RAY_APOINT_TIM_BASE 0x0c00 134 #define RAY_SSID_LIST_BASE 0x0d00 135 #define RAY_TX_BASE 0x1000 136 #define RAY_TX_SIZE 0x7000 137 #define RAY_TX_END 0x8000 138 #define RAY_RX_BASE 0x8000 139 #define RAY_RX_END 0xc000 140 #define RAY_RX_MASK 0x3fff 141 142 struct ray_ecf_startup { 143 u_int8_t e_status; /* RAY_ECFS_ */ 144 u_int8_t e_station_addr[ETHER_ADDR_LEN]; 145 u_int8_t e_resv0; 146 u_int8_t e_rates[8]; 147 u_int8_t e_japan_callsign[12]; 148 u_int8_t e_prg_cksum; 149 u_int8_t e_cis_cksum; 150 u_int8_t e_fw_build_string; 151 u_int8_t e_fw_build; 152 u_int8_t e_fw_resv; 153 u_int8_t e_asic_version; 154 u_int8_t e_tib_size; 155 u_int8_t e_resv1[29]; 156 }; 157 158 #define RAY_ECFS_RESERVED0 0x01 159 #define RAY_ECFS_PROC_SELF_TEST 0x02 160 #define RAY_ECFS_PROG_MEM_CHECKSUM 0x04 161 #define RAY_ECFS_DATA_MEM_TEST 0x08 162 #define RAY_ECFS_RX_CALIBRATION 0x10 163 #define RAY_ECFS_FW_VERSION_COMPAT 0x20 164 #define RAY_ECFS_RERSERVED1 0x40 165 #define RAY_ECFS_TEST_COMPLETE 0x80 166 #define RAY_ECFS_CARD_OK RAY_ECFS_TEST_COMPLETE 167 168 /* configure/status/control memory */ 169 struct ray_csc { 170 u_int8_t csc_mrxo_own; /* 0 ECF writes, 1 host write */ 171 u_int8_t csc_mrxc_own; /* " */ 172 u_int8_t csc_rxhc_own; /* " */ 173 u_int8_t csc_resv; 174 u_int16_t csc_mrx_overflow; /* ECF incs on rx overflow */ 175 u_int16_t csc_mrx_cksum; /* " on cksum error */ 176 u_int16_t csc_rx_hcksum; /* " on header cksum error */ 177 u_int8_t csc_rx_noise; /* average RSL measurement */ 178 }; 179 180 /* status area */ 181 struct ray_status { 182 u_int8_t st_startup_word; 183 u_int8_t st_station_addr[ETHER_ADDR_LEN]; 184 u_int8_t st_calc_prog_cksum; 185 u_int8_t st_calc_cis_cksum; 186 u_int8_t st_ecf_spare[7]; 187 u_int8_t st_japan_callsign[12]; 188 }; 189 190 /* 191 * Host to ECF data formats 192 */ 193 struct ray_startup_params_head { 194 u_int8_t sp_net_type; /* 0: ad-hoc 1: infra */ 195 u_int8_t sp_ap_status; /* 0: terminal 1: access-point */ 196 u_int8_t sp_ssid[RAY_MAXSSIDLEN]; /* current SSID */ 197 u_int8_t sp_scan_mode; /* 1: active */ 198 u_int8_t sp_apm_mode; /* 0: none 1: power-saving */ 199 u_int8_t sp_mac_addr[ETHER_ADDR_LEN]; 200 u_int8_t sp_frag_thresh[2]; 201 /*2c*/ u_int8_t sp_dwell_time[2]; 202 /*2e*/ u_int8_t sp_beacon_period[2]; 203 /*30*/ u_int8_t sp_dtim_interval; 204 /*31*/ u_int8_t sp_max_retry; /* number of times to attemp tx */ 205 /*32*/ u_int8_t sp_ack_timo; 206 /*33*/ u_int8_t sp_sifs; 207 /*34*/ u_int8_t sp_difs; 208 /*35*/ u_int8_t sp_pifs; 209 /*36*/ u_int8_t sp_rts_thresh[2]; 210 /*38*/ u_int8_t sp_scan_dwell[2]; 211 /*3a*/ u_int8_t sp_scan_max_dwell[2]; 212 /*3c*/ u_int8_t sp_assoc_timo; 213 /*3d*/ u_int8_t sp_adhoc_scan_cycle; 214 /*3e*/ u_int8_t sp_infra_scan_cycle; 215 /*3f*/ u_int8_t sp_infra_super_scan_cycle; 216 /*40*/ u_int8_t sp_promisc; 217 /*41*/ u_int8_t sp_uniq_word[2]; 218 /*43*/ u_int8_t sp_slot_time; 219 /*44*/ u_int8_t sp_roam_low_snr_thresh; /* if below this inc count */ 220 221 /*45*/ u_int8_t sp_low_snr_count; /* roam after cnt below thrsh */ 222 /*46*/ u_int8_t sp_infra_missed_beacon_count; 223 /*47*/ u_int8_t sp_adhoc_missed_beacon_count; 224 225 /*48*/ u_int8_t sp_country_code; 226 /*49*/ u_int8_t sp_hop_seq; 227 /*4a*/ u_int8_t sp_hop_seq_len; /* no longer supported */ 228 } __packed; 229 230 /* build 5 tail to the startup params */ 231 struct ray_startup_params_tail_5 { 232 u_int8_t sp_cw_max[2]; 233 u_int8_t sp_cw_min[2]; 234 u_int8_t sp_noise_filter_gain; 235 u_int8_t sp_noise_limit_offset; 236 u_int8_t sp_rssi_thresh_offset; 237 u_int8_t sp_busy_thresh_offset; 238 u_int8_t sp_sync_thresh; 239 u_int8_t sp_test_mode; 240 u_int8_t sp_test_min_chan; 241 u_int8_t sp_test_max_chan; 242 u_int8_t sp_allow_probe_resp; 243 u_int8_t sp_privacy_must_start; 244 u_int8_t sp_privacy_can_join; 245 u_int8_t sp_basic_rate_set[8]; 246 } __packed; 247 248 /* build 4 (webgear) tail to the startup params */ 249 struct ray_startup_params_tail_4 { 250 /*4b*/ u_int8_t sp_cw_max; /* 2 bytes in build 5 */ 251 /*4c*/ u_int8_t sp_cw_min; /* 2 bytes in build 5 */ 252 /*4e*/ u_int8_t sp_noise_filter_gain; 253 /*4f*/ u_int8_t sp_noise_limit_offset; 254 u_int8_t sp_rssi_thresh_offset; 255 u_int8_t sp_busy_thresh_offset; 256 u_int8_t sp_sync_thresh; 257 u_int8_t sp_test_mode; 258 u_int8_t sp_test_min_chan; 259 u_int8_t sp_test_max_chan; 260 /* more bytes in build 5 */ 261 } __packed; 262 263 /* 264 * Parameter IDs for the update/report param commands and values if 265 * relevant 266 */ 267 #define RAY_PID_NET_TYPE 0 268 #define RAY_PID_AP_STATUS 1 269 #define RAY_PID_SSID 2 270 #define RAY_PID_SCAN_MODE 3 271 #define RAY_PID_APM_MODE 4 272 #define RAY_PID_MAC_ADDR 5 273 #define RAY_PID_FRAG_THRESH 6 274 #define RAY_PID_DWELL_TIME 7 275 #define RAY_PID_BEACON_PERIOD 8 276 #define RAY_PID_DTIM_INT 9 277 #define RAY_PID_MAX_RETRY 10 278 #define RAY_PID_ACK_TIMO 11 279 #define RAY_PID_SIFS 12 280 #define RAY_PID_DIFS 13 281 #define RAY_PID_PIFS 14 282 #define RAY_PID_RTS_THRESH 15 283 #define RAY_PID_SCAN_DWELL_PERIOD 16 284 #define RAY_PID_MAX_SCAN_DWELL_PERIOD 17 285 #define RAY_PID_ASSOC_TIMO 18 286 #define RAY_PID_ADHOC_SCAN_CYCLE 19 287 #define RAY_PID_INFRA_SCAN_CYCLE 20 288 #define RAY_PID_INFRA_SUPER_SCAN_CYCLE 21 289 #define RAY_PID_PROMISC 22 290 #define RAY_PID_UNIQ_WORD 23 291 #define RAY_PID_SLOT_TIME 24 292 #define RAY_PID_ROAM_LOW_SNR_THRESH 25 293 #define RAY_PID_LOW_SNR_COUNT 26 294 #define RAY_PID_INFRA_MISSED_BEACON_COUNT 27 295 #define RAY_PID_ADHOC_MISSED_BEACON_COUNT 28 296 #define RAY_PID_COUNTRY_CODE 29 297 #define RAY_PID_HOP_SEQ 30 298 #define RAY_PID_HOP_SEQ_LEN 31 299 #define RAY_PID_CW_MAX 32 300 #define RAY_PID_CW_MIN 33 301 #define RAY_PID_NOISE_FILTER_GAIN 34 302 #define RAY_PID_NOISE_LIMIT_OFFSET 35 303 #define RAY_PID_RSSI_THRESH_OFFSET 36 304 #define RAY_PID_BUSY_THRESH_OFFSET 37 305 #define RAY_PID_SYNC_THRESH 38 306 #define RAY_PID_TEST_MODE 39 307 #define RAY_PID_TEST_MIN_CHAN 40 308 #define RAY_PID_TEST_MAX_CHAN 41 309 #define RAY_PID_ALLOW_PROBE_RESP 42 310 #define RAY_PID_PRIVACY_MUST_START 43 311 #define RAY_PID_PRIVACY_CAN_JOIN 44 312 #define RAY_PID_BASIC_RATE_SET 45 313 #define RAY_PID_MAX 46 314 315 /* 316 * various values for the above parameters 317 */ 318 #define RAY_PID_NET_TYPE_ADHOC 0x00 319 #define RAY_PID_NET_TYPE_INFRA 0x01 320 321 #define RAY_PID_AP_STATUS_TERMINAL 0x00 /* not access-point */ 322 #define RAY_PID_AP_STATUS_AP 0x01 /* act as access-point */ 323 324 #define RAY_PID_SCAN_MODE_PASSIVE 0x00 /* hw doesn't implement */ 325 #define RAY_PID_SCAN_MODE_ACTIVE 0x01 326 327 #define RAY_PID_APM_MODE_NONE 0x00 /* no power saving */ 328 #define RAY_PID_APM_MODE_PS 0x01 /* power saving mode */ 329 330 #define RAY_PID_COUNTRY_CODE_USA 0x1 331 #define RAY_PID_COUNTRY_CODE_EUROPE 0x2 332 #define RAY_PID_COUNTRY_CODE_JAPAN 0x3 333 #define RAY_PID_COUNTRY_CODE_KOREA 0x4 334 #define RAY_PID_COUNTRY_CODE_SPAIN 0x5 335 #define RAY_PID_COUNTRY_CODE_FRANCE 0x6 336 #define RAY_PID_COUNTRY_CODE_ISRAEL 0x7 337 #define RAY_PID_COUNTRY_CODE_AUSTRALIA 0x8 338 #define RAY_PID_COUNTRY_CODE_JAPAN_TEST 0x9 339 #define RAY_PID_COUNTRY_CODE_MAX 0xa 340 341 #define RAY_PID_TEST_MODE_NORMAL 0x0 342 #define RAY_PID_TEST_MODE_ANT_1 0x1 343 #define RAY_PID_TEST_MODE_ATN_2 0x2 344 #define RAY_PID_TEST_MODE_ATN_BOTH 0x3 345 346 #define RAY_PID_ALLOW_PROBE_RESP_DISALLOW 0x0 347 #define RAY_PID_ALLOW_PROBE_RESP_ALLOW 0x1 348 349 #define RAY_PID_PRIVACY_MUST_START_NOWEP 0x0 350 #define RAY_PID_PRIVACY_MUST_START_WEP 0x1 351 352 #define RAY_PID_PRIVACY_CAN_JOIN_NOWEP 0x0 353 #define RAY_PID_PRIVACY_CAN_JOIN_WEP 0x1 354 #define RAY_PID_PRIVACY_CAN_JOIN_DONT_CARE 0x2 355 356 #define RAY_PID_BASIC_RATE_500K 1 357 #define RAY_PID_BASIC_RATE_1000K 2 358 #define RAY_PID_BASIC_RATE_1500K 3 359 #define RAY_PID_BASIC_RATE_2000K 4 360 361 /* 362 * System Control Block 363 */ 364 #define RAY_SCB_CCSI 0x00 /* host CCS index */ 365 #define RAY_SCB_RCCSI 0x01 /* ecf RCCS index */ 366 367 /* 368 * command control structures (for CCSR commands) 369 */ 370 371 /* 372 * commands for CCSR 373 */ 374 #define RAY_CMD_START_PARAMS 0x01 /* download start params */ 375 #define RAY_CMD_UPDATE_PARAMS 0x02 /* update params */ 376 #define RAY_CMD_REPORT_PARAMS 0x03 /* report params */ 377 #define RAY_CMD_UPDATE_MCAST 0x04 /* update mcast list */ 378 #define RAY_CMD_UPDATE_APM 0x05 /* update power saving mode */ 379 #define RAY_CMD_START_NET 0x06 380 #define RAY_CMD_JOIN_NET 0x07 381 #define RAY_CMD_START_ASSOC 0x08 382 #define RAY_CMD_TX_REQ 0x09 383 #define RAY_CMD_TEST_MEM 0x0a 384 #define RAY_CMD_SHUTDOWN 0x0b 385 #define RAY_CMD_DUMP_MEM 0x0c 386 #define RAY_CMD_START_TIMER 0x0d 387 #define RAY_CMD_MAX 0x0e 388 389 /* 390 * unsolicited commands from the ECF 391 */ 392 #define RAY_ECMD_RX_DONE 0x80 /* process rx packet */ 393 #define RAY_ECMD_REJOIN_DONE 0x81 /* rejoined the network */ 394 #define RAY_ECMD_ROAM_START 0x82 /* roaming started */ 395 #define RAY_ECMD_JAPAN_CALL_SIGNAL 0x83 /* japan test thing */ 396 397 398 #define RAY_CCS_LINK_NULL 0xff 399 #define RAY_CCS_SIZE 16 400 401 #define RAY_CCS_TX_FIRST 0 402 #define RAY_CCS_TX_LAST 13 403 #define RAY_CCS_NTX (RAY_CCS_TX_LAST - RAY_CCS_TX_FIRST + 1) 404 #define RAY_TX_BUF_SIZE 2048 405 #define RAY_CCS_CMD_FIRST 14 406 #define RAY_CCS_CMD_LAST 63 407 #define RAY_CCS_NCMD (RAY_CCS_CMD_LAST - RAY_CCS_CMD_FIRST + 1) 408 #define RAY_CCS_LAST 63 409 410 #define RAY_RCCS_FIRST 64 411 #define RAY_RCCS_LAST 127 412 413 struct ray_cmd { 414 u_int8_t c_status; /* ccs generic header */ 415 u_int8_t c_cmd; /* " */ 416 u_int8_t c_link; /* " */ 417 }; 418 419 #define RAY_CCS_STATUS_FREE 0x0 420 #define RAY_CCS_STATUS_BUSY 0x1 421 #define RAY_CCS_STATUS_COMPLETE 0x2 422 #define RAY_CCS_STATUS_FAIL 0x3 423 424 /* RAY_CMD_UPDATE_PARAMS */ 425 struct ray_cmd_update { 426 u_int8_t c_status; /* ccs generic header */ 427 u_int8_t c_cmd; /* " */ 428 u_int8_t c_link; /* " */ 429 u_int8_t c_paramid; 430 u_int8_t c_nparam; 431 u_int8_t c_failcause; 432 }; 433 434 /* RAY_CMD_REPORT_PARAMS */ 435 struct ray_cmd_report { 436 u_int8_t c_status; /* ccs generic header */ 437 u_int8_t c_cmd; /* " */ 438 u_int8_t c_link; /* " */ 439 u_int8_t c_paramid; 440 u_int8_t c_nparam; 441 u_int8_t c_failcause; 442 u_int8_t c_len; 443 }; 444 445 /* RAY_CMD_UPDATE_MCAST */ 446 struct ray_cmd_update_mcast { 447 u_int8_t c_status; /* ccs generic header */ 448 u_int8_t c_cmd; /* " */ 449 u_int8_t c_link; /* " */ 450 u_int8_t c_nmcast; 451 }; 452 453 /* RAY_CMD_UPDATE_APM */ 454 struct ray_cmd_udpate_apm { 455 u_int8_t c_status; /* ccs generic header */ 456 u_int8_t c_cmd; /* " */ 457 u_int8_t c_link; /* " */ 458 u_int8_t c_mode; 459 }; 460 461 /* RAY_CMD_START_NET and RAY_CMD_JOIN_NET */ 462 struct ray_cmd_net { 463 u_int8_t c_status; /* ccs generic header */ 464 u_int8_t c_cmd; /* " */ 465 u_int8_t c_link; /* " */ 466 u_int8_t c_upd_param; 467 u_int8_t c_bss_id[ETHER_ADDR_LEN]; 468 u_int8_t c_inited; 469 u_int8_t c_def_txrate; 470 u_int8_t c_encrypt; 471 }; 472 473 /* parameters passwd in h2e section when c_upd_param is set in ray_cmd_net */ 474 struct ray_net_params { 475 u_int8_t p_net_type; 476 u_int8_t p_ssid[32]; 477 u_int8_t p_privacy_must_start; 478 u_int8_t p_privacy_can_join; 479 }; 480 481 /* RAY_CMD_UPDATE_ASSOC */ 482 struct ray_cmd_update_assoc { 483 u_int8_t c_status; /* ccs generic header */ 484 u_int8_t c_cmd; /* " */ 485 u_int8_t c_link; /* " */ 486 u_int8_t c_astatus; 487 u_int8_t c_aid[2]; 488 }; 489 490 /* RAY_CMD_TX_REQ */ 491 struct ray_cmd_tx { 492 u_int8_t c_status; /* ccs generic header */ 493 u_int8_t c_cmd; /* " */ 494 u_int8_t c_link; /* " */ 495 u_int8_t c_bufp[2]; 496 u_int8_t c_len[2]; 497 u_int8_t c_resv[5]; 498 u_int8_t c_tx_rate; 499 u_int8_t c_apm_mode; 500 u_int8_t c_nretry; 501 u_int8_t c_antenna; 502 }; 503 504 /* RAY_CMD_TX_REQ (for build 4) */ 505 struct ray_cmd_tx_4 { 506 u_int8_t c_status; /* ccs generic header */ 507 u_int8_t c_cmd; /* " */ 508 u_int8_t c_link; /* " */ 509 u_int8_t c_bufp[2]; 510 u_int8_t c_len[2]; 511 u_int8_t c_addr[ETHER_ADDR_LEN]; 512 u_int8_t c_apm_mode; 513 u_int8_t c_nretry; 514 u_int8_t c_antenna; 515 }; 516 517 /* RAY_CMD_DUMP_MEM */ 518 struct ray_cmd_dump_mem { 519 u_int8_t c_status; /* ccs generic header */ 520 u_int8_t c_cmd; /* " */ 521 u_int8_t c_link; /* " */ 522 u_int8_t c_memtype; 523 u_int8_t c_memp[2]; 524 u_int8_t c_len; 525 }; 526 527 /* RAY_CMD_START_TIMER */ 528 struct ray_cmd_start_timer { 529 u_int8_t c_status; /* ccs generic header */ 530 u_int8_t c_cmd; /* " */ 531 u_int8_t c_link; /* " */ 532 u_int8_t c_duration[2]; 533 }; 534 535 struct ray_cmd_rx { 536 u_int8_t c_status; /* ccs generic header */ 537 u_int8_t c_cmd; /* " */ 538 u_int8_t c_link; /* " */ 539 u_int8_t c_bufp[2]; /* buffer pointer */ 540 u_int8_t c_len[2]; /* length */ 541 u_int8_t c_siglev; /* signal level */ 542 u_int8_t c_nextfrag; /* next fragment in packet */ 543 u_int8_t c_pktlen[2]; /* total packet length */ 544 u_int8_t c_antenna; /* antenna with best reception */ 545 u_int8_t c_updbss; /* only 1 for beacon messages */ 546 }; 547 548 #define RAY_TX_PHY_SIZE 0x4 549 550 /* this is used by the user to request objects */ 551 struct ray_param_req { 552 int r_failcause; 553 u_int8_t r_paramid; 554 u_int8_t r_len; 555 u_int8_t r_data[256]; 556 }; 557 #define RAY_FAILCAUSE_EIDRANGE 1 558 #define RAY_FAILCAUSE_ELENGTH 2 559 /* device can possibly return up to 255 */ 560 #define RAY_FAILCAUSE_EDEVSTOP 256 561 562 #ifdef _KERNEL 563 #define RAY_FAILCAUSE_WAITING 257 564 #endif 565 566 /* get a param the data is a ray_param_request structure */ 567 #define SIOCSRAYPARAM SIOCSIFGENERIC 568 #define SIOCGRAYPARAM SIOCGIFGENERIC 569 570 #define RAY_PID_STRINGS { \ 571 "RAY_PID_NET_TYPE", \ 572 "RAY_PID_AP_STATUS", \ 573 "RAY_PID_SSID", \ 574 "RAY_PID_SCAN_MODE", \ 575 "RAY_PID_APM_MODE", \ 576 "RAY_PID_MAC_ADDR", \ 577 "RAY_PID_FRAG_THRESH", \ 578 "RAY_PID_DWELL_TIME", \ 579 "RAY_PID_BEACON_PERIOD", \ 580 "RAY_PID_DTIM_INT", \ 581 "RAY_PID_MAX_RETRY", \ 582 "RAY_PID_ACK_TIMO", \ 583 "RAY_PID_SIFS", \ 584 "RAY_PID_DIFS", \ 585 "RAY_PID_PIFS", \ 586 "RAY_PID_RTS_THRESH", \ 587 "RAY_PID_SCAN_DWELL_PERIOD", \ 588 "RAY_PID_MAX_SCAN_DWELL_PERIOD", \ 589 "RAY_PID_ASSOC_TIMO", \ 590 "RAY_PID_ADHOC_SCAN_CYCLE", \ 591 "RAY_PID_INFRA_SCAN_CYCLE", \ 592 "RAY_PID_INFRA_SUPER_SCAN_CYCLE", \ 593 "RAY_PID_PROMISC", \ 594 "RAY_PID_UNIQ_WORD", \ 595 "RAY_PID_SLOT_TIME", \ 596 "RAY_PID_ROAM_LOW_SNR_THRESH", \ 597 "RAY_PID_LOW_SNR_COUNT", \ 598 "RAY_PID_INFRA_MISSED_BEACON_COUNT", \ 599 "RAY_PID_ADHOC_MISSED_BEACON_COUNT", \ 600 "RAY_PID_COUNTRY_CODE", \ 601 "RAY_PID_HOP_SEQ", \ 602 "RAY_PID_HOP_SEQ_LEN", \ 603 "RAY_PID_CW_MAX", \ 604 "RAY_PID_CW_MIN", \ 605 "RAY_PID_NOISE_FILTER_GAIN", \ 606 "RAY_PID_NOISE_LIMIT_OFFSET", \ 607 "RAY_PID_RSSI_THRESH_OFFSET", \ 608 "RAY_PID_BUSY_THRESH_OFFSET", \ 609 "RAY_PID_SYNC_THRESH", \ 610 "RAY_PID_TEST_MODE", \ 611 "RAY_PID_TEST_MIN_CHAN", \ 612 "RAY_PID_TEST_MAX_CHAN", \ 613 "RAY_PID_ALLOW_PROBE_RESP", \ 614 "RAY_PID_PRIVACY_MUST_START", \ 615 "RAY_PID_PRIVACY_CAN_JOIN", \ 616 "RAY_PID_BASIC_RATE_SET" \ 617 } 618 619 #ifdef RAY_DO_SIGLEV 620 #define SIOCGRAYSIGLEV _IOWR('i', 201, struct ifreq) 621 622 #define RAY_NSIGLEVRECS 8 623 #define RAY_NSIGLEV 8 624 625 struct ray_siglev { 626 u_int8_t rsl_host[ETHER_ADDR_LEN]; /* MAC address */ 627 u_int8_t rsl_siglevs[RAY_NSIGLEV]; /* levels, newest in [0] */ 628 struct timeval rsl_time; /* time of last packet */ 629 }; 630 #endif 631