1 /*-
2 * Copyright (c) 2005 Marcel Moolenaar
3 * All rights reserved.
4 *
5 * Copyright (c) 2009 The FreeBSD Foundation
6 * All rights reserved.
7 *
8 * Portions of this software were developed by Ed Schouten
9 * under sponsorship from the FreeBSD Foundation.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32
33 #include "opt_acpi.h"
34
35 #include <sys/param.h>
36 #include <sys/kernel.h>
37 #include <sys/systm.h>
38 #include <sys/bus.h>
39 #include <sys/module.h>
40 #include <sys/rman.h>
41
42 #include <dev/vt/vt.h>
43 #include <dev/vt/colors/vt_termcolors.h>
44 #include <dev/vt/hw/vga/vt_vga_reg.h>
45 #include <dev/pci/pcivar.h>
46
47 #include <machine/bus.h>
48 #if defined(__amd64__) || defined(__i386__)
49 #include <contrib/dev/acpica/include/acpi.h>
50 #include <machine/md_var.h>
51 #endif
52
53 struct vga_softc {
54 bus_space_tag_t vga_fb_tag;
55 bus_space_handle_t vga_fb_handle;
56 bus_space_tag_t vga_reg_tag;
57 bus_space_handle_t vga_reg_handle;
58 int vga_wmode;
59 term_color_t vga_curfg, vga_curbg;
60 boolean_t vga_enabled;
61 };
62
63 /* Convenience macros. */
64 #define MEM_READ1(sc, ofs) \
65 bus_space_read_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs)
66 #define MEM_WRITE1(sc, ofs, val) \
67 bus_space_write_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val)
68 #define MEM_WRITE2(sc, ofs, val) \
69 bus_space_write_2(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val)
70 #define REG_READ1(sc, reg) \
71 bus_space_read_1(sc->vga_reg_tag, sc->vga_reg_handle, reg)
72 #define REG_WRITE1(sc, reg, val) \
73 bus_space_write_1(sc->vga_reg_tag, sc->vga_reg_handle, reg, val)
74
75 #define VT_VGA_WIDTH 640
76 #define VT_VGA_HEIGHT 480
77 #define VT_VGA_MEMSIZE (VT_VGA_WIDTH * VT_VGA_HEIGHT / 8)
78
79 /*
80 * VGA is designed to handle 8 pixels at a time (8 pixels in one byte of
81 * memory).
82 */
83 #define VT_VGA_PIXELS_BLOCK 8
84
85 /*
86 * We use an off-screen addresses to:
87 * o store the background color;
88 * o store pixels pattern.
89 * Those addresses are then loaded in the latches once.
90 */
91 #define VT_VGA_BGCOLOR_OFFSET VT_VGA_MEMSIZE
92
93 static vd_probe_t vga_probe;
94 static vd_init_t vga_init;
95 static vd_blank_t vga_blank;
96 static vd_bitblt_text_t vga_bitblt_text;
97 static vd_invalidate_text_t vga_invalidate_text;
98 static vd_bitblt_bmp_t vga_bitblt_bitmap;
99 static vd_drawrect_t vga_drawrect;
100 static vd_setpixel_t vga_setpixel;
101 static vd_postswitch_t vga_postswitch;
102
103 static const struct vt_driver vt_vga_driver = {
104 .vd_name = "vga",
105 .vd_probe = vga_probe,
106 .vd_init = vga_init,
107 .vd_blank = vga_blank,
108 .vd_bitblt_text = vga_bitblt_text,
109 .vd_invalidate_text = vga_invalidate_text,
110 .vd_bitblt_bmp = vga_bitblt_bitmap,
111 .vd_drawrect = vga_drawrect,
112 .vd_setpixel = vga_setpixel,
113 .vd_postswitch = vga_postswitch,
114 .vd_priority = VD_PRIORITY_GENERIC,
115 };
116
117 /*
118 * Driver supports both text mode and graphics mode. Make sure the
119 * buffer is always big enough to support both.
120 */
121 static struct vga_softc vga_conssoftc;
122 VT_DRIVER_DECLARE(vt_vga, vt_vga_driver);
123
124 static inline void
vga_setwmode(struct vt_device * vd,int wmode)125 vga_setwmode(struct vt_device *vd, int wmode)
126 {
127 struct vga_softc *sc = vd->vd_softc;
128
129 if (sc->vga_wmode == wmode)
130 return;
131
132 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE);
133 REG_WRITE1(sc, VGA_GC_DATA, wmode);
134 sc->vga_wmode = wmode;
135
136 switch (wmode) {
137 case 3:
138 /* Re-enable all planes. */
139 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK);
140 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 |
141 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0);
142 break;
143 }
144 }
145
146 static inline void
vga_setfg(struct vt_device * vd,term_color_t color)147 vga_setfg(struct vt_device *vd, term_color_t color)
148 {
149 struct vga_softc *sc = vd->vd_softc;
150
151 vga_setwmode(vd, 3);
152
153 if (sc->vga_curfg == color)
154 return;
155
156 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET);
157 REG_WRITE1(sc, VGA_GC_DATA, cons_to_vga_colors[color]);
158 sc->vga_curfg = color;
159 }
160
161 static inline void
vga_setbg(struct vt_device * vd,term_color_t color)162 vga_setbg(struct vt_device *vd, term_color_t color)
163 {
164 struct vga_softc *sc = vd->vd_softc;
165
166 vga_setwmode(vd, 3);
167
168 if (sc->vga_curbg == color)
169 return;
170
171 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET);
172 REG_WRITE1(sc, VGA_GC_DATA, cons_to_vga_colors[color]);
173
174 /*
175 * Write 8 pixels using the background color to an off-screen
176 * byte in the video memory.
177 */
178 MEM_WRITE1(sc, VT_VGA_BGCOLOR_OFFSET, 0xff);
179
180 /*
181 * Read those 8 pixels back to load the background color in the
182 * latches register.
183 */
184 MEM_READ1(sc, VT_VGA_BGCOLOR_OFFSET);
185
186 sc->vga_curbg = color;
187
188 /*
189 * The Set/Reset register doesn't contain the fg color anymore,
190 * store an invalid color.
191 */
192 sc->vga_curfg = 0xff;
193 }
194
195 /*
196 * Binary searchable table for Unicode to CP437 conversion.
197 */
198
199 struct unicp437 {
200 uint16_t unicode_base;
201 uint8_t cp437_base;
202 uint8_t length;
203 };
204
205 static const struct unicp437 cp437table[] = {
206 { 0x0020, 0x20, 0x5e }, { 0x00a0, 0x20, 0x00 },
207 { 0x00a1, 0xad, 0x00 }, { 0x00a2, 0x9b, 0x00 },
208 { 0x00a3, 0x9c, 0x00 }, { 0x00a5, 0x9d, 0x00 },
209 { 0x00a6, 0x7c, 0x00 },
210 { 0x00a7, 0x15, 0x00 }, { 0x00aa, 0xa6, 0x00 },
211 { 0x00ab, 0xae, 0x00 }, { 0x00ac, 0xaa, 0x00 },
212 { 0x00b0, 0xf8, 0x00 }, { 0x00b1, 0xf1, 0x00 },
213 { 0x00b2, 0xfd, 0x00 }, { 0x00b5, 0xe6, 0x00 },
214 { 0x00b6, 0x14, 0x00 }, { 0x00b7, 0xfa, 0x00 },
215 { 0x00ba, 0xa7, 0x00 }, { 0x00bb, 0xaf, 0x00 },
216 { 0x00bc, 0xac, 0x00 }, { 0x00bd, 0xab, 0x00 },
217 { 0x00bf, 0xa8, 0x00 }, { 0x00c4, 0x8e, 0x01 },
218 { 0x00c6, 0x92, 0x00 }, { 0x00c7, 0x80, 0x00 },
219 { 0x00c9, 0x90, 0x00 }, { 0x00d1, 0xa5, 0x00 },
220 { 0x00d6, 0x99, 0x00 }, { 0x00dc, 0x9a, 0x00 },
221 { 0x00df, 0xe1, 0x00 }, { 0x00e0, 0x85, 0x00 },
222 { 0x00e1, 0xa0, 0x00 }, { 0x00e2, 0x83, 0x00 },
223 { 0x00e4, 0x84, 0x00 }, { 0x00e5, 0x86, 0x00 },
224 { 0x00e6, 0x91, 0x00 }, { 0x00e7, 0x87, 0x00 },
225 { 0x00e8, 0x8a, 0x00 }, { 0x00e9, 0x82, 0x00 },
226 { 0x00ea, 0x88, 0x01 }, { 0x00ec, 0x8d, 0x00 },
227 { 0x00ed, 0xa1, 0x00 }, { 0x00ee, 0x8c, 0x00 },
228 { 0x00ef, 0x8b, 0x00 }, { 0x00f0, 0xeb, 0x00 },
229 { 0x00f1, 0xa4, 0x00 }, { 0x00f2, 0x95, 0x00 },
230 { 0x00f3, 0xa2, 0x00 }, { 0x00f4, 0x93, 0x00 },
231 { 0x00f6, 0x94, 0x00 }, { 0x00f7, 0xf6, 0x00 },
232 { 0x00f8, 0xed, 0x00 }, { 0x00f9, 0x97, 0x00 },
233 { 0x00fa, 0xa3, 0x00 }, { 0x00fb, 0x96, 0x00 },
234 { 0x00fc, 0x81, 0x00 }, { 0x00ff, 0x98, 0x00 },
235 { 0x0192, 0x9f, 0x00 }, { 0x0393, 0xe2, 0x00 },
236 { 0x0398, 0xe9, 0x00 }, { 0x03a3, 0xe4, 0x00 },
237 { 0x03a6, 0xe8, 0x00 }, { 0x03a9, 0xea, 0x00 },
238 { 0x03b1, 0xe0, 0x01 }, { 0x03b4, 0xeb, 0x00 },
239 { 0x03b5, 0xee, 0x00 }, { 0x03bc, 0xe6, 0x00 },
240 { 0x03c0, 0xe3, 0x00 }, { 0x03c3, 0xe5, 0x00 },
241 { 0x03c4, 0xe7, 0x00 }, { 0x03c6, 0xed, 0x00 },
242 { 0x03d5, 0xed, 0x00 }, { 0x2010, 0x2d, 0x00 },
243 { 0x2013, 0x2d, 0x00 },
244 { 0x2014, 0x2d, 0x00 }, { 0x2018, 0x60, 0x00 },
245 { 0x2019, 0x27, 0x00 }, { 0x201c, 0x22, 0x00 },
246 { 0x201d, 0x22, 0x00 }, { 0x2022, 0x07, 0x00 },
247 { 0x203c, 0x13, 0x00 }, { 0x207f, 0xfc, 0x00 },
248 { 0x20a7, 0x9e, 0x00 }, { 0x20ac, 0xee, 0x00 },
249 { 0x2126, 0xea, 0x00 }, { 0x2190, 0x1b, 0x00 },
250 { 0x2191, 0x18, 0x00 }, { 0x2192, 0x1a, 0x00 },
251 { 0x2193, 0x19, 0x00 }, { 0x2194, 0x1d, 0x00 },
252 { 0x2195, 0x12, 0x00 }, { 0x21a8, 0x17, 0x00 },
253 { 0x2202, 0xeb, 0x00 }, { 0x2208, 0xee, 0x00 },
254 { 0x2211, 0xe4, 0x00 }, { 0x2212, 0x2d, 0x00 },
255 { 0x2219, 0xf9, 0x00 }, { 0x221a, 0xfb, 0x00 },
256 { 0x221e, 0xec, 0x00 }, { 0x221f, 0x1c, 0x00 },
257 { 0x2229, 0xef, 0x00 }, { 0x2248, 0xf7, 0x00 },
258 { 0x2261, 0xf0, 0x00 }, { 0x2264, 0xf3, 0x00 },
259 { 0x2265, 0xf2, 0x00 }, { 0x2302, 0x7f, 0x00 },
260 { 0x2310, 0xa9, 0x00 }, { 0x2320, 0xf4, 0x00 },
261 { 0x2321, 0xf5, 0x00 }, { 0x2500, 0xc4, 0x00 },
262 { 0x2502, 0xb3, 0x00 }, { 0x250c, 0xda, 0x00 },
263 { 0x2510, 0xbf, 0x00 }, { 0x2514, 0xc0, 0x00 },
264 { 0x2518, 0xd9, 0x00 }, { 0x251c, 0xc3, 0x00 },
265 { 0x2524, 0xb4, 0x00 }, { 0x252c, 0xc2, 0x00 },
266 { 0x2534, 0xc1, 0x00 }, { 0x253c, 0xc5, 0x00 },
267 { 0x2550, 0xcd, 0x00 }, { 0x2551, 0xba, 0x00 },
268 { 0x2552, 0xd5, 0x00 }, { 0x2553, 0xd6, 0x00 },
269 { 0x2554, 0xc9, 0x00 }, { 0x2555, 0xb8, 0x00 },
270 { 0x2556, 0xb7, 0x00 }, { 0x2557, 0xbb, 0x00 },
271 { 0x2558, 0xd4, 0x00 }, { 0x2559, 0xd3, 0x00 },
272 { 0x255a, 0xc8, 0x00 }, { 0x255b, 0xbe, 0x00 },
273 { 0x255c, 0xbd, 0x00 }, { 0x255d, 0xbc, 0x00 },
274 { 0x255e, 0xc6, 0x01 }, { 0x2560, 0xcc, 0x00 },
275 { 0x2561, 0xb5, 0x00 }, { 0x2562, 0xb6, 0x00 },
276 { 0x2563, 0xb9, 0x00 }, { 0x2564, 0xd1, 0x01 },
277 { 0x2566, 0xcb, 0x00 }, { 0x2567, 0xcf, 0x00 },
278 { 0x2568, 0xd0, 0x00 }, { 0x2569, 0xca, 0x00 },
279 { 0x256a, 0xd8, 0x00 }, { 0x256b, 0xd7, 0x00 },
280 { 0x256c, 0xce, 0x00 }, { 0x2580, 0xdf, 0x00 },
281 { 0x2584, 0xdc, 0x00 }, { 0x2588, 0xdb, 0x00 },
282 { 0x258c, 0xdd, 0x00 }, { 0x2590, 0xde, 0x00 },
283 { 0x2591, 0xb0, 0x02 }, { 0x25a0, 0xfe, 0x00 },
284 { 0x25ac, 0x16, 0x00 }, { 0x25b2, 0x1e, 0x00 },
285 { 0x25ba, 0x10, 0x00 }, { 0x25bc, 0x1f, 0x00 },
286 { 0x25c4, 0x11, 0x00 }, { 0x25cb, 0x09, 0x00 },
287 { 0x25d8, 0x08, 0x00 }, { 0x25d9, 0x0a, 0x00 },
288 { 0x263a, 0x01, 0x01 }, { 0x263c, 0x0f, 0x00 },
289 { 0x2640, 0x0c, 0x00 }, { 0x2642, 0x0b, 0x00 },
290 { 0x2660, 0x06, 0x00 }, { 0x2663, 0x05, 0x00 },
291 { 0x2665, 0x03, 0x01 }, { 0x266a, 0x0d, 0x00 },
292 { 0x266c, 0x0e, 0x00 }, { 0x2713, 0xfb, 0x00 },
293 { 0x27e8, 0x3c, 0x00 }, { 0x27e9, 0x3e, 0x00 },
294 };
295
296 static uint8_t
vga_get_cp437(term_char_t c)297 vga_get_cp437(term_char_t c)
298 {
299 int min, mid, max;
300
301 min = 0;
302 max = nitems(cp437table) - 1;
303
304 if (c < cp437table[0].unicode_base ||
305 c > cp437table[max].unicode_base + cp437table[max].length)
306 return '?';
307
308 while (max >= min) {
309 mid = (min + max) / 2;
310 if (c < cp437table[mid].unicode_base)
311 max = mid - 1;
312 else if (c > cp437table[mid].unicode_base +
313 cp437table[mid].length)
314 min = mid + 1;
315 else
316 return (c - cp437table[mid].unicode_base +
317 cp437table[mid].cp437_base);
318 }
319
320 return '?';
321 }
322
323 static void
vga_blank(struct vt_device * vd,term_color_t color)324 vga_blank(struct vt_device *vd, term_color_t color)
325 {
326 struct vga_softc *sc = vd->vd_softc;
327 u_int ofs;
328
329 vga_setfg(vd, color);
330 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++)
331 MEM_WRITE1(sc, ofs, 0xff);
332 }
333
334 static inline void
vga_bitblt_put(struct vt_device * vd,u_long dst,term_color_t color,uint8_t v)335 vga_bitblt_put(struct vt_device *vd, u_long dst, term_color_t color,
336 uint8_t v)
337 {
338 struct vga_softc *sc = vd->vd_softc;
339
340 /* Skip empty writes, in order to avoid palette changes. */
341 if (v != 0x00) {
342 vga_setfg(vd, color);
343 /*
344 * When this MEM_READ1() gets disabled, all sorts of
345 * artifacts occur. This is because this read loads the
346 * set of 8 pixels that are about to be changed. There
347 * is one scenario where we can avoid the read, namely
348 * if all pixels are about to be overwritten anyway.
349 */
350 if (v != 0xff) {
351 MEM_READ1(sc, dst);
352
353 /* The bg color was trashed by the reads. */
354 sc->vga_curbg = 0xff;
355 }
356 MEM_WRITE1(sc, dst, v);
357 }
358 }
359
360 static void
vga_setpixel(struct vt_device * vd,int x,int y,term_color_t color)361 vga_setpixel(struct vt_device *vd, int x, int y, term_color_t color)
362 {
363
364 if (vd->vd_flags & VDF_TEXTMODE)
365 return;
366
367 vga_bitblt_put(vd, (y * VT_VGA_WIDTH / 8) + (x / 8), color,
368 0x80 >> (x % 8));
369 }
370
371 static void
vga_drawrect(struct vt_device * vd,int x1,int y1,int x2,int y2,int fill,term_color_t color)372 vga_drawrect(struct vt_device *vd, int x1, int y1, int x2, int y2, int fill,
373 term_color_t color)
374 {
375 int x, y;
376
377 if (vd->vd_flags & VDF_TEXTMODE)
378 return;
379
380 for (y = y1; y <= y2; y++) {
381 if (fill || (y == y1) || (y == y2)) {
382 for (x = x1; x <= x2; x++)
383 vga_setpixel(vd, x, y, color);
384 } else {
385 vga_setpixel(vd, x1, y, color);
386 vga_setpixel(vd, x2, y, color);
387 }
388 }
389 }
390
391 static void
vga_compute_shifted_pattern(const uint8_t * src,unsigned int bytes,unsigned int src_x,unsigned int x_count,unsigned int dst_x,uint8_t * pattern,uint8_t * mask)392 vga_compute_shifted_pattern(const uint8_t *src, unsigned int bytes,
393 unsigned int src_x, unsigned int x_count, unsigned int dst_x,
394 uint8_t *pattern, uint8_t *mask)
395 {
396 unsigned int n;
397
398 n = src_x / 8;
399
400 /*
401 * This mask has bits set, where a pixel (ether 0 or 1)
402 * comes from the source bitmap.
403 */
404 if (mask != NULL) {
405 *mask = (0xff
406 >> (8 - x_count))
407 << (8 - x_count - dst_x);
408 }
409
410 if (n == (src_x + x_count - 1) / 8) {
411 /* All the pixels we want are in the same byte. */
412 *pattern = src[n];
413 if (dst_x >= src_x)
414 *pattern >>= (dst_x - src_x % 8);
415 else
416 *pattern <<= (src_x % 8 - dst_x);
417 } else {
418 /* The pixels we want are split into two bytes. */
419 if (dst_x >= src_x % 8) {
420 *pattern =
421 src[n] << (8 - dst_x - src_x % 8) |
422 src[n + 1] >> (dst_x - src_x % 8);
423 } else {
424 *pattern =
425 src[n] << (src_x % 8 - dst_x) |
426 src[n + 1] >> (8 - src_x % 8 - dst_x);
427 }
428 }
429 }
430
431 static void
vga_copy_bitmap_portion(uint8_t * pattern_2colors,uint8_t * pattern_ncolors,const uint8_t * src,const uint8_t * src_mask,unsigned int src_width,unsigned int src_x,unsigned int dst_x,unsigned int x_count,unsigned int src_y,unsigned int dst_y,unsigned int y_count,term_color_t fg,term_color_t bg,int overwrite)432 vga_copy_bitmap_portion(uint8_t *pattern_2colors, uint8_t *pattern_ncolors,
433 const uint8_t *src, const uint8_t *src_mask, unsigned int src_width,
434 unsigned int src_x, unsigned int dst_x, unsigned int x_count,
435 unsigned int src_y, unsigned int dst_y, unsigned int y_count,
436 term_color_t fg, term_color_t bg, int overwrite)
437 {
438 unsigned int i, bytes;
439 uint8_t pattern, relevant_bits, mask;
440
441 bytes = (src_width + 7) / 8;
442
443 for (i = 0; i < y_count; ++i) {
444 vga_compute_shifted_pattern(src + (src_y + i) * bytes,
445 bytes, src_x, x_count, dst_x, &pattern, &relevant_bits);
446
447 if (src_mask == NULL) {
448 /*
449 * No src mask. Consider that all wanted bits
450 * from the source are "authoritative".
451 */
452 mask = relevant_bits;
453 } else {
454 /*
455 * There's an src mask. We shift it the same way
456 * we shifted the source pattern.
457 */
458 vga_compute_shifted_pattern(
459 src_mask + (src_y + i) * bytes,
460 bytes, src_x, x_count, dst_x,
461 &mask, NULL);
462
463 /* Now, only keep the wanted bits among them. */
464 mask &= relevant_bits;
465 }
466
467 /*
468 * Clear bits from the pattern which must be
469 * transparent, according to the source mask.
470 */
471 pattern &= mask;
472
473 /* Set the bits in the 2-colors array. */
474 if (overwrite)
475 pattern_2colors[dst_y + i] &= ~mask;
476 pattern_2colors[dst_y + i] |= pattern;
477
478 if (pattern_ncolors == NULL)
479 continue;
480
481 /*
482 * Set the same bits in the n-colors array. This one
483 * supports transparency, when a given bit is cleared in
484 * all colors.
485 */
486 if (overwrite) {
487 /*
488 * Ensure that the pixels used by this bitmap are
489 * cleared in other colors.
490 */
491 for (int j = 0; j < 16; ++j)
492 pattern_ncolors[(dst_y + i) * 16 + j] &=
493 ~mask;
494 }
495 pattern_ncolors[(dst_y + i) * 16 + fg] |= pattern;
496 pattern_ncolors[(dst_y + i) * 16 + bg] |= (~pattern & mask);
497 }
498 }
499
500 static void
vga_bitblt_pixels_block_2colors(struct vt_device * vd,const uint8_t * masks,term_color_t fg,term_color_t bg,unsigned int x,unsigned int y,unsigned int height)501 vga_bitblt_pixels_block_2colors(struct vt_device *vd, const uint8_t *masks,
502 term_color_t fg, term_color_t bg,
503 unsigned int x, unsigned int y, unsigned int height)
504 {
505 unsigned int i, offset;
506 struct vga_softc *sc;
507
508 /*
509 * The great advantage of Write Mode 3 is that we just need
510 * to load the foreground in the Set/Reset register, load the
511 * background color in the latches register (this is done
512 * through a write in offscreen memory followed by a read of
513 * that data), then write the pattern to video memory. This
514 * pattern indicates if the pixel should use the foreground
515 * color (bit set) or the background color (bit cleared).
516 */
517
518 vga_setbg(vd, bg);
519 vga_setfg(vd, fg);
520
521 sc = vd->vd_softc;
522 offset = (VT_VGA_WIDTH * y + x) / 8;
523
524 for (i = 0; i < height; ++i, offset += VT_VGA_WIDTH / 8) {
525 MEM_WRITE1(sc, offset, masks[i]);
526 }
527 }
528
529 static void
vga_bitblt_pixels_block_ncolors(struct vt_device * vd,const uint8_t * masks,unsigned int x,unsigned int y,unsigned int height)530 vga_bitblt_pixels_block_ncolors(struct vt_device *vd, const uint8_t *masks,
531 unsigned int x, unsigned int y, unsigned int height)
532 {
533 unsigned int i, j, plane, color, offset;
534 struct vga_softc *sc;
535 uint8_t mask, planes[height * 4];
536
537 sc = vd->vd_softc;
538
539 memset(planes, 0, sizeof(planes));
540
541 /*
542 * To write a group of pixels using 3 or more colors, we select
543 * Write Mode 0 and write one byte to each plane separately.
544 */
545
546 /*
547 * We first compute each byte: each plane contains one bit of the
548 * color code for each of the 8 pixels.
549 *
550 * For example, if the 8 pixels are like this:
551 * GBBBBBBY
552 * where:
553 * G (gray) = 0b0111
554 * B (black) = 0b0000
555 * Y (yellow) = 0b0011
556 *
557 * The corresponding for bytes are:
558 * GBBBBBBY
559 * Plane 0: 10000001 = 0x81
560 * Plane 1: 10000001 = 0x81
561 * Plane 2: 10000000 = 0x80
562 * Plane 3: 00000000 = 0x00
563 * | | |
564 * | | +-> 0b0011 (Y)
565 * | +-----> 0b0000 (B)
566 * +--------> 0b0111 (G)
567 */
568
569 for (i = 0; i < height; ++i) {
570 for (color = 0; color < 16; ++color) {
571 mask = masks[i * 16 + color];
572 if (mask == 0x00)
573 continue;
574
575 for (j = 0; j < 8; ++j) {
576 if (!((mask >> (7 - j)) & 0x1))
577 continue;
578
579 /* The pixel "j" uses color "color". */
580 for (plane = 0; plane < 4; ++plane)
581 planes[i * 4 + plane] |=
582 ((cons_to_vga_colors[color] >>
583 plane) & 0x1) << (7 - j);
584 }
585 }
586 }
587
588 /*
589 * The bytes are ready: we now switch to Write Mode 0 and write
590 * all bytes, one plane at a time.
591 */
592 vga_setwmode(vd, 0);
593
594 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK);
595 for (plane = 0; plane < 4; ++plane) {
596 /* Select plane. */
597 REG_WRITE1(sc, VGA_SEQ_DATA, 1 << plane);
598
599 /* Write all bytes for this plane, from Y to Y+height. */
600 for (i = 0; i < height; ++i) {
601 offset = (VT_VGA_WIDTH * (y + i) + x) / 8;
602 MEM_WRITE1(sc, offset, planes[i * 4 + plane]);
603 }
604 }
605 }
606
607 static void
vga_bitblt_one_text_pixels_block(struct vt_device * vd,const struct vt_window * vw,unsigned int x,unsigned int y)608 vga_bitblt_one_text_pixels_block(struct vt_device *vd,
609 const struct vt_window *vw, unsigned int x, unsigned int y)
610 {
611 const struct vt_buf *vb;
612 const struct vt_font *vf;
613 unsigned int i, col, row, src_x, x_count;
614 unsigned int used_colors_list[16], used_colors;
615 uint8_t pattern_2colors[vw->vw_font->vf_height];
616 uint8_t pattern_ncolors[vw->vw_font->vf_height * 16];
617 term_char_t c;
618 term_color_t fg, bg;
619 const uint8_t *src;
620
621 vb = &vw->vw_buf;
622 vf = vw->vw_font;
623
624 /*
625 * The current pixels block.
626 *
627 * We fill it with portions of characters, because both "grids"
628 * may not match.
629 *
630 * i is the index in this pixels block.
631 */
632
633 i = x;
634 used_colors = 0;
635 memset(used_colors_list, 0, sizeof(used_colors_list));
636 memset(pattern_2colors, 0, sizeof(pattern_2colors));
637 memset(pattern_ncolors, 0, sizeof(pattern_ncolors));
638
639 if (i < vw->vw_draw_area.tr_begin.tp_col) {
640 /*
641 * i is in the margin used to center the text area on
642 * the screen.
643 */
644
645 i = vw->vw_draw_area.tr_begin.tp_col;
646 }
647
648 while (i < x + VT_VGA_PIXELS_BLOCK &&
649 i < vw->vw_draw_area.tr_end.tp_col) {
650 /*
651 * Find which character is drawn on this pixel in the
652 * pixels block.
653 *
654 * While here, record what colors it uses.
655 */
656
657 col = (i - vw->vw_draw_area.tr_begin.tp_col) / vf->vf_width;
658 row = (y - vw->vw_draw_area.tr_begin.tp_row) / vf->vf_height;
659
660 c = VTBUF_GET_FIELD(vb, row, col);
661 src = vtfont_lookup(vf, c);
662
663 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), &fg, &bg);
664 if ((used_colors_list[fg] & 0x1) != 0x1)
665 used_colors++;
666 if ((used_colors_list[bg] & 0x2) != 0x2)
667 used_colors++;
668 used_colors_list[fg] |= 0x1;
669 used_colors_list[bg] |= 0x2;
670
671 /*
672 * Compute the portion of the character we want to draw,
673 * because the pixels block may start in the middle of a
674 * character.
675 *
676 * The first pixel to draw in the character is
677 * the current position -
678 * the start position of the character
679 *
680 * The last pixel to draw is either
681 * - the last pixel of the character, or
682 * - the pixel of the character matching the end of
683 * the pixels block
684 * whichever comes first. This position is then
685 * changed to be relative to the start position of the
686 * character.
687 */
688
689 src_x = i -
690 (col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col);
691 x_count = min(min(
692 (col + 1) * vf->vf_width +
693 vw->vw_draw_area.tr_begin.tp_col,
694 x + VT_VGA_PIXELS_BLOCK),
695 vw->vw_draw_area.tr_end.tp_col);
696 x_count -= col * vf->vf_width +
697 vw->vw_draw_area.tr_begin.tp_col;
698 x_count -= src_x;
699
700 /* Copy a portion of the character. */
701 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors,
702 src, NULL, vf->vf_width,
703 src_x, i % VT_VGA_PIXELS_BLOCK, x_count,
704 0, 0, vf->vf_height, fg, bg, 0);
705
706 /* We move to the next portion. */
707 i += x_count;
708 }
709
710 #ifndef SC_NO_CUTPASTE
711 /*
712 * Copy the mouse pointer bitmap if it's over the current pixels
713 * block.
714 *
715 * We use the saved cursor position (saved in vt_flush()), because
716 * the current position could be different than the one used
717 * to mark the area dirty.
718 */
719 term_rect_t drawn_area;
720
721 drawn_area.tr_begin.tp_col = x;
722 drawn_area.tr_begin.tp_row = y;
723 drawn_area.tr_end.tp_col = x + VT_VGA_PIXELS_BLOCK;
724 drawn_area.tr_end.tp_row = y + vf->vf_height;
725 if (vd->vd_mshown && vt_is_cursor_in_area(vd, &drawn_area)) {
726 struct vt_mouse_cursor *cursor;
727 unsigned int mx, my;
728 unsigned int dst_x, src_y, dst_y, y_count;
729
730 cursor = vd->vd_mcursor;
731 mx = vd->vd_mx_drawn + vw->vw_draw_area.tr_begin.tp_col;
732 my = vd->vd_my_drawn + vw->vw_draw_area.tr_begin.tp_row;
733
734 /* Compute the portion of the cursor we want to copy. */
735 src_x = x > mx ? x - mx : 0;
736 dst_x = mx > x ? mx - x : 0;
737 x_count = min(min(min(
738 cursor->width - src_x,
739 x + VT_VGA_PIXELS_BLOCK - mx),
740 vw->vw_draw_area.tr_end.tp_col - mx),
741 VT_VGA_PIXELS_BLOCK);
742
743 /*
744 * The cursor isn't aligned on the Y-axis with
745 * characters, so we need to compute the vertical
746 * start/count.
747 */
748 src_y = y > my ? y - my : 0;
749 dst_y = my > y ? my - y : 0;
750 y_count = min(
751 min(cursor->height - src_y, y + vf->vf_height - my),
752 vf->vf_height);
753
754 /* Copy the cursor portion. */
755 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors,
756 cursor->map, cursor->mask, cursor->width,
757 src_x, dst_x, x_count, src_y, dst_y, y_count,
758 vd->vd_mcursor_fg, vd->vd_mcursor_bg, 1);
759
760 if ((used_colors_list[vd->vd_mcursor_fg] & 0x1) != 0x1)
761 used_colors++;
762 if ((used_colors_list[vd->vd_mcursor_bg] & 0x2) != 0x2)
763 used_colors++;
764 }
765 #endif
766
767 /*
768 * The pixels block is completed, we can now draw it on the
769 * screen.
770 */
771 if (used_colors == 2)
772 vga_bitblt_pixels_block_2colors(vd, pattern_2colors, fg, bg,
773 x, y, vf->vf_height);
774 else
775 vga_bitblt_pixels_block_ncolors(vd, pattern_ncolors,
776 x, y, vf->vf_height);
777 }
778
779 static void
vga_bitblt_text_gfxmode(struct vt_device * vd,const struct vt_window * vw,const term_rect_t * area)780 vga_bitblt_text_gfxmode(struct vt_device *vd, const struct vt_window *vw,
781 const term_rect_t *area)
782 {
783 const struct vt_font *vf;
784 unsigned int col, row;
785 unsigned int x1, y1, x2, y2, x, y;
786
787 vf = vw->vw_font;
788
789 /*
790 * Compute the top-left pixel position aligned with the video
791 * adapter pixels block size.
792 *
793 * This is calculated from the top-left column of te dirty area:
794 *
795 * 1. Compute the top-left pixel of the character:
796 * col * font width + x offset
797 *
798 * NOTE: x offset is used to center the text area on the
799 * screen. It's expressed in pixels, not in characters
800 * col/row!
801 *
802 * 2. Find the pixel further on the left marking the start of
803 * an aligned pixels block (eg. chunk of 8 pixels):
804 * character's x / blocksize * blocksize
805 *
806 * The division, being made on integers, achieves the
807 * alignment.
808 *
809 * For the Y-axis, we need to compute the character's y
810 * coordinate, but we don't need to align it.
811 */
812
813 col = area->tr_begin.tp_col;
814 row = area->tr_begin.tp_row;
815 x1 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col)
816 / VT_VGA_PIXELS_BLOCK)
817 * VT_VGA_PIXELS_BLOCK;
818 y1 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row;
819
820 /*
821 * Compute the bottom right pixel position, again, aligned with
822 * the pixels block size.
823 *
824 * The same rules apply, we just add 1 to base the computation
825 * on the "right border" of the dirty area.
826 */
827
828 col = area->tr_end.tp_col;
829 row = area->tr_end.tp_row;
830 x2 = (int)howmany(col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col,
831 VT_VGA_PIXELS_BLOCK)
832 * VT_VGA_PIXELS_BLOCK;
833 y2 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row;
834
835 /* Clip the area to the screen size. */
836 x2 = min(x2, vw->vw_draw_area.tr_end.tp_col);
837 y2 = min(y2, vw->vw_draw_area.tr_end.tp_row);
838
839 /*
840 * Now, we take care of N pixels line at a time (the first for
841 * loop, N = font height), and for these lines, draw one pixels
842 * block at a time (the second for loop), not a character at a
843 * time.
844 *
845 * Therefore, on the X-axis, characters my be drawn partially if
846 * they are not aligned on 8-pixels boundary.
847 *
848 * However, the operation is repeated for the full height of the
849 * font before moving to the next character, because it allows
850 * to keep the color settings and write mode, before perhaps
851 * changing them with the next one.
852 */
853
854 for (y = y1; y < y2; y += vf->vf_height) {
855 for (x = x1; x < x2; x += VT_VGA_PIXELS_BLOCK) {
856 vga_bitblt_one_text_pixels_block(vd, vw, x, y);
857 }
858 }
859 }
860
861 static void
vga_bitblt_text_txtmode(struct vt_device * vd,const struct vt_window * vw,const term_rect_t * area)862 vga_bitblt_text_txtmode(struct vt_device *vd, const struct vt_window *vw,
863 const term_rect_t *area)
864 {
865 struct vga_softc *sc;
866 const struct vt_buf *vb;
867 unsigned int col, row;
868 term_char_t c;
869 term_color_t fg, bg;
870 uint8_t ch, attr;
871 size_t z;
872
873 sc = vd->vd_softc;
874 vb = &vw->vw_buf;
875
876 for (row = area->tr_begin.tp_row; row < area->tr_end.tp_row; ++row) {
877 for (col = area->tr_begin.tp_col;
878 col < area->tr_end.tp_col;
879 ++col) {
880 /*
881 * Get next character and its associated fg/bg
882 * colors.
883 */
884 c = VTBUF_GET_FIELD(vb, row, col);
885 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col),
886 &fg, &bg);
887
888 z = row * PIXEL_WIDTH(VT_FB_MAX_WIDTH) + col;
889 if (z >= PIXEL_HEIGHT(VT_FB_MAX_HEIGHT) *
890 PIXEL_WIDTH(VT_FB_MAX_WIDTH))
891 continue;
892 if (vd->vd_drawn && (vd->vd_drawn[z] == c) &&
893 vd->vd_drawnfg && (vd->vd_drawnfg[z] == fg) &&
894 vd->vd_drawnbg && (vd->vd_drawnbg[z] == bg))
895 continue;
896
897 /*
898 * Convert character to CP437, which is the
899 * character set used by the VGA hardware by
900 * default.
901 */
902 ch = vga_get_cp437(TCHAR_CHARACTER(c));
903
904 /* Convert colors to VGA attributes. */
905 attr =
906 cons_to_vga_colors[bg] << 4 |
907 cons_to_vga_colors[fg];
908
909 MEM_WRITE2(sc, (row * 80 + col) * 2 + 0,
910 ch + ((uint16_t)(attr) << 8));
911
912 if (vd->vd_drawn)
913 vd->vd_drawn[z] = c;
914 if (vd->vd_drawnfg)
915 vd->vd_drawnfg[z] = fg;
916 if (vd->vd_drawnbg)
917 vd->vd_drawnbg[z] = bg;
918 }
919 }
920 }
921
922 static void
vga_bitblt_text(struct vt_device * vd,const struct vt_window * vw,const term_rect_t * area)923 vga_bitblt_text(struct vt_device *vd, const struct vt_window *vw,
924 const term_rect_t *area)
925 {
926
927 if (!(vd->vd_flags & VDF_TEXTMODE)) {
928 vga_bitblt_text_gfxmode(vd, vw, area);
929 } else {
930 vga_bitblt_text_txtmode(vd, vw, area);
931 }
932 }
933
934 void
vga_invalidate_text(struct vt_device * vd,const term_rect_t * area)935 vga_invalidate_text(struct vt_device *vd, const term_rect_t *area)
936 {
937 unsigned int col, row;
938 size_t z;
939
940 for (row = area->tr_begin.tp_row; row < area->tr_end.tp_row; ++row) {
941 for (col = area->tr_begin.tp_col;
942 col < area->tr_end.tp_col;
943 ++col) {
944 z = row * PIXEL_WIDTH(VT_FB_MAX_WIDTH) + col;
945 if (z >= PIXEL_HEIGHT(VT_FB_MAX_HEIGHT) *
946 PIXEL_WIDTH(VT_FB_MAX_WIDTH))
947 continue;
948 if (vd->vd_drawn)
949 vd->vd_drawn[z] = 0;
950 if (vd->vd_drawnfg)
951 vd->vd_drawnfg[z] = 0;
952 if (vd->vd_drawnbg)
953 vd->vd_drawnbg[z] = 0;
954 }
955 }
956 }
957
958 static void
vga_bitblt_bitmap(struct vt_device * vd,const struct vt_window * vw,const uint8_t * pattern,const uint8_t * mask,unsigned int width,unsigned int height,unsigned int x,unsigned int y,term_color_t fg,term_color_t bg)959 vga_bitblt_bitmap(struct vt_device *vd, const struct vt_window *vw,
960 const uint8_t *pattern, const uint8_t *mask,
961 unsigned int width, unsigned int height,
962 unsigned int x, unsigned int y, term_color_t fg, term_color_t bg)
963 {
964 unsigned int x1, y1, x2, y2, i, j, src_x, dst_x, x_count;
965 uint8_t pattern_2colors;
966
967 /* Align coordinates with the 8-pxels grid. */
968 x1 = rounddown(x, VT_VGA_PIXELS_BLOCK);
969 y1 = y;
970
971 x2 = roundup(x + width, VT_VGA_PIXELS_BLOCK);
972 y2 = y + height;
973 x2 = min(x2, vd->vd_width - 1);
974 y2 = min(y2, vd->vd_height - 1);
975
976 for (j = y1; j < y2; ++j) {
977 src_x = 0;
978 dst_x = x - x1;
979 x_count = VT_VGA_PIXELS_BLOCK - dst_x;
980
981 for (i = x1; i < x2; i += VT_VGA_PIXELS_BLOCK) {
982 pattern_2colors = 0;
983
984 vga_copy_bitmap_portion(
985 &pattern_2colors, NULL,
986 pattern, mask, width,
987 src_x, dst_x, x_count,
988 j - y1, 0, 1, fg, bg, 0);
989
990 vga_bitblt_pixels_block_2colors(vd,
991 &pattern_2colors, fg, bg,
992 i, j, 1);
993
994 src_x += x_count;
995 dst_x = (dst_x + x_count) % VT_VGA_PIXELS_BLOCK;
996 x_count = min(width - src_x, VT_VGA_PIXELS_BLOCK);
997 }
998 }
999 }
1000
1001 static void
vga_initialize_graphics(struct vt_device * vd)1002 vga_initialize_graphics(struct vt_device *vd)
1003 {
1004 struct vga_softc *sc = vd->vd_softc;
1005
1006 /* Clock select. */
1007 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, VGA_GEN_MO_VSP | VGA_GEN_MO_HSP |
1008 VGA_GEN_MO_PB | VGA_GEN_MO_ER | VGA_GEN_MO_IOA);
1009 /* Set sequencer clocking and memory mode. */
1010 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CLOCKING_MODE);
1011 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_CM_89);
1012 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MEMORY_MODE);
1013 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_OE | VGA_SEQ_MM_EM);
1014
1015 /* Set the graphics controller in graphics mode. */
1016 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MISCELLANEOUS);
1017 REG_WRITE1(sc, VGA_GC_DATA, 0x04 + VGA_GC_MISC_GA);
1018 /* Program the CRT controller. */
1019 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_TOTAL);
1020 REG_WRITE1(sc, VGA_CRTC_DATA, 0x5f); /* 760 */
1021 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_DISP_END);
1022 REG_WRITE1(sc, VGA_CRTC_DATA, 0x4f); /* 640 - 8 */
1023 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_BLANK);
1024 REG_WRITE1(sc, VGA_CRTC_DATA, 0x50); /* 640 */
1025 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_BLANK);
1026 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHB_CR + 2);
1027 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_RETRACE);
1028 REG_WRITE1(sc, VGA_CRTC_DATA, 0x54); /* 672 */
1029 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_RETRACE);
1030 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHR_EHB + 0);
1031 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_TOTAL);
1032 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0b); /* 523 */
1033 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OVERFLOW);
1034 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_OF_VT9 | VGA_CRTC_OF_LC8 |
1035 VGA_CRTC_OF_VBS8 | VGA_CRTC_OF_VRS8 | VGA_CRTC_OF_VDE8);
1036 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MAX_SCAN_LINE);
1037 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MSL_LC9);
1038 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_START);
1039 REG_WRITE1(sc, VGA_CRTC_DATA, 0xea); /* 480 + 10 */
1040 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END);
1041 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0c);
1042 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_DISPLAY_END);
1043 REG_WRITE1(sc, VGA_CRTC_DATA, 0xdf); /* 480 - 1*/
1044 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OFFSET);
1045 REG_WRITE1(sc, VGA_CRTC_DATA, 0x28);
1046 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_VERT_BLANK);
1047 REG_WRITE1(sc, VGA_CRTC_DATA, 0xe7); /* 480 + 7 */
1048 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_VERT_BLANK);
1049 REG_WRITE1(sc, VGA_CRTC_DATA, 0x04);
1050 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL);
1051 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MC_WB | VGA_CRTC_MC_AW |
1052 VGA_CRTC_MC_SRS | VGA_CRTC_MC_CMS);
1053 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_LINE_COMPARE);
1054 REG_WRITE1(sc, VGA_CRTC_DATA, 0xff); /* 480 + 31 */
1055
1056 REG_WRITE1(sc, VGA_GEN_FEATURE_CTRL_W, 0);
1057
1058 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK);
1059 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 |
1060 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0);
1061 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CHAR_MAP_SELECT);
1062 REG_WRITE1(sc, VGA_SEQ_DATA, 0);
1063
1064 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET);
1065 REG_WRITE1(sc, VGA_GC_DATA, 0);
1066 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET);
1067 REG_WRITE1(sc, VGA_GC_DATA, 0x0f);
1068 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_COMPARE);
1069 REG_WRITE1(sc, VGA_GC_DATA, 0);
1070 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_DATA_ROTATE);
1071 REG_WRITE1(sc, VGA_GC_DATA, 0);
1072 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_READ_MAP_SELECT);
1073 REG_WRITE1(sc, VGA_GC_DATA, 0);
1074 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE);
1075 REG_WRITE1(sc, VGA_GC_DATA, 0);
1076 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_DONT_CARE);
1077 REG_WRITE1(sc, VGA_GC_DATA, 0x0f);
1078 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_BIT_MASK);
1079 REG_WRITE1(sc, VGA_GC_DATA, 0xff);
1080 }
1081
1082 static int
vga_initialize(struct vt_device * vd,int textmode)1083 vga_initialize(struct vt_device *vd, int textmode)
1084 {
1085 struct vga_softc *sc = vd->vd_softc;
1086 uint8_t x;
1087 int timeout;
1088
1089 /* Make sure the VGA adapter is not in monochrome emulation mode. */
1090 x = REG_READ1(sc, VGA_GEN_MISC_OUTPUT_R);
1091 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, x | VGA_GEN_MO_IOA);
1092
1093 /* Unprotect CRTC registers 0-7. */
1094 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END);
1095 x = REG_READ1(sc, VGA_CRTC_DATA);
1096 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_VRE_PR);
1097
1098 /*
1099 * Wait for the vertical retrace.
1100 * NOTE: this code reads the VGA_GEN_INPUT_STAT_1 register, which has
1101 * the side-effect of clearing the internal flip-flip of the attribute
1102 * controller's write register. This means that because this code is
1103 * here, we know for sure that the first write to the attribute
1104 * controller will be a write to the address register. Removing this
1105 * code therefore also removes that guarantee and appropriate measures
1106 * need to be taken.
1107 */
1108 timeout = 10000;
1109 do {
1110 DELAY(10);
1111 x = REG_READ1(sc, VGA_GEN_INPUT_STAT_1);
1112 x &= VGA_GEN_IS1_VR | VGA_GEN_IS1_DE;
1113 } while (x != (VGA_GEN_IS1_VR | VGA_GEN_IS1_DE) && --timeout != 0);
1114 if (timeout == 0) {
1115 printf("Timeout initializing vt_vga\n");
1116 return (ENXIO);
1117 }
1118
1119 /* Now, disable the sync. signals. */
1120 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL);
1121 x = REG_READ1(sc, VGA_CRTC_DATA);
1122 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_MC_HR);
1123
1124 /* Asynchronous sequencer reset. */
1125 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET);
1126 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR);
1127
1128 if (!textmode)
1129 vga_initialize_graphics(vd);
1130
1131 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_PRESET_ROW_SCAN);
1132 REG_WRITE1(sc, VGA_CRTC_DATA, 0);
1133 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_START);
1134 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_CS_COO);
1135 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_END);
1136 REG_WRITE1(sc, VGA_CRTC_DATA, 0);
1137 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_HIGH);
1138 REG_WRITE1(sc, VGA_CRTC_DATA, 0);
1139 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_LOW);
1140 REG_WRITE1(sc, VGA_CRTC_DATA, 0);
1141 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_HIGH);
1142 REG_WRITE1(sc, VGA_CRTC_DATA, 0);
1143 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_LOW);
1144 REG_WRITE1(sc, VGA_CRTC_DATA, 0x59);
1145 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_UNDERLINE_LOC);
1146 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_UL_UL);
1147
1148 if (textmode) {
1149 /* Set the attribute controller to blink disable. */
1150 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL);
1151 REG_WRITE1(sc, VGA_AC_WRITE, 0);
1152 } else {
1153 /* Set the attribute controller in graphics mode. */
1154 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL);
1155 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MC_GA);
1156 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_HORIZ_PIXEL_PANNING);
1157 REG_WRITE1(sc, VGA_AC_WRITE, 0);
1158 }
1159 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(0));
1160 REG_WRITE1(sc, VGA_AC_WRITE, 0);
1161 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(1));
1162 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_B);
1163 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(2));
1164 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G);
1165 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(3));
1166 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G | VGA_AC_PAL_B);
1167 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(4));
1168 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R);
1169 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(5));
1170 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_B);
1171 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(6));
1172 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SG | VGA_AC_PAL_R);
1173 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(7));
1174 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B);
1175
1176 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(8));
1177 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
1178 VGA_AC_PAL_SB);
1179 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(9));
1180 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
1181 VGA_AC_PAL_SB | VGA_AC_PAL_B);
1182 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(10));
1183 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
1184 VGA_AC_PAL_SB | VGA_AC_PAL_G);
1185 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(11));
1186 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
1187 VGA_AC_PAL_SB | VGA_AC_PAL_G | VGA_AC_PAL_B);
1188 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(12));
1189 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
1190 VGA_AC_PAL_SB | VGA_AC_PAL_R);
1191 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(13));
1192 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
1193 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_B);
1194 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(14));
1195 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
1196 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G);
1197 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(15));
1198 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
1199 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B);
1200
1201 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_OVERSCAN_COLOR);
1202 REG_WRITE1(sc, VGA_AC_WRITE, 0);
1203 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_PLANE_ENABLE);
1204 REG_WRITE1(sc, VGA_AC_WRITE, 0x0f);
1205 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_SELECT);
1206 REG_WRITE1(sc, VGA_AC_WRITE, 0);
1207
1208 if (!textmode) {
1209 u_int ofs;
1210
1211 /*
1212 * Done. Clear the frame buffer. All bit planes are
1213 * enabled, so a single-paged loop should clear all
1214 * planes.
1215 */
1216 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) {
1217 MEM_WRITE1(sc, ofs, 0);
1218 }
1219 }
1220
1221 /* Re-enable the sequencer. */
1222 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET);
1223 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR | VGA_SEQ_RST_NAR);
1224 /* Re-enable the sync signals. */
1225 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL);
1226 x = REG_READ1(sc, VGA_CRTC_DATA);
1227 REG_WRITE1(sc, VGA_CRTC_DATA, x | VGA_CRTC_MC_HR);
1228
1229 if (!textmode) {
1230 /* Switch to write mode 3, because we'll mainly do bitblt. */
1231 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE);
1232 REG_WRITE1(sc, VGA_GC_DATA, 3);
1233 sc->vga_wmode = 3;
1234
1235 /*
1236 * In Write Mode 3, Enable Set/Reset is ignored, but we
1237 * use Write Mode 0 to write a group of 8 pixels using
1238 * 3 or more colors. In this case, we want to disable
1239 * Set/Reset: set Enable Set/Reset to 0.
1240 */
1241 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET);
1242 REG_WRITE1(sc, VGA_GC_DATA, 0x00);
1243
1244 /*
1245 * Clear the colors we think are loaded into Set/Reset or
1246 * the latches.
1247 */
1248 sc->vga_curfg = sc->vga_curbg = 0xff;
1249 }
1250
1251 return (0);
1252 }
1253
1254 static bool
vga_acpi_disabled(void)1255 vga_acpi_disabled(void)
1256 {
1257 #if defined(__amd64__) || defined(__i386__)
1258 uint16_t flags;
1259 int ignore;
1260
1261 /*
1262 * Ignore the flag on real hardware: there's a lot of buggy firmware
1263 * that will wrongly set it.
1264 */
1265 ignore = (vm_guest == VM_GUEST_NO);
1266 TUNABLE_INT_FETCH("hw.vga.acpi_ignore_no_vga", &ignore);
1267 if (ignore || !acpi_get_fadt_bootflags(&flags))
1268 return (false);
1269 return ((flags & ACPI_FADT_NO_VGA) != 0);
1270 #else
1271 return (false);
1272 #endif
1273 }
1274
1275 static int
vga_probe(struct vt_device * vd)1276 vga_probe(struct vt_device *vd)
1277 {
1278
1279 return (vga_acpi_disabled() ? CN_DEAD : CN_INTERNAL);
1280 }
1281
1282 static int
vga_init(struct vt_device * vd)1283 vga_init(struct vt_device *vd)
1284 {
1285 struct vga_softc *sc;
1286 int textmode;
1287
1288 if (vd->vd_softc == NULL)
1289 vd->vd_softc = (void *)&vga_conssoftc;
1290 sc = vd->vd_softc;
1291
1292 if (vd->vd_flags & VDF_DOWNGRADE && vd->vd_video_dev != NULL)
1293 vga_pci_repost(vd->vd_video_dev);
1294
1295 #if defined(__amd64__) || defined(__i386__)
1296 sc->vga_fb_tag = X86_BUS_SPACE_MEM;
1297 sc->vga_reg_tag = X86_BUS_SPACE_IO;
1298 #else
1299 # error "Architecture not yet supported!"
1300 #endif
1301
1302 bus_space_map(sc->vga_reg_tag, VGA_REG_BASE, VGA_REG_SIZE, 0,
1303 &sc->vga_reg_handle);
1304
1305 /*
1306 * If "hw.vga.textmode" is not set and we're running on hypervisor,
1307 * we use text mode by default, this is because when we're on
1308 * hypervisor, vt(4) is usually much slower in graphics mode than
1309 * in text mode, especially when we're on Hyper-V.
1310 */
1311 textmode = vm_guest != VM_GUEST_NO;
1312 TUNABLE_INT_FETCH("hw.vga.textmode", &textmode);
1313 if (textmode) {
1314 vd->vd_flags |= VDF_TEXTMODE;
1315 vd->vd_width = 80;
1316 vd->vd_height = 25;
1317 bus_space_map(sc->vga_fb_tag, VGA_TXT_BASE, VGA_TXT_SIZE, 0,
1318 &sc->vga_fb_handle);
1319 } else {
1320 vd->vd_width = VT_VGA_WIDTH;
1321 vd->vd_height = VT_VGA_HEIGHT;
1322 bus_space_map(sc->vga_fb_tag, VGA_MEM_BASE, VGA_MEM_SIZE, 0,
1323 &sc->vga_fb_handle);
1324 }
1325 if (vga_initialize(vd, textmode) != 0)
1326 return (CN_DEAD);
1327 sc->vga_enabled = true;
1328
1329 return (CN_INTERNAL);
1330 }
1331
1332 static void
vga_postswitch(struct vt_device * vd)1333 vga_postswitch(struct vt_device *vd)
1334 {
1335
1336 /* Reinit VGA mode, to restore view after app which change mode. */
1337 vga_initialize(vd, (vd->vd_flags & VDF_TEXTMODE));
1338 /* Ask vt(9) to update chars on visible area. */
1339 vd->vd_flags |= VDF_INVALID;
1340 }
1341
1342 /* Dummy NewBus functions to reserve the resources used by the vt_vga driver */
1343 static void
vtvga_identify(driver_t * driver,device_t parent)1344 vtvga_identify(driver_t *driver, device_t parent)
1345 {
1346
1347 if (!vga_conssoftc.vga_enabled)
1348 return;
1349
1350 if (BUS_ADD_CHILD(parent, 0, driver->name, 0) == NULL)
1351 panic("Unable to attach vt_vga console");
1352 }
1353
1354 static int
vtvga_probe(device_t dev)1355 vtvga_probe(device_t dev)
1356 {
1357
1358 device_set_desc(dev, "VT VGA driver");
1359
1360 return (BUS_PROBE_NOWILDCARD);
1361 }
1362
1363 static int
vtvga_attach(device_t dev)1364 vtvga_attach(device_t dev)
1365 {
1366 struct resource *pseudo_phys_res;
1367 int res_id;
1368
1369 res_id = 0;
1370 pseudo_phys_res = bus_alloc_resource(dev, SYS_RES_MEMORY,
1371 &res_id, VGA_MEM_BASE, VGA_MEM_BASE + VGA_MEM_SIZE - 1,
1372 VGA_MEM_SIZE, RF_ACTIVE);
1373 if (pseudo_phys_res == NULL)
1374 panic("Unable to reserve vt_vga memory");
1375 return (0);
1376 }
1377
1378 /*-------------------- Private Device Attachment Data -----------------------*/
1379 static device_method_t vtvga_methods[] = {
1380 /* Device interface */
1381 DEVMETHOD(device_identify, vtvga_identify),
1382 DEVMETHOD(device_probe, vtvga_probe),
1383 DEVMETHOD(device_attach, vtvga_attach),
1384
1385 DEVMETHOD_END
1386 };
1387
1388 DEFINE_CLASS_0(vtvga, vtvga_driver, vtvga_methods, 0);
1389
1390 DRIVER_MODULE(vtvga, nexus, vtvga_driver, NULL, NULL);
1391