1 /* 2 * Copyright 1999 through 2004 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org 3 * 4 * Permission to use, copy, modify, distribute, and sell this software and its 5 * documentation for any purpose is hereby granted without fee, provided that 6 * the above copyright notice appear in all copies and that both that copyright 7 * notice and this permission notice appear in supporting documentation, and 8 * that the name of Marc Aurele La France not be used in advertising or 9 * publicity pertaining to distribution of the software without specific, 10 * written prior permission. Marc Aurele La France makes no representations 11 * about the suitability of this software for any purpose. It is provided 12 * "as-is" without express or implied warranty. 13 * 14 * MARC AURELE LA FRANCE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO 16 * EVENT SHALL MARC AURELE LA FRANCE BE LIABLE FOR ANY SPECIAL, INDIRECT OR 17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, 18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 20 * PERFORMANCE OF THIS SOFTWARE. 21 * 22 * DRI support by: 23 * Gareth Hughes <gareth@valinux.com> 24 * Leif Delgass <ldelgass@retinalburn.net> 25 */ 26 27 #ifndef ___ATISTRUCT_H___ 28 #define ___ATISTRUCT_H___ 1 29 30 #include "atibank.h" 31 #include "aticlock.h" 32 #include "atiregs.h" 33 34 #ifdef XF86DRI_DEVEL 35 36 /* 37 * DRI support 38 */ 39 #define _XF86DRI_SERVER_ 40 #include "atidripriv.h" 41 #include "mach64_dri.h" 42 #include "sarea.h" 43 #include "xf86drm.h" 44 #include "dri.h" 45 46 #endif /* XF86DRI_DEVEL */ 47 48 #ifdef TV_OUT 49 50 #include "vbe.h" 51 52 #endif /* TV_OUT */ 53 54 #include "picturestr.h" 55 #ifdef USE_EXA 56 #include "exa.h" 57 #endif 58 #ifdef USE_XAA 59 #include "xaa.h" 60 #endif 61 #include "xf86Cursor.h" 62 #include "xf86Pci.h" 63 #if GET_ABI_MAJOR(ABI_VIDEODRV_VERSION) < 6 64 #include "xf86Resources.h" 65 #endif 66 67 #include "atipcirename.h" 68 69 #include "compat-api.h" 70 71 #define CacheSlotOf(____Register) ((____Register) / UnitOf(DWORD_SELECT)) 72 73 /* 74 * This is probably as good a place as any to put this note, as it applies to 75 * the entire driver, but especially here. CARD8's are used rather than the 76 * appropriate enum types because the latter would nearly quadruple storage 77 * requirements (they are stored as int's). This reduces the usefulness of 78 * enum types to their ability to declare index values. I've also elected to 79 * forgo the strong typing capabilities of enum types. C is not terribly adept 80 * at strong typing anyway. 81 */ 82 83 /* A structure for local data related to video modes */ 84 typedef struct _ATIHWRec 85 { 86 /* Clock number for mode */ 87 CARD8 clock; 88 89 /* The CRTC used to drive the screen (VGA, 8514, Mach64) */ 90 CARD8 crtc; 91 92 /* Colour lookup table */ 93 CARD8 lut[256 * 3]; 94 95 #ifndef AVOID_CPIO 96 97 /* VGA registers */ 98 CARD8 genmo, crt[25], seq[5], gra[9], attr[21]; 99 100 /* VGA Wonder registers */ 101 CARD8 a3, a6, a7, ab, ac, ad, ae, 102 b0, b1, b2, b3, b5, b6, b8, b9, ba, bd, be, bf; 103 104 /* Shadow VGA CRTC registers */ 105 CARD8 shadow_vga[25]; 106 107 #endif /* AVOID_CPIO */ 108 109 /* Generic DAC registers */ 110 CARD8 dac_read, dac_write, dac_mask; 111 112 /* IBM RGB 514 registers */ 113 CARD8 ibmrgb514[0x0092U]; /* All that's needed for now */ 114 115 /* Mach64 PLL registers */ 116 CARD8 pll_vclk_cntl, pll_vclk_post_div, 117 pll_vclk0_fb_div, pll_vclk1_fb_div, 118 pll_vclk2_fb_div, pll_vclk3_fb_div, 119 pll_xclk_cntl, pll_ext_vpll_cntl; 120 121 /* Mach64 CPIO registers */ 122 CARD32 crtc_h_total_disp, crtc_h_sync_strt_wid, 123 crtc_v_total_disp, crtc_v_sync_strt_wid, 124 crtc_off_pitch, crtc_gen_cntl, dsp_config, dsp_on_off, mem_buf_cntl, 125 ovr_clr, ovr_wid_left_right, ovr_wid_top_bottom, 126 cur_clr0, cur_clr1, cur_offset, 127 cur_horz_vert_posn, cur_horz_vert_off, 128 clock_cntl, bus_cntl, mem_cntl, mem_vga_wp_sel, mem_vga_rp_sel, 129 dac_cntl, gen_test_cntl, config_cntl, mpp_config, mpp_strobe_seq, 130 tvo_cntl; 131 132 /* LCD registers */ 133 CARD32 lcd_index, config_panel, lcd_gen_ctrl, 134 horz_stretching, vert_stretching, ext_vert_stretch; 135 136 /* Shadow Mach64 CRTC registers */ 137 CARD32 shadow_h_total_disp, shadow_h_sync_strt_wid, 138 shadow_v_total_disp, shadow_v_sync_strt_wid; 139 140 /* Mach64 MMIO Block 0 registers and related subfields */ 141 CARD32 dst_off_pitch; 142 CARD16 dst_x, dst_y, dst_height; 143 CARD32 dst_bres_err, dst_bres_inc, dst_bres_dec, dst_cntl; 144 CARD32 src_off_pitch; 145 CARD16 src_x, src_y, src_width1, src_height1, 146 src_x_start, src_y_start, src_width2, src_height2; 147 CARD32 src_cntl; 148 CARD32 host_cntl; 149 CARD32 pat_reg0, pat_reg1, pat_cntl; 150 CARD16 sc_left, sc_right, sc_top, sc_bottom; 151 CARD32 dp_bkgd_clr, dp_frgd_clr, dp_write_mask, dp_chain_mask, 152 dp_pix_width, dp_mix, dp_src; 153 CARD32 clr_cmp_clr, clr_cmp_msk, clr_cmp_cntl; 154 CARD32 context_mask, context_load_cntl; 155 156 CARD32 scale_3d_cntl, tex_size_pitch, tex_cntl, tex_offset; 157 158 /* Mach64 MMIO Block 1 registers */ 159 CARD32 overlay_y_x_start, overlay_y_x_end, overlay_graphics_key_clr, 160 overlay_graphics_key_msk, overlay_key_cntl, overlay_scale_inc, 161 overlay_scale_cntl, scaler_height_width, scaler_test, 162 scaler_buf0_offset, scaler_buf1_offset, scaler_buf_pitch, 163 video_format, overlay_exclusive_horz, overlay_exclusive_vert, 164 buf0_offset, buf0_pitch, buf1_offset, buf1_pitch, 165 scaler_colour_cntl, scaler_h_coeff0, scaler_h_coeff1, 166 scaler_h_coeff2, scaler_h_coeff3, scaler_h_coeff4, gui_cntl, 167 scaler_buf0_offset_u, scaler_buf0_offset_v, scaler_buf1_offset_u, 168 scaler_buf1_offset_v; 169 170 /* Clock programming data */ 171 int FeedbackDivider, ReferenceDivider, PostDivider; 172 173 #ifndef AVOID_CPIO 174 175 /* This is used by ATISwap() */ 176 pointer frame_buffer; 177 ATIBankProcPtr SetBank; 178 unsigned int nBank, nPlane; 179 180 #endif /* AVOID_CPIO */ 181 182 } ATIHWRec; 183 184 #ifdef USE_EXA 185 /* 186 * Card engine state for communication across RENDER acceleration hooks. 187 */ 188 typedef struct _Mach64ContextRegs3D 189 { 190 CARD32 dp_mix; 191 CARD32 dp_src; 192 CARD32 dp_write_mask; 193 CARD32 dp_pix_width; 194 CARD32 dst_pitch_offset; 195 196 CARD32 scale_3d_cntl; 197 198 CARD32 tex_cntl; 199 CARD32 tex_size_pitch; 200 CARD32 tex_offset; 201 202 int tex_width; /* src/mask texture width (pixels) */ 203 int tex_height; /* src/mask texture height (pixels) */ 204 205 Bool frag_src; /* solid src uses fragment color */ 206 Bool frag_mask; /* solid mask uses fragment color */ 207 CARD32 frag_color; /* solid src/mask color */ 208 209 Bool color_alpha; /* the alpha value is contained in the color 210 channels instead of the alpha channel */ 211 212 PictTransform *transform; 213 } Mach64ContextRegs3D; 214 #endif /* USE_EXA */ 215 216 /* 217 * This structure defines the driver's private area. 218 */ 219 typedef struct _ATIRec 220 { 221 222 #ifndef AVOID_CPIO 223 224 CARD8 VGAAdapter; 225 226 #endif /* AVOID_CPIO */ 227 228 /* 229 * Chip-related definitions. 230 */ 231 CARD32 config_chip_id; 232 CARD16 ChipType; 233 CARD8 Chip; 234 CARD8 ChipClass, ChipRevision, ChipRev, ChipVersion, ChipFoundry; 235 236 /* 237 * Processor I/O decoding definitions. 238 */ 239 CARD8 CPIODecoding; 240 unsigned long CPIOBase; 241 242 #ifndef AVOID_CPIO 243 244 /* 245 * Processor I/O port definition for VGA. 246 */ 247 unsigned long CPIO_VGABase; 248 249 /* 250 * Processor I/O port definitions for VGA Wonder. 251 */ 252 unsigned long CPIO_VGAWonder; 253 254 #endif /* AVOID_CPIO */ 255 256 /* 257 * DAC-related definitions. 258 */ 259 260 #ifndef AVOID_CPIO 261 262 unsigned long CPIO_DAC_MASK, CPIO_DAC_DATA, CPIO_DAC_READ, CPIO_DAC_WRITE, 263 CPIO_DAC_WAIT; 264 265 #endif /* AVOID_CPIO */ 266 267 CARD16 DAC; 268 CARD8 rgbBits; 269 270 /* 271 * Definitions related to system bus interface. 272 */ 273 pciVideoPtr PCIInfo; 274 CARD8 BusType; 275 276 #ifndef AVOID_CPIO 277 #ifndef XSERVER_LIBPCIACCESS 278 resRange VGAWonderResources[2]; 279 #endif 280 #endif /* AVOID_CPIO */ 281 282 /* 283 * Definitions related to video memory. 284 */ 285 CARD8 MemoryType; 286 int VideoRAM; 287 288 /* 289 * BIOS-related definitions. 290 */ 291 CARD8 I2CType, Tuner, Decoder, Audio; 292 293 /* 294 * Definitions related to video memory apertures. 295 */ 296 pointer pMemory, pShadow; 297 pointer pMemoryLE; /* Always little-endian */ 298 unsigned long LinearBase; 299 int LinearSize, FBPitch, FBBytesPerPixel; 300 301 #ifndef AVOID_CPIO 302 303 /* 304 * Banking interface. 305 */ 306 pointer pBank; 307 308 #endif /* AVOID_CPIO */ 309 310 /* 311 * Definitions related to MMIO register apertures. 312 */ 313 pointer pMMIO, pBlock[2]; 314 unsigned long Block0Base, Block1Base; 315 316 /* 317 * XAA interface. 318 */ 319 Bool useEXA; 320 #ifdef USE_EXA 321 ExaDriverPtr pExa; 322 #endif 323 #ifdef USE_XAA 324 XAAInfoRecPtr pXAAInfo; 325 #endif 326 int nAvailableFIFOEntries, nFIFOEntries, nHostFIFOEntries; 327 CARD8 EngineIsBusy, EngineIsLocked, XModifier; 328 CARD32 dst_cntl; /* For SetupFor/Subsequent communication */ 329 CARD32 sc_left_right, sc_top_bottom; 330 CARD16 sc_left, sc_right, sc_top, sc_bottom; /* Current scissors */ 331 pointer pHOST_DATA; /* Current HOST_DATA_* transfer window address */ 332 #ifdef USE_XAA 333 CARD32 *ExpansionBitmapScanlinePtr[2]; 334 int ExpansionBitmapWidth; 335 #endif 336 #ifdef USE_EXA 337 Bool RenderAccelEnabled; 338 Mach64ContextRegs3D m3d; 339 #endif 340 341 /* 342 * Cursor-related definitions. 343 */ 344 xf86CursorInfoPtr pCursorInfo; 345 pointer pCursorPage, pCursorImage; 346 unsigned long CursorBase; 347 CARD32 CursorOffset; 348 CARD16 CursorXOffset, CursorYOffset; 349 CARD8 Cursor; 350 351 /* 352 * MMIO cache. 353 */ 354 CARD32 MMIOCache[CacheSlotOf(DWORD_SELECT) + 1]; 355 CARD8 MMIOCached[(CacheSlotOf(DWORD_SELECT) + 8) >> 3]; 356 357 /* 358 * Clock-related definitions. 359 */ 360 int refclk; 361 int ClockNumberToProgramme, ReferenceNumerator, ReferenceDenominator; 362 int ProgrammableClock, maxClock; 363 ClockRec ClockDescriptor; 364 365 /* 366 * DSP register data. 367 */ 368 int XCLKFeedbackDivider, XCLKReferenceDivider, XCLKPostDivider; 369 CARD16 XCLKMaxRASDelay, XCLKPageFaultDelay, 370 DisplayLoopLatency, DisplayFIFODepth; 371 372 /* 373 * LCD panel data. 374 */ 375 int LCDPanelID, LCDClock, LCDHorizontal, LCDVertical; 376 unsigned LCDHSyncStart, LCDHSyncWidth, LCDHBlankWidth; 377 unsigned LCDVSyncStart, LCDVSyncWidth, LCDVBlankWidth; 378 int LCDVBlendFIFOSize; 379 380 /* 381 * Data used by ATIAdjustFrame(). 382 */ 383 int AdjustDepth, AdjustMaxX, AdjustMaxY; 384 unsigned long AdjustMask, AdjustMaxBase; 385 386 /* 387 * DGA and non-DGA common data. 388 */ 389 DisplayModePtr currentMode; 390 CARD8 depth, bitsPerPixel; 391 short int displayWidth; 392 rgb weight; 393 394 #ifndef AVOID_DGA 395 396 /* 397 * DGA-related data. 398 */ 399 DGAModePtr pDGAMode; 400 DGAFunctionRec ATIDGAFunctions; 401 int nDGAMode; 402 403 /* 404 * XAAForceTransBlit alters the behavior of 'SetupForScreenToScreenCopy', 405 * such that ~0 is interpreted as a legitimate transparency key. 406 */ 407 CARD8 XAAForceTransBlit; 408 409 #endif /* AVOID_DGA */ 410 411 /* 412 * XVideo-related data. 413 */ 414 DevUnion XVPortPrivate[1]; 415 pointer pXVBuffer; /* USE_EXA: ExaOffscreenArea* 416 USE_XAA: FBLinearPtr */ 417 RegionRec VideoClip; 418 int SurfacePitch, SurfaceOffset; 419 CARD8 AutoPaint, DoubleBuffer, CurrentBuffer, ActiveSurface; 420 421 /* 422 * Data saved by ATIUnlock() and restored by ATILock(). 423 */ 424 struct 425 { 426 /* Mach64 registers */ 427 CARD32 crtc_int_cntl, crtc_gen_cntl, i2c_cntl_0, hw_debug, 428 scratch_reg3, bus_cntl, lcd_index, mem_cntl, i2c_cntl_1, 429 dac_cntl, gen_test_cntl, mpp_config, mpp_strobe_seq, tvo_cntl; 430 431 #ifndef AVOID_CPIO 432 433 CARD32 config_cntl; 434 435 /* VGA Wonder registers */ 436 CARD8 a6, ab, b1, b4, b5, b6, b8, b9, be; 437 438 /* VGA registers */ 439 CARD8 crt03, crt11; 440 441 /* VGA shadow registers */ 442 CARD8 shadow_crt03, shadow_crt11; 443 444 #endif /* AVOID_CPIO */ 445 446 } LockData; 447 448 /* Mode data */ 449 ATIHWRec OldHW, NewHW; 450 451 /* 452 * Resource Access Control entity index. 453 */ 454 int iEntity; 455 456 /* 457 * Driver options. 458 */ 459 unsigned int OptionProbeSparse:1; /* Force probe for fixed (sparse) I/O */ 460 unsigned int OptionAccel:1; /* Use hardware draw engine */ 461 unsigned int OptionBIOSDisplay:1; /* Allow BIOS interference */ 462 unsigned int OptionBlend:1; /* Force horizontal blending */ 463 unsigned int OptionCRTDisplay:1; /* Display on both CRT & DFP */ 464 unsigned int OptionCSync:1; /* Use composite sync */ 465 unsigned int OptionDevel:1; /* Intentionally undocumented */ 466 467 #ifdef TV_OUT 468 469 CARD8 OptionTvOut; /* Enable TV out if TV is connected */ 470 CARD8 OptionTvStd; /* Requested TV standard - see ATITVStandard enum in atioption.h */ 471 472 #endif /* TV_OUT */ 473 474 unsigned int OptionMMIOCache:1; /* Cache MMIO writes */ 475 unsigned int OptionTestMMIOCache:1;/* Test MMIO cache integrity */ 476 unsigned int OptionPanelDisplay:1; /* Prefer digital panel over CRT */ 477 unsigned int OptionShadowFB:1; /* Use shadow frame buffer */ 478 unsigned int OptionLCDSync:1; /* Temporary */ 479 480 /* 481 * State flags. 482 */ 483 CARD8 Unlocked, Mapped, Closeable; 484 CARD8 MMIOInLinear; 485 486 /* 487 * Wrapped functions. 488 */ 489 CloseScreenProcPtr CloseScreen; 490 491 #ifdef XF86DRI_DEVEL 492 493 /* 494 * DRI data. 495 */ 496 int directRenderingEnabled; 497 DRIInfoPtr pDRIInfo; 498 int drmFD; 499 int irq; 500 ATIDRIServerInfoPtr pDRIServerInfo; 501 Bool NeedDRISync; 502 Bool have3DWindows; 503 504 /* offscreen memory management */ 505 #ifdef USE_XAA 506 int backLines; 507 FBAreaPtr backArea; 508 int depthTexLines; 509 FBAreaPtr depthTexArea; 510 #endif 511 CARD8 OptionIsPCI; /* Force PCI mode */ 512 CARD8 OptionDMAMode; /* async, sync, mmio */ 513 CARD8 OptionAGPMode; /* AGP mode */ 514 CARD8 OptionAGPSize; /* AGP size in MB */ 515 CARD8 OptionLocalTextures; /* Use local textures + AGP textures (only valid for AGP) */ 516 CARD8 OptionBufferSize; /* Command/dma buffer size in MB */ 517 518 #endif /* XF86DRI_DEVEL */ 519 520 #ifdef TV_OUT 521 /* TV out */ 522 vbeInfoPtr pVBE; 523 xf86Int10InfoPtr pInt10; 524 int vbemode; /* saved text mode */ 525 Bool tvActive; 526 #endif /* TV_OUT */ 527 } ATIRec; 528 529 #define ATIPTR(_p) ((ATIPtr)((_p)->driverPrivate)) 530 531 #endif /* ___ATISTRUCT_H___ */ 532